TW561680B - Three-level soft-switched converters - Google Patents

Abstract

Three-level, constant-frequency, soft-switched isolated converters provide zero-voltage-switching (ZVS) conditions for the turn-on of all primary switches over a wide range of input voltage and output load. These converters achieve ZVS with the minimum duty cycle loss and circulating current, which optimizes the conversion efficiency. The ZVS of the primary switches is achieved by the energy stored in an inductor on the primary side of the isolation transformer. The inductor and transformer are arranged so that a change in the phase shift between the outer and inner pair of switches of the series connection of four switches changes the volt-second product on the windings of the transformer and the windings of the inductor in opposite directions. In some embodiments the primary-side inductor is coupled inductor with two windings, whereas in the other embodiments the inductor has only one winding.

Description

561680 A7 ______ B7 V. Description of the Invention (1) Cross Reference to Related Applications This is an application filed on August 31, 2000, with serial number 0/9/652, 869, and named " soft-switching full-bridge converter π. Application and application dated February 5, 2000, serial number-, part of the continuation application for the patent application named "Soft Switching Full Bridge Converter" (Attorney Document No. 36977: 169122) 3 Background of the Invention FIELD OF THE INVENTION The present invention relates to power converters, and more particularly to high voltage power converters. Description of the prior art Generally speaking, because the rated voltage of the switch is determined by the input and / or output voltage of the converter, the high voltage power conversion application device needs a switching element with a high rated voltage. For example, in the prior art, the voltage of the main-side switching element of the separated voltage-reducing transformer converter 'that is, the converter having a separation voltage lower than the input voltage in the converter is determined by The input voltage and topology of the converter are determined. Main-side switches in bridge topologies such as half-bridge and full-bridge transitions are affected by a minimum voltage equal to the input voltage. However, switching voltages in single-ended topologies such as single-switched forward and flyback converters can be much higher than the input voltage. Achieving southern efficiency is a major design challenge in a Nanshuibao application device, which needs to optimize the conduction and switching loss of the characteristics of the switching Is topology and switching elements through careful selection. As the name suggests, such as metal oxide semiconductor field effect transistor (Metal Oxide Semiconductor Field Effect Transistor -4- This paper size applies to China National Standard (CNS) A4 specifications (210X 297 mm) 561680

(Referred to as MOSFET), Insulated Gate Bipolar Transistor Gate Bipolar Transistor (iGBT) and Bipolar Junction Transistor (BJT) have higher rated voltage semiconductor switches corresponding to them. A switch with a lower rated voltage will have a larger conduction loss than a filial father. In addition, switching knowledge will increase in high-voltage applications. In general, switching losses can be reduced and even eliminated by using a variety of different resonant or soft switching topologies. However, the methods for reducing conduction loss are very limited. In fact, once the topology and the switch have selected the rated voltage required for the lowest conduction loss, the only way to further reduce the conduction loss is to use a topology that can utilize a switch with a lower voltage rating and therefore a lower conduction loss . Because in the well-known multilevel converter circuit, the operating voltage of the main switch is lower than the input voltage, so in high-voltage applications, the multilevel converter 3 will naturally be selected. Level DC / AC and DC / DC converters have been described in the literature. As a bitch, Figure 1 shows a three-level, zero-voltage-switched (ZVS) DC / DC converter, which is described in the 1998 IEEE Power Electronics Experts' Conference Records, p. 7 ,by

Barbi et al. Published a paper entitled "High Input Voltage DC / DC Converters: Peak-to-Voltage with W2, Capacitive Snubbing, and Four Switches with Zero-Voltage Conduction". The converter in Figure 1 provides ZVS conduction for all four main switches, and provides a constant limit to the voltage of the main switch to W2 'to operate with pulse-width-modulation (PWM) control frequency. However, because the circuit in Figure 1 will conform to the Chinese National Standard (CNS) A4 specification (210X 297 mm) according to this paper size

Binding

k 561680 A7 B7 V. Description of the invention (3) Relying on the leakage inductance 'is present in the dust-changing Is TR to generate the conditions for the ZVS of the switches Q 2 and Q 4, so the ZVS of the switches Q 2 and Q 4 can only be Achieved within a very limited load range near full load, unless the leakage inductance increases significantly or a considerable external inductance is added in series with the transformer's main winding. It should be noted that, in Figure 1, the inductance of the inductor L · represents the sum of the leakage inductance of the constant house Is and the externally added inductance (if any). Increasing the inductance in series with the main winding * will have a detrimental effect on the efficiency of the circuit 9 because this will reduce the effective secondary period, and will cause severe parasitic ringing, which is due to Interaction between inductance and non-conducting secondary rectifier Is interface capacitance 3-Generally speaking, the reduction of the secondary side duty cycle needs to be compensated by reducing the turn ratio of the transformer, which will increase the main trip This is because the reflected load current that enters into the duster is also increased. In order to reduce the parasitic vibration age, a large secondary back buffer Is (snubber) is required, which will further reduce the conversion efficiency. As another example, Figure 2 shows a three-level, soft-switched DC / DC conversion is, which is described in 2000 IE EE International Telecommunications Energy Association (IN TELEC) minutes 512 -517 page "Three-bit quasi-DC / DC converter with zero voltage switching" by Canales et al. The two-level converter is shown in Figure 2 also has all θ transistors Zi to Q4 ZVS Continuity characteristics. In addition, by using a π flying capacitor " CB, it also has the characteristic of strange frequency operation of phase shift control. The circuit in Figure 2 uses various storage In the output> the volume of the inductor is considered to achieve the ZVS of the switches Q i and Q 4 and the leakage inductances stored in the variable ink is to achieve the internal switches Q2 and Q3. ZVS. Therefore, the ZVS of the external switch can be used in a wide range of load -6- This paper size applies to China National Standard (CNS) A4 specifications (210X 297 mm)

Binding

k 561680 A7 ____ B7__ 5. The description of the invention (4) is reached within the range, however, the ZVS range of the inner switch is very limited, unless the thirsty inductance increases significantly and / or a large external inductance is added to the main winding. As explained, an increase in leakage inductance and / or an increase in external capacitors can have a detrimental effect on the performance of the circuit. Recently, a soft-switching full-bridge technical guard, which can essentially achieve the ZVS main switch of the entire negative redeployment range with a non-lost secondary duty cycle and minimal transfer energy, is described on August 31, 2000 Date, patent application serial number 09/652, 869 filed by Jang and Jo vano vie. One way to achieve this technique is illustrated in FIG. The circuit in Figure 3 uses the energy stored in the magnetizing inductance of the coupled inductor so that the capacitor's current will pass through and thus achieve ZVS switching. By properly selecting the value of the magnetizing inductance of the coupled inductor, the main switch in the converter of Figure 3 can achieve ZVS even without a load. In the circuit of Fig. 3, at light load, the energy required to generate the ZVS condition does not require germanium to be stored in the leakage inductance ', so the leakage inductance of the transformer can be minimized. Therefore, the loss of the duty cycle on the secondary side can be minimized, which can maximize the ratio of the transformer, and thus minimize the conduction loss on the primary side. In addition, the minimum leakage inductance of the transformer can significantly reduce the secondary ringing caused by the resonance between the leakage inductance and the interface capacitance of the rectifier, which can make the buffer circuit often used to reduce the vibration Power consumption is greatly reduced. In the present invention, the concept used in ZVS to achieve the main switch of the converter of Fig. 3 can be extended to a three-level converter. SUMMARY OF THE INVENTION In the present invention, many three-level standards, I fixed frequencies, and flexible paper sizes are applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 561680 A7 B7 V. Description of the invention (5 ) Switching and separation, which can achieve zero-voltage conduction of the main switch within a wide range of load current and input voltage. Generally speaking, some conversions use the inductor Is 5 on the main transformer of the separation transformer 25 to generate the ZVS condition of the main switch. In some specific embodiments, the main-side inductor is a two-winding inductive inductor is 'plane. In other specific embodiments, the' inductor has only one winding. Inductors and transformers will be arranged in the circuit, so that the phase shift between the switches that are reversed and inverted inside the four switches connected in series will change the windings of the inductors and windings in the opposite direction. Second product of voltage on the group. In particular, 'if the phase shift between the outer and inner pairs of switches changes such that the voltage second product on the windings of the transformer decreases, the voltage second product on the windings of the inductor will increase, and vice versa 3 Because the available energy of the ZVS stored in the inductor Is increases when the load current decreases and / or the input voltage increases in the circuit of the present invention, the circuit of the present invention can provide a very wide range of input voltage and load current. In scope 'includes no load to reach ZVS. In addition, because the energy used to generate the ZVS condition at light load is not germanium stored in the leakage inductance of the transformer is, the leakage inductance of the dust change Is can be minimized, which will also make the transformer Minimize work cycle losses. Therefore, ‘the conversion of the present invention can be operated with the maximum duty cycle’, thereby minimizing the conduction loss of the main switch and the electrical / hardness of the transformer ’s second most important component, which can improve the conversion efficiency. In addition, ^ Since the leakage inductance has been minimized ', the secondary parasitic vibration age caused by the resonance between the leakage inductance and the interface capacitance of the rectifier will also be minimized ^ so that the buffers usually used to reduce the vibration age The power consumption of the circuit will also be reduced ° -8- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 561680 A7 B7 V. Description of the invention (6 The circuit of the invention can be implemented as DC / DC conversion Either a DC or AC / AC inverter. If implemented as a DC-DC converter, any type of secondary rectifier can be used. For example, a full-wave rectifier with a secondary winding with a central tap, Full-wave rectifier, or full-bridge full-wave rectifier. Brief description of the figure Figure 1 shows a constant-frequency, pWM, ZVS, three-level DC / DC converter: (a) power stage; (b) the main switch Timing diagram (previous technique) 3 Figure 2 shows a constant frequency, phase shift, zvs, three-level DC / DC converter: (a) power stage; (b) timing diagram of the main switch (previous technique) Figure 3 shows the use of coupling Inductor full-bridge converter to achieve the zvs (previous technique) of the main switch with input dust and output current in a wide range. Figure 4 green shows a soft switching DC / DC three-level converter according to the present invention One of the preferred embodiments. Fig. 5 shows a simplified circuit of the preferred embodiment of the soft switching three-bit quasi-DC / DC converter shown in Fig. 4. Figs. 6 (a)-(1) Shown during the switching cycle is the topology phase s of the soft-switching three-level quasi-DC / DC converter in Figure 4. Figures 7 (a)-(〇) show the soft-switching three-level quasi-levels in Figure 4. Key waveforms of DC / DC converters: (a) signal driving switch Si, (b) signal driving switch S · 2; (c) signal driving switch 33; (d) signal driving switch 54; (e) ) Voltage waveform vsi through switch \; (f) Voltage waveform vS2 through switch s2; (g) Voltage waveform Vs3 through switch 33; (h) Voltage waveform vS4 through switch 54: (i) Main voltage vP; ( j) The voltage νλβ through the coupled inductor: 〇〇-9- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm)

Binding

k 561680 A7 -___ B7 V. Description of the invention (7) Main current waveform iP, · (1) Magnetizing current waveform iMC: (m) current L; (n) current h; (〇) voltage of input terminal of output filter Vs . Fig. 8 shows another embodiment of the present invention in green, which uses a transformer having a main winding with a central tap. FIG. 9 illustrates another embodiment of the present invention, which uses a single winding inductor. FIG. 10 shows a specific embodiment of the present invention, which has a pre-charging circuit for the capacitors CB1 and CB2. Detailed description of the invention Fig. 4 shows one of the preferred embodiments of the soft switching DC / DC three-position quasi-converter according to the present invention. The three-level converter in FIG. 4 includes main switches Si to $ 4 connected in series, capacitors Ccl and Cc of a rail-splitting, "f lying capacitors" (^ and Cb2, separation transformer TR, And the coupling capacitor Lc. In this specific embodiment, the load is coupled to the converter via a center-tapped secondary-side full-wave rectifier connected to the transformer. In addition, the clamp ) Diodes t and b will be used to clamp the voltages of the outer switches & and & to VIN / 2 after the switch is turned off, and if the characteristics of the parasitic circuit and the switch do not match the timing signal at the end In the case of voltage instability on the secondary side of the transformer winding, a blocking capacitor CB is used to prevent the transformer from being saturated. It should be noted that in the specific embodiment of FIG. 4, the secondary side output circuit is implemented with a central branch. Full-wave rectifier connected to the secondary winding. However, the secondary-side output circuit of the DC / DC ML converter implementation device of the present invention can also be implemented as any form of rectifier 'for example' full-wave rectification with double current • 10- This paper size applies Chinese National Standard (CMS) A4 specification (210 X 297 mm) -------- 561680 A7 B7 V. Description of the invention (8 " or full-bridge full-wave rectifier. Except In addition, the converter of the present invention can also be implemented as a DC / AC inverter, that is, there is no rectifier circuit between the secondary winding of the transformer and the load. To facilitate the explanation of the operation of the circuit in FIG. 4, FIG. 5 The simplified circuit diagram is shown. In this simplified circuit, it is assumed that the inductance of the output filter LF is large enough that during the switching period, the wheel-out filter can be modeled to have a size equal to the output current 10. An equal constant current source. Furthermore, suppose that the capacitance of the capacitor Ccl & CC2 (which comes from a capacitor divider that divides the voltage in half) is so large that the capacitors (: (: 1 and (: (: 2 can be modeled by the voltage sources V ^ Vu / 2 and V2 = V1N / 2, respectively. Similarly, it is assumed that the capacitance of "flying capacitor" CB1 & CB2 is large enough that the capacitors can be individually patterned Is a constant voltage source VCB1 & VCB2. Because switching During this period, the average voltage of the coupled inductor winding and transformer winding is zero, and because the phase-shift control is used, the pairwise split relationship in each bridge pin operates at a 50% duty cycle, so Figure 5 The size of the voltage source VCB1 & VCB2 is equal to V, N / 4, that is, VCB1 = VCB2 = VlN / 4. In order to simplify the operation analysis of the circuit in Figure 4, it is also assumed that the impedance of the turned-on transistor switch is zero. , And the resistance of the non-conducting switch is infinite. In addition, the leakage inductance ′ of both the transformer TR and the coupled inductor Lc and the magnetizing inductance of the transformer TR are ignored, because the influence on the circuit operation is not obvious. However, in this analysis, the magnetizing inductance of the coupled inductor Lc and the output capacitance of the main switch Crh cannot be ignored because it plays a major role in circuit operation. Therefore, in Figure 5, the coupled inductor Lc will be modeled as a parallel with a winding ratio of 1 ^ = 1 and with windings AC and CB connected in series. -11 · This paper applies the Chinese National Standard (CNS) A4 specification ( 210X297 mm)

Binding

Line 561680 A7 B7 V. Description of the invention (9 ideal transformer of magnetizing inductance La, and the transformer will only be modeled by an ideal transformer with resistance ratio nTR. It should be noted that the magnetizing inductance LCM of the inductor k Represents the inductance measured between terminals a and B when terminal C is open. Refer to Figure 5 'The following relationship can be generated between currents. IP = iPl + iP2 (1) h = h \ + ^ MC (2) '2-' / > 2 AC, (3) Because the number of turns of the winding AC and winding CB of the coupled inductor Lc is the same, it must be lP \ ~ lP2 (4) Substitute equation (4) into the equation (1)-(3) can be obtained (5) '丨 +' c (6) h = (7) From equations (6) and (7), we can see that current 1 and i2 are composed of two components: the main current The component ip / 2 and the magnetizing current component iMC. The main current component directly depends on the load current, and the magnetizing current does not depend directly on the load, but depends on the voltage second product through the magnetizing inductance. As the name implies, once the outer switch S4 is changed with the individual The phase shift between the on-times of the inner switch S2 & S3 of the Changing the magnetizing current to maintain the output specification. Generally, the change in phase shift with load changes will be larger at light loads, that is, as the load will decrease toward no load -12- This paper size applies to China Standard (CNS) A4 (210X 297 mm)

Binding

k 561680 A7 ______B7 V. Description of the Invention (1〇) ’without reducing towards heavy load. Because in the circuit of FIG. 4, the phase shift will increase when the load is close to zero, so the voltage second product of the LMC will also increase, so that the circuit in FIG. 4 will generate the maximum magnetizing current at no load. ZVS can be achieved without load. Because the magnetizing current i MC does not provide a load current, as shown in Fig. 5, it represents the transfer current. In general, this transfer current and its corresponding energy 1 should be minimized to reduce losses and maximize conversion efficiency. Because the voltage-second product system is inversely dependent on the load current, the circuit in Figure 4 transmits less energy at full load than at light load. Therefore, it has the characteristics of ZVS over a wide load range with the smallest transfer current. . It can also be seen from Figure 5 that VAB = VAC + VCB (8) because the two windings of the coupled inductor Lc have the same number of turns, that is, because the turns ratio of Lc is nLC = i, it must be VAC = VCB (9) or

Generally, for a constant frequency phase shift control, the voltage is a square wave voltage, which includes positive and negative pulses with a change of magnitude V1N / 2, which are separated by the time interval of the corpse q. According to equation (10) and referring to FIG. 5, in the time interval when any of the inner switches S2 and S4 are closed and vAB = 0, the size of the main electric house is V1N / 4, and in the time interval when V1N / 2, the main The magnitude of the voltage is | vp | = 〇. -13 · This paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297 mm) 561680 A7 ____B7 V. Description of the invention (11) For easier analysis, Figure 6 shows the conversion during the switching cycle. Topological stage of the processor 'while Figure 7 shows the key waveforms. As shown in Fig. 7, during the time interval, the switch \ and the core are closed, and the switch S3 & S4 is open and the voltage V1N / 2, so that the main electrical waste vP = 0. In addition, during the topology phase, its equivalent circuit is shown in Fig. 6 (a), and the output current 丨. Will flow through the output rectifier Dq2 and the secondary side of the corresponding transformer, so that the main current ip = Iq / i1tr, where h = NP / NS is the turns ratio of the transformer, \ is the number of turns of the primary winding, and \ is the secondary winding Number of turns. Because the main current is negative, the currents 込 and "are also negative, as shown in Figs. 7 (m) and 7 (n). At the same time, because the positive voltage Vab = yiN / 2, the magnetizing current iMC will have a slope V1N / (2LMC) increases linearly, which will increase 込 and decrease i2. During this whole period, because the main voltage Vp is zero, the voltage vs (which is equal to the voltage seconds) at the input of the output filter ) Is zero. When the switch 51 is closed, this phase will end. After the switch 51 is closed at 1: = 1 \, the current flowing through the transistor Si will be turned to the output capacitor 1 of the switch, as shown in Figure 6 ( b). In this topology stage, because the voltages through capacitors 1 and (: 4 are equal to the constant voltage V! N / 2, the current i2 will charge capacitor C, and discharge capacitor C4 at the same time. Therefore, the voltage through the switch will increase, while the voltage through the switch S4 will decrease, as shown in Figures 7 (e) and (h). In addition, during this stage, the potential at point A will decrease, The voltage vAB decreases from νίΝ / 2 toward zero, and at the same time, the main voltage vP increases from zero toward VIN / 4, such as 7 (0 and (j). Positive main voltage will cause output current I. Begin to switch from rectifier D02 to rectifier. Because the leakage inductance of transformer TR is ignored, this -14- This paper size applies to Chinese national standards (CNS) A4 specification (210 X 297 mm) 561680 A7 B7 V. Description of the invention (12) The conversion is instantaneous. However, if leakage inductance occurs, it will take time to switch the current from one rectifier to another. Because here During the conversion time, the two rectifiers will be turned on, that is, the secondary side of the transformer will be short-circuited, so the voltage 乂 5 is zero, as shown in Figure 7 (0). After the capacitor C4Kt = T2 is completely discharged, that is, After the voltage vS4 reaches zero, the current i2 will continue to flow through the anti-parallel diode 04 and the clamp diode DC1 of the switch 54 instead of flowing through (^ and (: 4, as shown in Figure 6 (c)). As the positive voltage VIN / 4 is applied to the main winding, the currents iP, 込, and i2 rise from the negative to the positive direction. In order to achieve the ZVS of the switch 54, the switch 34 needs to be at its antiparallel diode. 4 During the positive conduction time interval, the conduction is shown in Figure 7 When the output current 10 is completely switched from the rectifier D02 to the rectifier DQ1, that is, when the main current becomes iP = Ia / nTi ^, the stage of FIG. 6 (c) will be bundled at t = T #. In the time interval T3- T4 During this period, the supply of current (which flows through the closed switch s2) is from the voltage source VCB1, and the supply of current i2 (which flows through the closed switch S4) is from the voltage source V2, as shown in Figure 6 (d) When the switch S2 is closed, the phase of Fig. 6 (d) will end at t = T4. After the switch S2 is closed, the current flowing through the transistor of the switch S2 will be diverted to the output capacitor C2, as shown in Fig. 6 (e). Draw. In this topology stage, because the voltages through capacitors 02 and (: 3 are equal to the constant voltage VCBl + VCB2 = VIN / 2, the current ii will simultaneously charge capacitor C2 and discharge capacitor C3. Therefore, through switch S2 The voltage will increase and the voltage through switch S3 will decrease, as shown in Figures 7 (f) and (g). At the same time, the potential at point A will start to decrease, so that the voltage vAB will go from zero toward -νιN / 2 Decrease and reduce the main voltage Vp & V1N / 4 towards zero, as shown in Figure 7 (i) and -15- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 561680 A7 ____ B7 ___ 5. It is shown in the description of the invention (13) (j). Because the decrease of the main voltage will be reflected to the secondary side, the voltage Vs will also decrease towards zero, as shown in Fig. 7 (〇). When the capacitor ( : 3 is fully discharged and when the current I begins to flow through the antiparallel diode 03 of the switch 33, this stage will end at t = T5, as shown in Figure 6 (f). Because after t = T5, the negative The voltage VIN / 2 is applied to the magnetizing inductance lmc, so the magnetizing current iMc starts to decrease linearly toward zero with a constant slope V1N / (2LMC), As shown in Figure 7 (i), after t = Te reaches zero, it will continue to flow in a negative direction, as shown in Figure 6 (g). When the switch s4 is closed, the topology stage of Figure 6 (g) Will end at t = T7 'and the converter will enter half of the second switching cycle. Operation during half of the second switching cycle, that is, operation during time interval eight to 13 is related to The operation is the same during the time interval eight-T7 with the roles of switches S1 & S2 and switches 33 and 34. From the waveforms (m) and (η) of Fig. 6, it can be seen that all four main switches \ to \ are closed The instantaneous' current flowing through the switch is the same, that is,

2 In TR where ‘I 〇 is the load current’ nTR is the turns ratio of the transformer and I is the magnitude of the magnetizing current i mc. According to equation (11), during the period when the capacitor of the closed switch is being charged (the voltage through the switch is rising) and the capacitor of the switch to be turned on is being discharged (the voltage is falling through the switch), the switch is switched by the main current "And the energy stored in the magnetizing current iMe. When the conversion energy provided by the magnetizing current L is always stored in the magnetizing inductance L of the coupled inductor Lc, the conversion energy provided by the current iP is stored in the secondary output circuit Filter inductance (not shown in Figure 5), or the leakage inductance of the transformer TR and the coupled inductor.

561680

(Not in ® 5) of any-among the species. Especially for the inner switches ^ and S3 and s, lp, the conversion energy provided is stored in the output filter inductor ^ and for the outer switches \ and s4, it is stored in the leakage inductance of the transformer. Since it is desirable to minimize the leakage inductance of the transformer 1 to minimize the parasitic ringing on the secondary side, the energy stored in the leakage inductance is relatively small, that is, less than the energy stored in the output filter inductor. Therefore, in the circuit of Fig. 4, the ZVS of the inner switch core and S3 can be easily achieved in the entire load range, and the outer switch \ and \ 2 "needs a magnetizing inductor LMC of an appropriate size because it is at a light load. Almost all the energy needed to generate the outer switching core and the ZVS condition of & is stored in the magnetized inductor. As explained in the patent application serial number filed on February 5, 2001 __ In a full-bridge circuit of a split transformer, the inductors and transformers have interchangeable roles. In particular, by adding a secondary winding to the coupled inductor, the coupled inductor can be used as a transformer to transfer power to the output connected to the secondary side. Circuit, and the magnetizing inductance of the transformer can be used as an inductor to store ZVS energy. Figures 8 and 9 show two such specific embodiments. Generally speaking, the operation of the circuit in Figures 8 and 9 is similar to The operation of the circuit in Figure 4 is the same. The main difference is that in the circuit of Figure 4, when the phase shift between the pair of outer and inner switches is 180 degrees, the maximum output voltage (voltage second product) is obtained When the phase shift is zero, the circuits in Figures 8 and 9 will produce the maximum output voltage (voltage second product) β because both need to invert the simple control signal in the voltage control loop to get the desired control loop. Characteristics, so the difference in the control characteristics of different specific embodiments will have a slight impact on the design of the control circuit. -17- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 561680 A7 ___B7 V. Invention Explanation (15) As explained, in the circuit of the present invention, it is more difficult to achieve the ZVS of the switches of the external pair than the switches of the internal pair, because the energy that can achieve the ZVS condition is different in the two pairs of switches In general, in order to achieve zvs' this energy must be at least equal to the energy required to discharge the capacitor of the switch that is about to turn on and at the same time charge the capacitor of the switch that is turned off. At heavy load current, ZVS can mainly be stored in This is achieved by the leakage inductance of the transformer TR. When the load current decreases, the energy stored in the leakage inductance will also decrease, and the energy stored in the inductor Lc will increase. As for light load, Lc can be used to increase the load of the energy required for ZVS. In fact, where there is no load, this Lc will provide all the energy required to generate ZVS conditions. Therefore, if the value of Lc is chosen, With no load and maximum input voltage, zvs can be achieved, and zvs can be achieved over the entire load and input voltage range. If the capacitance of the transformer winding is ignored, the magnetizing inductance lmc required to achieve ZVS of the external switch in the implementation device of Figure 4 is L ^ c-ik ~ r 〇2) However, the inductance Le required to achieve the zvs of the inner switch in the implementation device of FIGS. 8 and 9 is

Lc ^ 128C // (13) where C is the total capacitance (parasitic and external capacitance, if any) of the corresponding switch pair through the main switch. It can be seen from Fig. 5 that the current l flowing through the magnetizing inductance lmc will cause an asymmetric current between the switches of the internal and external pairs in the implementation device of Fig. 4. As the name suggests, because in this electricity (available from equations (6) and (7)) -18- this paper size applies Chinese National Standard (CNS) A4 specifications (210 X 297 public directors) 561680 A7 _____ — Β7 V. Description of the invention (16), so the currents carried by the inner switches S2 and Ss are always higher than those of the outer switches Si and S4. It can be seen that asymmetric currents between the switches of the internal and external pairs also appear in the specific embodiments of Figs. In addition, if the current instability in the circuits of Figs. 4, 8 and 9 is so significant that the current flowing through the outer switches & and S4 is significantly different from the current L flowing through the inner switches \ and \, this The two pairs of switches will choose switches of different sizes, which will reduce the cost of implementing the device without sacrificing circuit performance. It should be noted that 'in the circuits of the present invention, since these circuits do not need to increase the leakage inductance of the transformer, or a large external inductance to store the energy required for zvs, the parasitic ringing on the secondary side is significantly reduced. Since the transformer in the circuit of the present invention can be completed with a small leakage inductance, the secondary ringing between the leakage inductance of the transformer and the interface capacitance of the rectifier can be greatly reduced. Any residual parasitic ringing can be reduced by small (low power) snubber circuits. Finally, because the voltage sources VCB1 = VIN / 4 and VCB2 = VIN / 4 in Figure 5 are implemented with capacitors CB1 and CB2, respectively, as shown in Figures 4, 8 and 9, you need to change the These capacitors are pre-charged to Vin / 4. As the name implies, the voltage of the capacitor which is not pre-charged is zero, which will cause the voltage to be unstable on the winding of the transformer during the initial period. This second-second instability can cause the transformer to saturate, which can cause excessive current in the primary side to damage the switch. Figure 10 shows an example of a pre-charge circuit. The pre-charging circuit in FIG. 10 is implemented with resistors RG1-RU. It should be noted that 'many other implementations of pre-charged circuits can be used with any circuit of the invention. • 19- This paper size is in accordance with Chinese National Standard (CNS) A4 (210X 297 mm) 561680 A7 B7 V. Description of the invention (17) It should be noted that the above detailed description is used to illustrate the specific and specific aspects of the present invention. The embodiment is not limited thereto. Many changes and modifications can be made within the scope of the invention. In addition, the present invention is not limited to a DC / DC converter, but can also be applied to a multi-bit quasi DC / AC inverter. -20- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

561680 A8 B8 C8 D8 VI. Patent Application Scope A soft-switching, fixed-frequency, three-level power converter with phase shift modulation, including: one input power source; four controllable switches connected in series An element adapted to be connected to the input power source, each of the controllable switching elements including a switch, an antiparallel diode across the switch, and a capacitor across the switch; a transformer having a A main winding and a primary winding; an inductor placed on the main side of the transformer, so that when one of the four controllable switching elements connected in series and the corresponding one of the inside switches open and close periodically during the same encounter When the voltage second product of one winding of the inductor is the maximum and the voltage second product of the windings of the transformer is the smallest, and when one of the four controllable switching elements connected in series, the outer switch and the corresponding When the inner switch is opened and closed periodically in reverse phase, the voltage second product of the winding of the inductor is the smallest and the voltage second product of the windings of the transformer is the largest; A plurality of capacitors are disposed on the main side of the transformer, provide a power source having a voltage of a portion of the voltage of the input power source, and are coupled to the four controllable switches so that a controllable switch that crosses a non-conducting The voltage is a part of the voltage of the input source; and an output circuit for coupling a load to the secondary winding of the transformer. 2. — A soft-switching, fixed-frequency, three-level power converter with phase-shift modulation, including: an input power source; -21-This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 mm) Binding 561680 A8 B8 C8 _____________D8______ 6. Scope of patent application Four controllable switching elements connected in series are suitable for connecting to the input power source. Each of these controllable switching elements includes a switch and a jumper. Anti-parallel diode and a capacitor across the switch; a transformer with a main winding and a primary winding; an inductor placed on the main side of the transformer, so that when the four in series are controllable and switchable When one of the outer switches of the component and the corresponding inner switch are periodically opened and closed in the same phase, the voltage second product of one winding of the transformer is the largest and the voltage second product of one winding of the inductor is the smallest. When the outer switch of the four controllable switching elements and the corresponding inner switch are periodically opened and closed in reverse phase, the voltage second product of the winding of the transformer is the smallest and the voltage of the winding of the inductor The second product is maximum; a plurality of capacitors are placed on the main side of the transformer and provide a voltage having a portion of the voltage of the input power source Source and is coupled to the four controllable switches, so that the voltage across the non-conductable controllable switch is a part of the voltage of the input source; and an output circuit for coupling a load to the secondary winding of the transformer . 3. The power converter according to item 1 of the scope of patent application, wherein the inductance of the inductor is selected so that the energy stored in the inductor is large enough to substantially enable each of the controllable switching elements to be turned on. The output capacitor is discharged so that the voltage across each of the controllable switching elements can be reduced substantially over the entire current range of the load at the instant of conduction. -22- This paper size applies to China National Standard (CNS) A4 (210X297 mm) " " ' Binding 561680 A8 B8 C8 D8 Patent Application Fanyuan 4. If the power converter of the first scope of the patent application, the inductor is configured as a coupled inductor with one of two windings connected in series, and the coupled inductor is selected. The magnetizing inductance of the transformer, so that the energy stored in the magnetizing inductance is large enough to substantially discharge the output capacitance of each of the controllable switching elements to be turned on, so that at the moment of conduction, across the controllable switching elements The voltage of each can be reduced substantially over the entire current range of the load. 5. The power converter according to item 丨 of the patent application scope, further comprising a capacitor for providing voltage-second balance of the windings of the transformer and the inductor. 6. The power converter according to item 1 of the patent application scope, further comprising a clamping diode, for limiting the voltage across the controllable switching elements to a part of the electrical waste of the input power source. 7. The power converter according to item 1 of the patent application scope, further comprising a plurality of resistors for charging the capacitors immediately after applying the power source to the power converter, so that the plurality of capacitors can provide The voltage required to maintain the voltage product of the windings of the transformer and the inductors. 8. The power converter according to item 1 of the patent application scope, wherein the main winding of the transformer is centrally tapped. 9. The power converter according to item 1 of the patent application, wherein the secondary winding of the transformer is centrally tapped. 10. The power converter according to item 1 of the patent application scope, wherein the output circuit is the full-wave rectifier. -23- This paper size is applicable to China National Standard (CNS) Α4 size (210 X 297 mm) 561680 8 8 8 8 A BCD 々, patent application scope 11 · If the power converter of the first patent application scope, where The output circuit is the current doubling device. 12. The power converter according to item 1 of the patent application, wherein the output circuit includes a wave filter. -24- The paper size is in accordance with the Chinese National Standard (CNS) A4 (210 X 297 mm)