TW558745B - Metal layer formation method - Google Patents

Metal layer formation method Download PDF

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Publication number
TW558745B
TW558745B TW91121423A TW91121423A TW558745B TW 558745 B TW558745 B TW 558745B TW 91121423 A TW91121423 A TW 91121423A TW 91121423 A TW91121423 A TW 91121423A TW 558745 B TW558745 B TW 558745B
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layer
metal layer
forming
metal
item
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TW91121423A
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Chinese (zh)
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Chi-Wen Liu
Ying-Lang Wang
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Taiwan Semiconductor Mfg
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Abstract

The invention provides a method for forming metal layer comprising the following procedures: providing a substrate having a dielectric with an aperture on the substrate; depositing a metal layer to fill the aperture; depositing an oxide isolation layer on top of the metal layer; moving the substrate deposited with the metal layer and oxide isolation layer to a temporary storage area waiting for schedule; and moving the substrate deposited with the metal layer and the oxide isolation layer out of the temporary storage area for planarization of the metal layer.

Description

558745558745

【發明領域】 於-種在丰莫ί ί Ϊ 形成金屬層的方&’特別係有關 扭化之_導體金屬化製程中’在對已沉積的銅層進行平 7 則的等待時間之内,保護銅層免於受到氧化的方 【發明背景】 鑲嵌 再以介電 電層上钱 以填滿上 得到一具 比起傳統 隨時保持 金屬導線 題,特別 式(damascene)製程有別於傳統先定義金屬圖案 層填溝的金屬化製程,其方法是先在一平坦的介 刻出金屬線的溝槽或介層窗後,再沉積一金屬層 述的溝=或介層窗,最後將多餘的金屬移去,而 有金屬镶嵌於介電層中的平坦結構。鑲嵌式製程 的金屬化製程具有以下優點:(1)可使基板表面 平坦;(2)可排除傳統製程中介電材料不易填入 間隙的缺點;(3)可解決金屬材料蝕刻不易的問 疋銅金屬的刻。 圖*: U克服傳統内連線的製程中接觸窗構造與導線 使得整個製程步驟極其繁複的缺點,目 ^ 9 出種雙鑲嵌(dual damascene)製程,其製作過 壬二仃兩次選擇性蝕刻,分別將導線介電質⑴μ d^\lectric)與介層窗介電f(vU 餘開後, ::二完金屬層與插塞的阻障層,並一次將導電金屬填入 ”曰囪口内連線溝槽’達到簡化製程步驟的效果。 择# 3 t匕ί配合疋件尺寸縮小化的發展以及提高元件 ”、又、而,,具有低電阻常數和高電子遷移阻抗的銅[Field of the invention] Yu-kind of the method of forming a metal layer in Feng Mo ί ί & 'especially related to the twisted _ conductor metallization process' within the waiting time of flattening the deposited copper layer Protecting the copper layer from oxidation [Background of the invention] Mosaic and then filling the dielectric layer to fill it up get a metal wire problem than the traditional keep metal wire at any time, the special (damascene) process is different from the traditional definition The metallization process of filling a trench with a metal pattern layer is performed by first engraving a metal line trench or an interlayer window, and then depositing a metal layer trench or interlayer window. The metal is removed and there is a flat structure with the metal embedded in the dielectric layer. The metallization process of the damascene process has the following advantages: (1) it can make the substrate surface flat; (2) it can eliminate the disadvantage that the dielectric material is not easy to fill the gap in the traditional process; (3) it can solve the problem of copper that is not easy to etch metal materials Carved metal. Figure *: U overcomes the shortcomings of the structure of the contact window and the wires in the traditional interconnection process, which makes the entire process extremely complicated. Objective 9: A dual damascene process has been produced, which has been selectively etched twice. , Respectively, the wire dielectric ⑴μ d ^ \ lectric) and the dielectric window dielectric f (vU after opening, :: two complete metal layer and the barrier layer of the plug, and filled with conductive metal at one time " The intra-oral connection trenches' achieve the effect of simplifying the process steps. Option # 3 t ί 疋 matches the development of the reduction in the size of the components and the improvement of the components ", and, yet, copper with low resistance constant and high electron migration resistance

JO/4:) 五、發明說明(2) 金屬’已逐漸被應用來作為 的鋁金眉制# & & &乍為至屬内連線的材質,取代以往 達到金屬的鑲嵌式内連線技術,不僅可 J内連線的縮小化並且可減. 士 了金屬銅蝕列不易的…音 間延遲’同時也解決 要的發展“ 因此已成為現今多重内連線主 充後Ξΐί單鑲嵌或雙鑲嵌的銅製程,在完成銅金屬的填 $後:2進行平坦化製程,以將介電層上多餘的金屬去 曝·二! 在行平坦化製程的等待時間内,冑常銅層都 二細ϊ Γ之下、:極易使銅層受到氧化。#別係-般所沉 、、’δ曰Ρ具有複晶的構造,由複數個晶粒(grain)與晶 "之^的晶界(grain boundary)所組成。而在晶界與銅層 大乳的表面相交之處的銅原子具有較高的表面能,使該 :的銅原子成為犧牲陽極,優先與大氣中的氧與水蒗氣反 到腐蝕。在常溫中所形成的銅的氧化物或氫氧化物 s 係為鬆軟、多孔質的物質,不但不能保護其下方的 ,原子,反而更容易吸附氧與水蒸氣而使腐蝕的作用沿著 2 ,層深人,有時候後續的平坦化製程也無法去‘這 ,沿^晶界深入銅層内部的氧化物、氫氧化物等腐蝕物 負這些腐餘物質不但會因例如增加内連線的電阻等效應 ,内j線的品質造成不良影響,而且更會造成後製程或成 品可^度的問題,例如:降低銅/擴散阻障層或銅/蝕刻終 止層等界面的附著力、在後續熱製程或產品的熱循環時強 化電遷移效應使連線產生突起(hi丨1〇ck)等問題,對製程 的良率與產品的可靠度等均造成極大的危害。 Ι^Π 0503-8484W;TSMC2002-0453;dwwang.ptd 第5頁 558745 五、發明說明(3) 因此在傳統的製程上,往往必須訂定 ;地規範上述在對已沉積的銅層的力 間,不能超過-個特定的時間值 專待時 但限定了生產線或生管人員調配產能的彈;的=格不 =上的複雜度。有時候因產能調度關係=因=了管 使知產品在對已沉積的銅層進行平坦化之,而 過上述生產規格的規範,而必須報廢或降間超 發生。 娜‘降級的情形還是會 【發明概述】 有鑑於此,本發明之目的係提供一 ’在對已沉積的銅層進行平坦化 製程中 護銅層免於受到氧化的方法: 保 質’而提升製程的良率與產品的可g層的内連線的品 而本發明之另—目的係提供一 ^ 對已沉積的銅層進行平坦化之前 體製私中,在 層免於受到氧化的方法;在 ,保護銅 的情形下,生產線或生營人: 良率與產品可靠度 大的彈性,且不必因為多訂:出::m ’能夠擁有較 上的複雜度。 疋出一則生產規袼而增加管理 為達本發明之上述目 層的方法,其包括下列步驟:::=;供:=成金屬 ί:ί槽ί介層窗的介電質層形成於上述基:上.3成 ;;述=或介層窗;沉積-氧阻障層覆H 述金屬層,&供一暫存儲區;將已沉積有上述金屬JO / 4 :) V. Description of the invention (2) Metal 'has been gradually applied as the aluminum gold eyebrow system # & & The connection technology can not only reduce the size of the internal connection, but also reduce it. Not only is the metal copper etching difficult, but the delay between sounds also solves the development at the same time. Therefore, it has become the main charge of multiple internal connections. Inlay or double-inlay copper process, after completing the filling of copper metal: 2 to carry out the planarization process to expose the excess metal on the dielectric layer · 2! During the waiting time of the planarization process, the usual copper The layers are both thin and thin: Γ: It is very easy to cause the copper layer to be oxidized. # 别 系-Generally settled, 'δay P has a structure of multiple crystals, which is composed of multiple grains and crystals. ^ Is composed of grain boundaries. And the copper atoms at the intersection of the grain boundaries and the surface of the copper layer with large surface have a higher surface energy, so that the copper atoms become sacrificial anodes, preferentially with the atmospheric Oxygen and water radon gas corrode. Copper oxides or hydroxides formed at room temperature The s series is a soft and porous material, which not only cannot protect the atoms below it, but also more easily absorbs oxygen and water vapor to make the corrosion effect along 2. The layer is deep, and sometimes the subsequent flattening process cannot go. 'This, the corrosion of oxides, hydroxides and other corrosive substances that penetrate deeper into the copper layer along the grain boundary negatively affects these residues. Not only will the effects of increasing the resistance of the interconnections, the quality of the internal j-lines, but also more Will cause problems in post-process or finished product, such as: reducing the adhesion of copper / diffusion barrier layer or copper / etch stop layer and other interfaces, strengthening the electromigration effect during subsequent thermal processes or thermal cycling of the product to make the connection Problems such as protrusions (hi 丨 10ck) cause great harm to the yield of the process and the reliability of the product. I ^ Π 0503-8484W; TSMC2002-0453; dwwang.ptd Page 5 558745 V. Invention Explanation (3) Therefore, in the traditional manufacturing process, it is often necessary to define; the above-mentioned ground force cannot be more than a specific time value for the deposited copper layer, and it only limits the deployment of production lines or production staff. Capacity The complexity of the = grid is not equal. Sometimes because of the capacity scheduling relationship = due to the management of the product to flatten the deposited copper layer, and passed the above production specifications, it must be scrapped or reduced. In the case of super-conversion, the situation of degradation will still occur. [Summary of the Invention] In view of this, the object of the present invention is to provide a method for protecting the copper layer from oxidation during the planarization process of the deposited copper layer: The quality of the product improves the yield of the process and the interconnectability of the product's g layer. Another object of the present invention is to provide a system that prior to flattening the deposited copper layer Oxidation method; in the case of protecting copper, the production line or the production personnel: the flexibility of yield and product reliability is large, and there is no need to order more: out :: m 'can have a higher complexity. A method for formulating a production plan and increasing management to achieve the above-mentioned objective layer of the present invention includes the following steps :: =; for: = metal forming: the groove dielectric layer is formed on the above. Base: 30% ;; == or interstitial window; deposition-oxygen barrier layer overlying the above-mentioned metal layer, & a temporary storage area; the above-mentioned metal has been deposited

Claims (1)

六 、申請專利範圍 1 · 一種 提供 於該基板上 沉積一 沉積一 將已沉 存儲區,等 將已沉 存儲區,平 2. 如申 其中該開口 3. 如申 其中該金屬 4. 如申 法,其中該 化學氣相沉 5. 如申 法,其中該 係數的介電 6. 如申 法,其中該 上述之任^ 7. 如申 法,其中平 形成金屬層 基板,具有 金屬層以填 氣阻障層覆 積有該金屬 待排程;以 積有該金屬 坦化該金屬 請專利範圍 為:介層窗 請專利範圍 層為銅層。 請專利範圍 氧阻障層係 積法所形成 請專利範圍 氧阻障層包 材料、或上 睛專利範圍 氧阻障層包 組合。 晴專利範圍 坦化該金屬 的方法,包拮下列步驟: 一已形成有〆關口的介電質層形成 滿該開口; 蓋該金屬廣, 層和該氧陴障層的該基板移入一暫 及 層和該氧陴障層的該基板移出該暫 層。 第1項所述之形成金屬層的方法, 、單鑲嵌溝横、或雙镶後溝槽。 第1項所述之形成金屬層的方法, 第1或3項所述之形成金屬層的方 以: 項 旋塗法 、物理氣相沉積法、或 第1或3項所述之形成金屬層的方 括:氮化梦、不含氧原子的低介電 述之任一組合。 第1或3項所述之形成金屬層的方 括:T a、u N、W、W N、T a S i N、或 第1或3項所述之形成金屬層的方 層的製程中,更包含去除該氧阻障Six, the scope of patent application 1 · A method of depositing a deposit on the substrate, a sinking storage area, etc., will be sinking the storage area, flat 2. If the application is in the opening 3. If the application is in the metal 4. As the application method , Where the chemical vapor deposition 5. As applied to the method, wherein the coefficient of the dielectric 6. As applied to the method, wherein any of the above ^ 7. As applied to the method, wherein a metal layer substrate is formed flat with a metal layer to fill the gas The barrier layer is covered with the metal to be scheduled; using the metal to accumulate the metal, the patent application scope is: the interlayer window, the patent application layer is a copper layer. Patented range formed by oxygen barrier layer integration method Patented range Oxygen barrier layer material, or patented oxygen barrier layer package combination. The method of patenting the metal is described in the patent, including the following steps: a dielectric layer having a barrier opening is formed to fill the opening; the substrate covering the metal layer and the oxygen barrier layer is moved into the Layer and the substrate of the oxygen barrier layer are removed from the temporary layer. The method for forming a metal layer described in item 1, a single damascene trench, or a double damascene trench. The method for forming a metal layer according to item 1, the method for forming a metal layer according to item 1 or 3: a spin coating method, a physical vapor deposition method, or the method for forming a metal layer according to item 1 or 3. Square brackets: any combination of nitriding dreams and low dielectrics without oxygen atoms. In the process of forming a metal layer according to item 1 or 3: T a, u N, W, WN, Ta S i N, or in the process of forming a metal layer forming a metal layer according to item 1 or 3, It also includes removing the oxygen barrier 0503-8484TW f;TSMC2002-0453;dwwang.p t d 頁 獨/450503-8484TW f; TSMC2002-0453; dwwang.p t d page alone / 45 法,其Ui 第1或3項所述之形成金屬層的方 Μ乳阻卩早層的厚度為1 ο ο A〜1 ο Ο Ο A。 法,其Hi 第1或3項所述之形成金屬層的方 亥乳阻卩早層的厚度為3 0 0 A〜40 0 A。 製程中〇.在—對種已”穑金丄層的方法,適用於-半導體金屬化 保讀綠加^已,儿積的銅層進行平坦化之前的等待時間内 ,、二、5層免於受到氧化的方法,包括下列步驟: 及提供一半導體基板,具有一銅層沉積於該基板上;1Method, wherein the thickness of the metal layer-forming early layer of the metal layer described in item 1 or 3 of Ui is 1 ο ο A to 1 ο Ο Ο A. The thickness of the method of forming a metal layer as described in item 1 or 3 of Hi is 3 0 A to 4 0 A. In the manufacturing process, the method of "gold layer" is suitable for-semiconductor metallization, green reading, and waiting time before the copper layer is flattened. The method for undergoing oxidation includes the following steps: and providing a semiconductor substrate having a copper layer deposited on the substrate; 1 沉積一氧阻障層覆蓋該金屬層。 11 ·如申請專利範圍第1 0項所述之形成金屬層的方法 ’其中形成該氧阻障層的方法包括:旋塗法、物理氣相沉 積法、或化學氣相沉積法。 1 2·如申請專利範圍第丨〇項所述之形成金屬層的方法 ’其中該氧阻障層包括:氮化矽、不含氧原子的低介電係 數的介電材料、或上述之任一組合。An oxygen barrier layer is deposited to cover the metal layer. 11 · The method for forming a metal layer as described in item 10 of the scope of patent application ′ wherein the method for forming the oxygen barrier layer includes a spin coating method, a physical vapor deposition method, or a chemical vapor deposition method. 1 2 · The method for forming a metal layer as described in item No. 丨 0 of the scope of the patent application, wherein the oxygen barrier layer includes: silicon nitride, a low-k dielectric material without oxygen atoms, or any of the above. A combination. 1 3 ·如申請專利範圍第1 〇項所述之形成金屬層的方法 ,其中該氧阻障層包括:Ta、TaN、w、WN、或上述之任一 組合。 1 4 ·如申請專利範圍第丨丨、1 2或1 3項所述之形成金屬 層的方法,其中該氧阻障層的厚度為1〇〇Λ~100〇Α。 15.如申請專利範圍第u、12或13項所述之形成金屬 層的方法,其中該氧阻障層的厚度為30QA~4〇()A1 3. The method for forming a metal layer as described in item 10 of the scope of patent application, wherein the oxygen barrier layer includes: Ta, TaN, w, WN, or any combination thereof. 1 4. The method for forming a metal layer as described in the scope of the patent application No. 丨, 12 or 13, wherein the thickness of the oxygen barrier layer is 100A to 100A. 15. The method for forming a metal layer as described in item u, 12 or 13 of the scope of the patent application, wherein the thickness of the oxygen barrier layer is 30 QA to 40 (A)
TW91121423A 2002-09-19 2002-09-19 Metal layer formation method TW558745B (en)

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