TW554440B - Method for forming conductor connect on SOI microstructure - Google Patents

Abstract

A method for forming a conductor connect on an SOI microstructure comprises: providing an SOI wafer including a component wafer, buried silicon oxide and clamped wafer; using a deep silicon etching technique to remove a portion of the component wafer to form a vertical sidewall trench and exposing a portion of the buried silicon oxide; forming a silicon oxide film or a photosensitive dry film on the surface of the component wafer, in which the component wafer is formed with a contact hole thereon; covering a conductor layer and filling up the contact hole; using a photo etching technique or a second photo-sensitive dry film to define the conductor layer to form a conductor connect; and removing the silicon oxide film or the photo-sensitive dry film and a portion of the buried silicon oxide, thereby completing a conductor connect on an SOI microstructure.

Description

554440

Field of the Invention: / The invention relates to a method of forming a conductor on a microstructure of S0 to apply it to micro-inertial sensing elements, optical micro-electromechanical components, etc., s: should be used in micro-structures with interdigitated differential sensing Micro-inertial sensing element 1 for capacitive design Background of the invention: According to the 'combination of 1 wafer (Silicon On Insulatr) and ^ technology (Deep Silicon Etch) has become the development of micro-electromechanical elements 2 emerging technologies, its application areas include optical micro Electromechanical components, such as micro-mirror mirrors, and micro inertial sensing elements, such as accelerometers and gyroscopes. Especially the capacitive micro inertial sensor, the S0I series can provide larger mass, block to increase the quality coefficient of the component, plus silicon deep etching technology c to provide high resolution and high aspect ratio vertical The trench formation method can improve the sensitivity of capacitance sensing. However, since the low groove difference of the vertical trench N after the formation of the S01 microstructure (after deep etching) is quite high, no further photoresist coating and exposure can be performed, so that a conductor line cannot be formed above it. In particular, the inertial sensing element by differential capacitance measurement needs to connect the pre-formed SO I microstructure by a conductor connection, so it is not possible to make a conductor connection above the s0! Microstructure using a conventional technique. . Therefore, the present invention proposes a method for forming a conductor line above a SiO microstructure in response to this deficiency.

554440 V. Description of the invention (2) Purpose and summary of the invention: The main purpose of the formation is to provide a microelectromechanical element above the S1 microstructure. ^: Can be directly connected to the micro inertial sensing element, light Learn to know; surgery, to form another purpose, is to provide a more sensitive measurement method on top of the S〇1 microstructure 'to enable the micro-sensing element after the completion of the production to provide the soil to achieve the above purpose' The invention is to first provide a SOI wafer 'pot = package 3 wafers, buried plutonium oxide, technology to remove some components, said ny Di Zhiri day 1BJ, Dan ’s buried oxidation workshop with silicon ice etching · Yuegu solid, A vertical sidewall trench is formed, and the exposed part is flattened. A silicon oxide film is formed on the surface of the element wafer to form ffi; a part of the oxide stone film is removed to expose part of the element crystallized. A conductor layer covers the surface of the oxygen cut film; the conductor is connected; the conductor layer is defined by photolithography to form ifcb gp τ I Μ T < remove the silicon oxide film and part of the buried oxide stone, In this way, a conductor line can be formed above the S (H microstructure. Further in ί ί In aspect, after the completion of the groove structure, the first light-sensitive dry film is formed on Weiguang #lime 7 face first, and a part of the first light-dried dry film is removed. A @ 2 $ wafer is used to form a contact hole; then the + # photosensitive dry film surface is formed and fills the contact hole; and then the golden dagger feels: == 2 after the part of the second photosensitive dry film, connect ; Finally remove and divide 'to define the conductor to take the silly mysterious first dry film, the second dry film and part of the buried

Description of drawing number: 10 silicon substrate 14 interdigitated electrode 18 fixed electrode 2 2 buried oxide stone 2 6 groove 3 0 contact hole 34 photosensitive dry film 3 8 photosensitive dry film 12 suspended mass 16 fixed electrode 2 0 conductor connection 24 Element wafer 28 Silicon oxide film 32 Conductor layer 36 Metal layer Detailed description: = The method for forming a conductor connection above the SOC microstructure will be described in detail using the ΐa micro-acceleration rule. Please refer to Fig.-A schematic top plan view of the accelerometer, and Fig. 2 is a sectional view of the first figure. Same as the same: if the first and second pictures of the if test are shown, the micro-acceleration gauge contains-= Λ; the floating f gauge block 1 2 'has a plurality of outward radial shapes, and the suspended mass of Wei 12 is composed of A few feet (not shown) ^ 疋 on the Shixi substrate 10 'and the counterpart corresponding to the interdigitated electrode 丨 4 are two sets of fixed electrodes 16 and 18', and each fixed electrode 18 is fixed across the fixed Electricity 554440 5. Description of the invention (4) --- The conductor connection 20 above the pole 16 is connected, and the material of the conductor connection 20 may be a polycrystalline silicon or amorphous silicon conductor with good conductivity, or a metal conductor. Therefore, two sets of fixed electrodes 16 and 18 and interdigitated electrodes 14 form two capacitance values C1 and C2 respectively (in design, C1 and [2 start values are the same). If the external inertia changes, such as the suspension in the figure When the mass mass 2 moves in the direction of the arrow, the capacitance value C1 increases and the capacitance value decreases. The capacitance characteristics C1 and the differential capacitance can be used to understand the motion characteristics of the suspended mass mass 12. Now, the manufacturing process of the present invention will be described with reference to the structure of the first diagram above. Please refer to the third (a) to the third (g) diagrams, which is a preferred embodiment of the present invention to form a conductor line above the SO I microstructure. A sectional view of the structure of each step; as shown in the figure, the main forming method of the present invention includes the following steps: As shown in Figure 3 (a), first, provide a s0] [wafer, from top to bottom Contains element wafer 24, buried silicon oxide 22, and mounted wafer (silicon substrate) 10. Then, the element wafer 24 is etched by Deep Silicon Etch. As shown in FIG. 3 (b), part of the element wafer 24 material is removed to form a vertical sidewall trench 26, thereby defining the first sidewall The geometry of the accelerometer is shown in the figure; at the same time, a part of the buried silicon oxide 22 is also exposed. The width of the vertical sidewall trenches 26 is between 1 and 5 micrometers (# m). The main consideration is the surface planarization operation in the next step. Please refer to the third (c) figure, and then use plasma chemical vapor deposition (PECVD) to form a silicon oxide material on the surface of the component wafer 24. Due to the narrow trench 26 design, PECVD silicon oxide cannot be used. Effectively deposited into the trench

554440 V. Description of the invention (5) The bottom of the groove 26 will only be near the surface of the element wafer 24. The PECVD oxygen cut on the H. stone microstructure will eventually be bonded to each other. 2; Please refer to the SEM photo shown in the fifth figure. The actual result 4 can cover the entire surface of the oxidation ^^ The width of the original narrow trench 26, Doudou when the fish *, Saicheng 0 ~ ~ depends on the degree of drought The above can reach ..5 times the width of the cover and the flat trench 26. Then, a part of the oxide stone is removed by photolithography. (D) As shown in the figure, the younger brother 30 of the element wafer 24 is exposed. After the production of the contact hole 30, the company has formed a contact hole-the conductor layer 32 covers the entire oxide stone film, and the film no longer touches the hole 30. The material of the material layer 32 can be polycrystalline stone, non-f stone. " (adhesion layer). Chromium metal is used as an adhesion layer. After forming the conductor layer 32, the photolithography technology layer 32 is used, as shown in the third diagram, to define / define the conductor. (g) As shown in the figure, removing the surface oxidation and buried oxide buckles of = can form the slightly accelerated and After the present invention completes the above manufacturing process, after removal, a single layer of emulsified silicon can be obtained above the SOI microstructure, and the manufacturing method of the present invention is more special in connection. Before the silicon oxide is shown to be removed ' You can repeat the manufacturing process shown in the second (g) diagram, and then form the second layer conductor Cc), and from the figure to the third I so I microstructure to form two or more layers of conductor wiring structure from this 554440

In addition to the above-mentioned manufacturing process, the present invention still has another manufacturing method. Please refer to Figures 4 (a) to 4 (b), for another embodiment of the present invention to form a conductor line above the S 01 microstructure. A sectional view of each step structure; As shown in the figure, the present invention includes the following steps: Please refer to n shown in the fourth (a) figure, provide a SOI wafer, and sequentially include the element wafer 24 from top to bottom , Buried silicon oxide 22 and crystalline substrate) 10. Then, the element wafer 24 is etched by silicon deep etching technology. As shown in FIG. 4 (b), a part of the element wafer 24 is removed to form a vertical sidewall trench 26, thereby defining the first diagram. The geometry of the accelerometer; at the same time, a part of the buried oxide stone is also exposed. Please refer to the fourth (C) diagram, and then use a similar printed circuit board manufacturing method, a commercial photosensitive dry film 34 (such as Hitachi = emicd Co. HN650 series products), using the hot pressing of the photosensitive film 34 / A polymer material can be easily formed on the surface of the element wafer 24. This month: Fast and easy tasks that cannot be achieved with traditional photoresist coating; moreover, the pressing method provides a -planarization process, which makes it easy to demand the flatness of subsequent fabrication of microstructures.臌 ... Some photosensitivity is removed by molecular laser processing (wavelength 248nm). As shown in Figure 4 (d), part of the silicon of the element wafer 24 is exposed to form a contact hole 30. In the process, excimer laser processing is one-phase: a fast way to remove the polymer photosensitive dry film 34 directly. ^ Common photoresist exposure and development complicated steps (including photoresist coating, exposure-free, development, fixing and Hard roast, etc.). grilled,

554440 V. Description of the invention (7) After the production of the contact hole 30 is completed, please refer to the formation-chrome / gold (Cr / Au) metal layer 36 to cover: (:) as shown in the figure and then fill the contact hole 30 , Where the complex GK34 table (adhesion iayer). _ Is an attached layer, and then as shown in the fourth (f) figure, another surface of the generic layer 36 is formed, and then the excimer laser is used to remove the dry film 38 shown in the fourth figure of gold to be exposed. Part of the network = film 38, as shown in the next figure (h), first use the 6th ^ 38 as the screen, remove the exposed part of the chromium / gold metal two, and ff dry film connection 20 shape. Then the fourth step is as follows: the photosensitive dry films 34 and 38 are guided; finally, as in the fourth step, the entire portion of the buried milk that is no longer removed is removed as shown in the fourth step. The micro-acceleration gauge structure shown in the second figure can be #, f μ +, and 去除, as shown in the fourth (1) figure, before removing the photosensitive dry film, the first to fourth (c) to fourth (h) figures The manufacturing process shown in the figure is to form a two-layer multi-layer conductor connection structure above the microstructure. a = This' The present invention can form a conductor connection directly above the SOI microstructure of the micro inertial sensor element, 70 optical micro-elements, etc., so it can solve the habit of making the missing = and make the micro The sensing element can provide more sensitive measurements. 1 The above-mentioned embodiments are only for explaining the technical idea and point of the present invention. The purpose is to enable those skilled in the art to understand the content of the present invention and implement it accordingly. It is not possible to limit the patent scope of the present invention. That is, all equal changes or modifications made in accordance with the spirit disclosed in the present invention should still be covered by 554440. 5. The description of the invention (8) is covered by the patent scope of the present invention. mm Page 11 554440

Brief description of the drawings Brief description of the drawings The first picture is a partial tilt of the electric valley-type micro-acceleration gauge of the present invention. Τ ^ See the figure. The second picture is a cross-sectional view of the first picture. The third (a) to the third (S) diagrams are sectional views of the structure of each step of the embodiment of the invention connecting the SOI microstructures. The fourth (a) to fourth (j) diagrams are schematic diagrams of another embodiment of the body wiring on the SOC microstructure of the present invention. 7 Guidance The fifth figure is the actual result of the SEM photograph of the SOI microstructure in the ancient times. #The formation of flat oxide stone above

Claims (1)

554440 VI. Application for Patent Scope 1. A method for forming an SOI microstructure: a method for forming a conductor connection, which includes buried oxidation; ε and to form a vertical, and provide a SOI crystal due to the narrow (a) Round, | wafers; Xiao Qi system includes component wafers, measuring and removing parts, component wafers, (θ and parallel parts of the buried oxide chip; component wafer surface formation == ;; bottom of the trench Only the part of the oxygen cutting film is removed at the formation, and the exposed part is formed in the shape of a wafer. The conductor layer covers the surface of the oxygen cutting film and fills the contact. The technology defines the conductor layer to form a conductor connection. (G) The silicon oxide film and part of the buried oxide stone are removed. The 2-body connection is above the microstructure of s 01 as described in item 1 of the claim range of the wire. A method for forming a conductor connection, wherein the width of the trench is between 5 μm. The method for forming a conductor connection over a microstructure as described in item 1 of the scope of patent application, wherein the oxidation Silicon materials are formed by using plasma deposition technology. 4. Scope of patent application The method for forming a conductor line above a soI microstructure as described in item 1, wherein the thickness of the silicon oxide film depends on the width of the trench. 'Preferably, it is more than 1.5 times the width of the trench. 554440 6. Apply for a patent Scope 5. The method of soi, wire as described in the scope of the patent application, item 1, wherein the material of the conductor layer is. Polycrystalline, polycrystalline or chrome / gold (Cr / Au ) Metal, wherein the chromium metal is the method of silicon I, Λ application patent scope item 1 above the so 1 microstructure / Λ ° body connection method, wherein the step ⑷ to step 形成 is formed above the step 进行In order to form a conductor connection with at least two layers, the following method can be repeated. The following method for forming a conductor connection over a microstructure includes burying silicon oxide and forming a vertical (a) SOI wafer. It consists of a component wafer placement wafer; (b) removing part of the device wafer wall trench by silicon deep etching technology, and exposing part of the buried silicon oxide; (c) covering the surface of the component wafer A layer of the first photosensitive dry film; (d) removing part of the first photosensitive dry film To form a contact hole in an exposed part; 卞 111 (e) forming a metal layer to cover the surface of the first photosensitive dry film, and filling the contact hole; (f) on the surface of the β-hai metal layer Forming a second photosensitive dry film and removing a part of the second photosensitive dry film to expose a part of the metal layer; (g) removing the exposed part of the metal layer to define the shape of the conductor wiring; and (h) Remove the first photosensitive dry film, the second photosensitive dry film, and a portion of the buried silicon oxide. 5. Form a conductive film over the soI microstructure as described in item 7 of the scope of patent application. 554440 VI. Scope of patent application-Ancient 4+ ι method of slowing down the body, where the first photosensitive dry film and the second photosensitive dry film are formed by Γ, knife material, and hot pressing method. Components on the component wafer. 2. The method for connecting S (H square micros) on the microstructure as described in item 7 of the scope of the patent application, wherein the metal layer is a chromium / gold (Cr / Au) metal layer, and the chromium metal is used as an adhesion layer 10. The method of forming a lead, a line above the soi microstructure as described in item 7 of the scope of patent application, wherein a part of the first photosensitive dry film is removed to expose a part of the element wafer to form a contact The pores are completed by excimer laser processing with a wavelength of 248 nm. 11. The method for forming a conductor line above the SO I microstructure as described in item 7 of the patent scope of Shenyin, wherein before step (h), Steps (c) to (g) can be repeated to form at least two layers of conductor lines.