TW552774B - Method and system for generating a continuous shaped wave form for transmission in a communication system - Google Patents

Abstract

Cycle-by-cycle synchronous waveform shaping is provided for by filtering and combining of square and/or impulse shaped signals. Specifically, a plurality of first square shaped signals is generated and filtered using at least one first filter to produce at least one filtered signal. A plurality of second square shaped signals is generated and filtered using at least one second filter to produce at least one second filtered signal. The at least one first and at least one second filtered signals are combined to produce a continuous shaped waveform having a characteristic shape within each of a plurality of data periods defining a data rate. Alternatively, at least one impulse signal having a plurality of sinusoidal impulses each comprising a positive impulse and a negative impulse is generated. The at least one impulse signal is filtered using at least one filter to produce the continuous shaped waveform.

Description

552774 A7

For inapplicability of rights to inventions made under federally sponsored research or development, refer to a "sequence list," a form, or a computer program appended to a disc drive. Background of the Invention This invention is generally about Techniques used for wave shaping and, in particular, techniques for shaping individual periods of a carrier wave. Wave shaping in the fundamental frequency band has been an important procedure in the transmission of communication signals, and is usually one in which it allows on a specific frequency band. Perform this wave shaping before transmitting modulation on one carrier to obtain a more effective bandwidth number k. Conventional modulation techniques used for modulation configurations such as frequency shift reporting (FSK) require appropriate processing for The multiple period of the carrier signal of the receiver is effectively locked and detected as a single symbol contained in the original signal. This technique also usually requires the phase of the modulated signal to be continuous. Because the symbol is extended on the multiple period of the carrier, it is used for transmission. Signals that utilize one of these conventional techniques do not need to perform wave shaping on a cycle-by-cycle bias. However, in The general § number represents that each time the correlation is low, or even if it is only a symbol of one period of the carrier, the shaping of the individual periods of the carrier becomes necessary. In addition, 'it can still require that the phase of the modulated signal is continuous. SUMMARY OF THE INVENTION Filtering and grouping by square wave and / or pulse shaping signal -4- ------ This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 552774 A7

Synchronous wave shaping: ", generating a complex first-square wave shaping letter: Fu Zhaoyi at least one first filter filters to generate at least -filtered signals. Generate square wave shaped signals and use at least` `second filtering H skin production '' section A filtering k number. The at least one first and at least one second 4, wave L numbers are combined to produce a continuous forming wave with a definition of-data ratio-characteristic shaping-within each data period of a complex data period. In one embodiment, the continuous shaping wave system has a frequency shift report (FSK) signal of one of the first and second frequencies, wherein the first square wave shaping signal and the at least one first filter are related to the first frequency, Among them, the second square wave shaping signal and the at least one second filter are related to the second frequency. In addition, at least one pulse signal is generated with a complex sinusoidal pulse, each of which includes a positive pulse and a negative pulse. The The at least one pulse signal is filtered using at least one filter to generate the continuous shaped wave. In one embodiment, a square wave shaped signal is differentially combined with a delayed version of the square wave shaped signal to generate at least one The sinusoidal pulse. Brief description of the figure. Figure 1 illustrates that a frequency shift report (FSK) signal can be generated using a specific technique for cycle-by-cycle synchronous wave shaping. Figure 2 illustrates one of the invention's F s κ cycle-by-cycle synchronous wave shaping. An embodiment of the circuit. Figure 3 is a block diagram of one of the FSK cycle-by-cycle synchronous wave shaping circuits. Figures 4A, 4B, 5A, and 5B represent a variety of filters that are differentially combined to produce an ideal FSK cycle-by-cycle synchronous wave. The time-domain curve of the signal. Figure 6 represents the ideal FSK generated weekly by the implementation shown in Figure 3 __ -5- This paper size applies to China National Standard (CNS) A4 specifications (210X 297 mm)

Binding

552774 A7 B7 V. Description of the invention (3) " --- Time-domain curve chart of the synchronous wave. Fig. 7A is a functional diagram of a convolution program used in the second embodiment, which is one of the cycle-by-cycle synchronization and forming circuits related to the present invention. 7B and 7C illustrate examples of how a convolutional procedure shown in FIG. 7A can be used to generate a frequency shift report (FSK) or a binary frequency shift report (BpsK) signal. FIG. 8 is a block diagram of a second embodiment 800 of a cycle-by-cycle synchronous wave shaping circuit that generates a BPSK signal according to the present invention. FIG. 9 is a time-domain graph representing an ideal 31 × 1 cycle-by-cycle synchronous wave generated by the execution shown in FIG. 8. Detailed description of the invention Fig. 1 illustrates that a frequency shift report (FSK) signal can be generated using a specific technique for cycle-by-cycle synchronous wave shaping. This technique generates a FSK signal by transmitting a mixed square wave through a low-pass filter. Within each predefined frame, the mixed square wave is one of a lower frequency square wave or a higher frequency square wave. Therefore, the filtered output represents a FSk signal. However, because mixed square waves include both lower and higher frequency square waves, a single low-pass filter is not sufficient. This is because the tuned wave of the lower frequency square wave is not removed. Therefore, the tuned wave interference of the lower frequency square wave is provided with an output " [Lu's souther frequency element. As shown in Figure 1, this method produces a distorted F SK signal. The following discussion discusses a more efficient method for forming cycle-by-cycle synchronous waves. Fig. 2 illustrates an embodiment 200 of an FSk cycle-by-cycle synchronous wave shaping circuit according to the present invention. The circuit 200 generates a data period containing 292, 294, and 296 -6-This paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 mm) 552774 A7 ___ B7 V. Description of the invention (4) " ~ 一" " and one of the clear data periods of 298 FSK cycle-by-cycle synchronization wave 29. Generates four simultaneous digital digits 201, 202, 203, and 204. The digital signals 201 and 202 have a period in which the signal step is transmitted from a high step to a low step, or a length τ of a speech syllable. The digital signals 203 and 204 have a period in which the signal step is transmitted from a high step to a low step, or a length T / 2 of a speech syllable. Digital signals 201, 202, 203, and 204 can be generated using digital logic, a processor, or other implementation. The digital signal 20 1 passes through a digital block unit 2 and a low-pass filter 22 1 ′ to generate a filtered signal 23 1. The digital signal 202 passes through a digital block unit 212 and a low-pass filter 222 to generate a filtered signal 232. The digital signal 203 passes through a digital block unit 2 1 3 and a low-pass filter 223 'to generate a filtered signal 233. Finally, the digital signal 204 is passed through a digital block unit 214 and a low-pass filter 224 to generate a filtered signal 234. The digital block units 2 1 1, 2 1 2, 2 1 3, and 2 1 4 each remove a DC element from each of the digital signals 201, 202, 203, and 204. The filtered signals 23 1 and 232 are combined in a combiner 242 to generate a first combined signal 252. The filtered signals 233 and 234 are combined in a combiner 244 to generate a second combined signal 254 ° The first combined signal 2 5 2 is actually a zero signal in a well-defined region. For example, in an explanatory area "A", it is desirable that there is a 180 degree phase difference between the digital signals 20 1 and 202. Therefore, the filtered signals 23 1 and 232 which are related to the digital signals 20 1 and a 202, when they are combined in the combiner 242, obviously cancel each other out in the explanation area "A". Therefore, the first combined signal 252 is actually a zero signal in the area "A". On the other hand, the Chinese paper standard (CNS) A4 (210 X 297 mm) 552774 A7 B7 is applied to the paper size. 5. Description of the invention (5 The 'combined signal 254 in the same area is an amplified signal. That is, in In the area "A", there is ideally a phase difference of 10 degrees between the digital signals 203 and 204. Therefore, its filter signals 233 and 234 related to the digital signals 203 and 204 are connected to the combiner 244. In the combination, in the area "A," it is obvious that each other strengthens the mouth 0. Similarly, the second combination signal 254 is actually a zero confidence signal in one of the other areas. For example, in a description area "B", The signals 203 and 204 ideally have a phase difference of 80 degrees. Therefore, the filtered signals 233 and 234 related to the digital signals 203 and 204 are combined in the combiner 244 in the area "B ,, medium Obviously cancel each other. Therefore, the second combined signal 254 is actually a zero signal in the region "B,". On the other hand, in the same region, the combined signal 252 is an amplified signal. That is, in the region " B ", in the digital Ideally, there is a 0-degree phase difference between No. 201 and 202. Therefore, the filtered signals 231 and 2 32 related to the digital signals 201 and 202, when they are combined in the combiner 242, in the area "B ,, medium Obviously increase each other. The first and second combined signals 252 and 254 are combined with each other in a combiner 260 to form an FSK with an obvious data period including data periods 2 9 2, 2 9 4, 2, 9 6 and 2 9 8 Cycle-by-cycle synchronization wave 290. Note that the data periods 292, 2 94, and 298 are related to the area in which the first combined signal 252 is configured with a signal having a length of one period, and the second combined signal 2 5 4 is configured with a valid zero signal. Note also that the data period 296 is related to the area where the second combined signal 254 is configured with one of the two periods of each length T / 2, and the first combined signal 252 is configured with an effective zero signal. -8- This paper Applicable to China National Standard (CNS) A4 specification (210 X 297 mm) 552774 A7

FIG. 3 is a diagram 300 executed by one of the FSK cycle-by-cycle synchronous wave shaping circuits 2000. This implementation generates a period of a signal with a representative bit, a frequency of f "-a period with -I / f. Period), and a frequency f" -period 4 with a representative-bit "0". -M period) two periods of one signal. Here, A is twice the frequency of fQ. A delay locked loop (DLL) circuit 302 receives a raw data signal 304 and a synchronous clock signal 306 and performs a function of checking the clocked raw data number 304 for entry. The DLL circuit 302 outputs a Sync clk signal 308, two Sync data signals 310, and a 2x Sync Clk signal 312. Sync cik signal 308 has a frequency equal to a data ratio of Sync data signal 3 10. & Sync Clk signal 312 has a frequency that doubles the data ratio of Sync data signal 31. Both the clock signals 308 and 312 are provided with a data signal 31. Synchronization.

Sync Clk signal 3 08, Sync data signal 310, and 2x Sync Clk signal 3 12 are input to a combination logic circuit 314, which generates a low Dout signal 321, a low Clk signal 322, a high Dout signal 323, and a high Clk signal 3 24, low Dout signal 321 passes a coupling capacitor 331 and a low-pass filter 341 to combine a filtered signal 351, and low Clk signal 322 passes a coupling capacitor 3 3 2 and a low-pass filter 3 42 to combine one Filtered signal 3 5 2. The high Dout signal 323 passes through a delay block 326, a coupling capacitor 333, and a low-pass filter 343 to combine a filtered signal 3 53. The high Clk signal 324 passes through a delay block 328, a coupling capacitor 334, and a low-pass filter 344 to combine a filtered signal 354. Note that the low Dout signal 321 and the low Clk signal 322 are commonly used to refer to ___ ^ This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) 552774 A7 ______ B7 V. Description of the invention (7) The period of the lower frequency f0 signal of "1". However, in this implementation, the low Dout signal 321 carries information about the position of bit "1" alone. The low Clk signal 322 is only a clock signal synchronized with the low Dout signal 321. However, in the combination with a low Dout signal 321, a low Clk signal 322 is used to ensure that the clock span of the non-zero value of one of the digital signals 321 or 32 will be mostly 2Tl, of which Tl is the clock span between the two possible transitions between the digital signals 32 and 32. Similarly, the 'high Dout signal 323 and the high Clk signal 324 collectively represent the period of the lower-frequency fi signal used to indicate the bit "0,". The high Dout signal 323 alone carries information about the position of the bit "0,". The high Clk signal 324 is only one of the clock signals provided with A Dout No. 323 synchronization. Use two signals in the combination to ensure that the clock span of a non-zero value on one of the digital signals 323 or 324 will be mostly 2TH, where TH is on one of the digital signals 323 or 3 24 The clock span between the two possible transitions. Also consider that the low-pass filters 34 1 and 3 42 together form a low-pass filter group 1, where each filter has a pulse wave related to the digital signals (low Dout signal 321 and low Clk signal 322) that they serve. The cutoff frequency is one of the frequencies l / 2TL. The filter states 3 4 3 and 3 4 4 together form a low-pass filter group 2 in which the parent filters have the pulse wave frequency of the digital signals (high Dout signal 323 and 咼 Clk signal 324) related to their servos. Cut-off frequency of 1/2 TH. Therefore, the low-pass / wave filter 3 2 1, 3 2 2, 3 2 3 ′, and 3 2 4 appropriately reduce the number of tuned waves in the number # of the filter and wave. Low-pass filters 3 2 1, 3 2 2 '3 2 3, and 324 such as analog infinite response impulse response filters can be implemented. Either a Bidford filter or a Bessel filter can be used. In a preferred embodiment, low-pass filtering is performed. -10-This paper size is applicable to China National Standard (CNS) A4 specifications (210: 297 public duplicates ^---552774 A7 ___B7 V. Description of the invention (8) wave device such as Gaussian filter, which helps to reduce the distortion in the adjacent pulses of the filtered signal. It is used between the delay related to low-pass filter group 1 and the delay related to low-pass filter group 2. To compensate for the difference, use delay blocks 326 and 328 to increase the delay to high Dout signal 323 and high Clk signal 324. Delay blocks 326 and 328 can be performed, such as adjustable integer bit delay, a long transmission path or line, 4 others. To FIG. 3, the filtered signals 3 5 1 and 3 5 2 are differentially combined in a differential combiner 3 60 to generate a first differential combined signal 364. Each representative is related to a bit "0, In the area of one data period, the filtered signals 3 5 丨 and 352 cancel each other in the differential combiner 360, and the first differential combined signal 364 is effectively a zero signal in the area. Similarly, the filtered signals 353 and 354 Tied in a differential combiner 362 to produce a first differential Combined signal 3 6 8. In the area where each representative is related to one data period of one bit “1”, the filter, wave number 3 5 3 and 3 5 4 cancel each other out in the differential combiner 3 6 2, And the second differential combination signal 3 6 8 is effectively a zero signal in the area. Brother and brother-differential combination 彳 § 5 Tiger 3 6 4 and 3 6 8 are differentially connected to each other in a differential combiner 3 70 Combine to produce ideal FSK cycle-by-cycle synchronization wave 29. Note that because multiple signals are transmitted in a differential mode, differential combiners 36, 3 62, and 3 70 are used, which allow noise rejection and format of sine waves. Improvement. The differential transmission in this embodiment is achieved by using the combinational logic circuit 314 to appropriately control the priority of the low Dout signal 321, the low Clk signal 322, the high Dout signal 323, and the high Clk signal 324. It should be noted that Figure 3 illustrates the generation of a FSK cycle-by-cycle synchronization wave, which can be--11 _ This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 public directors) ----- 552774 A7 B7 V. Description of the invention (9) Generate a binary phase shift report (BPSK) by using the same implementation or by generating In-phase and other types of phase-shifted transmission (PSK) phase-synchronized waves of digital signals that are in-phase and filtered and / or combined with this digital signal. Figures 4A, 4B, 5A, and 5B represent the 290 cycle-by-cycle synchronization waves for generating the ideal FSK The time-domain curves of the various filtered signals of the differential combination. Figures 及 A and 4B respectively represent the filtered signals 351 and 352. Note that these two signals are described by the clock degree TL. 5A and 5B represent the filtered signals 3 53 and 3 54 respectively. Note that these two signals are described by the clock span Th. FIG. 6 is a time-domain curve diagram of an ideal FSK cycle-by-cycle synchronization wave 290 generated by the circuit shown in FIG. 3. Fig. 7A is a functional diagram of a convolution program used in a second embodiment 800 (Fig. 8) of a cycle-by-cycle synchronous wave forming circuit of the present invention. A data pulse wave 702 and a delayed data pulse wave 704 are differentially combined in a differential combiner 706 to produce a pulse pair 710 having a positive pulse 712 and a negative pulse 714. The delayed data pulse 704 is delayed by a clock with respect to the data pulse 702 but is used to decompose the data pulse 702. The data pulse can be generated by digital logic, a processor, or other implementation. 2 and delayed data pulse 704. The data pulse 702 and the delayed data pulse 704 overlap in one period of length T / 2-Ts. In the differential combination, the data pulse wave 702 and the delayed data pulse wave 704 cancel each other out in this overlapping period, and the non-overlapping portions of the pulse waves 702 and 704 form a positive pulse 7 of a pulse pair 7 1 〇 2 and negative pulse 7 14 ° The pulse pair 7 1 0 is provided with a Gaussian filter 720 convolution in the time domain to generate a sine pulse 730 having a positive half period 732 and a negative half period 734. -12 The paper size is suitable for financial and domestic materials (CNS) (M specifications (㈣χ 撕 公 董))

Binding 552774 A7 ____B7 V. Description of the invention (10 ~~ '~-The positive pulse 712 of the pulse pair 710 generates its positive half period 732 of the pulse response of the Gaussian filter 72. The negative pulse 7 of the pulse pair 710 generates its decomposition The negative half-cycle 734 of the negative impulse response of the Gaussian filter 720. The 720 has a small impulse response and a smaller oscillating nature compared to other wavelet designs. The Gaussian filter 720 can also be understood in the form of an LC circuit. However, also Other types of filters such as Bidford or Bessel filters can be used. Figures 7B and 7C illustrate how the convolutional procedure shown in Figure 7a can be used to generate a frequency shift report (FSK) or one or two, respectively. An example of a Carry Frequency Migration Report (BPSK) signal. The convolution routine shown in Figure 7A can be highly controlled and accurate to generate a sinusoidal pulse in a specific clock. By generating and Overlapping appropriate sinusoidal pulses can generate appropriate data modulation signals such as FSK and BPSK signals. Figure 7B illustrates that by continuously having 2T pulses with two sinusoidal pulses each having a length of T A part of a length of a sinusoidal pulse generates a part of an FSK signal. FIG. 7C illustrates that one of a length of a sinusoidal pulse having a length of T having other sinusoidal pulses having T but having a length in the opposite direction of the amplitude can be generated. A part of the bpsk signal. Figure 8 is a block diagram of a second embodiment 800 of a cycle-by-period synchronous wave shaping circuit for generating a BPSK signal according to the present invention. Here, two clearly sinusoidal pulse waves 802 and 804 are in the clock. Generate and differentially combine at a specific position to form part of an ideal BPSK cycle-by-cycle synchronous wave 806. Although only the sinusoidal pulse waves 802 and 804 are disclosed in FIG. 8, it should be understood that other devices are provided before the sinusoidal pulse waves 802 and 804. , Or even differential sinusoidal pulse systems are overlapping -13- This paper size applies Chinese National Standard (CNS) A4 (210 X 297 mm) 552774 A7 B7 V. Description of the invention (11) Combination to form BPSK Other parts of the periodic synchronization wave 806. Refer to FIG. 8 'A digital signal 810 includes a data pulse of length T generated and provided in the circuit 800. A gate function block 8 1 1 receives a digital signal 8 1 0 and A clock signal 812, which has a pulse length of T / 2 and is provided with a digital signal 8 1 0 synchronization. The gate function block 8 11 outputs a half-cycle signal 8 丨 3. In this method, each of the digital signals 8 1 0 Each data pulse represents the extraction of a bit '1' (or bit 'high') and reduction to a half duty cycle to generate a half-period signal 813. A delay block 814 receives the half-period signal 813 and guides one of Ts to delay, And generating a delayed half period signal 8 1 5. The half period signal 8 1 3 and the delayed half period signal 8 1 5 are differentially combined in a differential combiner 8 1 6 to generate a pulse pair signal 818 ° digital signal 810 series A converter 819 converts to generate a converted digital signal 820. A gate function block 821 receives a converted digital signal 820 and a clock signal 5 812, which has a pulse length of T / 2 and is equipped with a digital signal 820 synchronization. And the gate function block 8 11 outputs a half-cycle signal 823. In this method, each data pulse in the digital signal 810 represents the extraction of one bit '0, (or bit' low, ') and reduction to a half duty cycle to generate a half period signal 823. A delay block 824 receives the half-cycle number 823, guides one of Ts to delay, and generates a delayed half-cycle signal 825. The half-period signal 823 and the delayed half-period signal 825 are differentially combined, and the combiner 8 2 6 is differentially combined to generate a pulse pair signal 8 2 8. A pulse regenerating circuit 830 receives the pulse pair signals 8 and 8 and generates a regenerated pulse pair signal 832. Similarly, a pulse regenerative circuit 84 receives a pulse pair U Tiger 828 and generates a regenerated pulse pair signal ⑷. In a clear situation, the pulse pair signals 818 and 828 may not have the proper #pulse letter A4 specification (210X29:; ----. 552774) V. Description of the invention (the common signal step and / or format of the 12th. For example Related to the digital signals 813, 815, ⑵, and ⑵, which are generated by providing these signals through the digital data buffer, the low-slow ratio can cause the pulse to the signal 818 and the positive and negative pulses-"tailing, Therefore, these positive pulses and negative pulses can lock the ordinary signal steps and / or formats. The pulse regenerating circuits 83 and 840 measure the signal steps and / or regenerate the pulse signals such as 如 and ⑷. The characteristic corrects this problem so that they have appropriate pulse signals. A differential combiner 854 receives the regenerated pulse pair signals ⑴ and ⑷ and generates a combined regenerated pulse pair signal 852. One Gaussian wave generator 854 receives the combination Regenerate the pulse pair signal 852S and produce: BPSK cycle-by-cycle synchronous wave In addition, it can be individually filtered and then differentially combined to regenerate the pulse pair signal 832 and regenerate the pulse pair signal ⑷. In this It shape, It requires two Gaussian wave filters. Figure 9 represents the time-domain curve of an ideal BPSK cycle-by-cycle synchronous wave generated by the implementation shown in Figure 8. It should be noted that Figure 8 illustrates the generation of a BPSK cycle-by-cycle synchronous wave. It is possible to use an identical implementation to generate a FSK cycle-by-cycle synchronous wave by generating pulse pairs and chirps related to different frequencies and / or combining such pulse pairs. Although the project description of the fixed embodiment of the present invention is described by those skilled in the art, It will be understood that the scope of the present invention is not limited to the description of specific embodiments. Therefore, the description and drawings are focused on-description rather than a limiting idea. However, additional, deleted, substituted, and other modifications will obviously not be left without leaving The broader spirit and scope of the present invention proposed by the scholars in the red circle of the declared patent was completed. -15 The paper is suitable for ^ i __ (CNS) A4 specification (2ι〇χ297)

吣 12276j3 in Chinese

Application (May 1992) A7 B7 V. Description of the invention (13 Symbol description of main components 200 Circuit 290 201 Synchronous digital signal 292 202 Synchronous digital signal 294 203 Synchronous digital signal 296 204 Synchronous digital signal 298 211 Digital block unit 302 212 Digital block unit 304 213 Digital block unit 306 214 Digital block unit 308 221 Low-pass filter 310 222 Low-pass filter 312 223 Low-pass filter 314 224 Low-pass filter 321 231 Filtered signal 322 232 Filtered signal 323 233 Filtered signal 324 234 Filter signal 326 242 Combiner 328 244 Combiner 331 252 First combined signal 332 254 Second combined signal 333 260 Combiner 334 Synchronous wave data period data period data period data period delay lock loop circuit enters the original data signal asynchronous clock signal Synchronous clock signal Synchronous data signal Twice Synchronous clock signal Combination logic circuit Low dout signal Low elk signal High dout signal South elk signal Delay block Delay block Coupling capacitor Coupling capacitor Coupling capacitor Coupling capacitor -16- This paper size applies to China Standard (CNS) A4 size (210 X 297 mm) 552 774

Patent application page (May 1992) A7 B7 V. Description of the invention (14 341 Low-pass filter 734 Negative half-cycle 342 Low-pass filter 800 Circuit 343 Low-pass filter 802 Sine pulse 344 Low-pass chirper 804 Sine pulse 351 Filter signal 806 Sync waveform 352 Filter signal 810 Digital signal 353 Filter signal 812 Clock signal 354 Filter signal 816 Combiner 360 Combiner 818 Pulse pair signal 362 Combiner 819 Converter 364 Combined signal 820 Convert digital signal 368 Combined signal 824 Delay Block 370 Combiner 826 Combiner 702 Data Pulse 828 Pulse Pair Signal 704 Delayed Data Pulse 830 Pulse Regeneration Circuit 706 Differential Combiner 832 Pulse Pair Signal 710 Pulse Pair 840 Pulse Regeneration Circuit 712 Positive Pulse 842 Pulse Regeneration Generate signal 714 Negative pulse 850 Gaussian filter 720 Nansian filter 854 Gaussian filter 730 Sine pulse wave 860 Gaussian filter 732 Positive half-cycle 870 Combiner-17- This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm)

Claims (1)

55-2774 1. A method for generating in a communication system for transmission, the method comprising: <% generating a complex first square wave shaping signal; using at least a first filter to waverch the first square wave Shaping the letter to generate at least one filtered signal; generating a complex one-wave shaped signal; using at least-a second filter to chirp the second square wave to generate at least a second filtered signal; and combining the at least-first and At least _ the second filtered signal is a continuous shaped wave that has a characteristic waveform in each data period of the definition-data ratio complex number: period. ? 2. A method as claimed in claim β, wherein the first filtering significantly eliminates the other in at least one of the data periods. 1 3. The method according to item 2 of the scope of patent application, wherein the second filtering significantly eliminates the other of at least one of the data periods. 'H 4 · The method according to item 丨 of the scope of patent application, wherein the continuous shaping wave system y has at least one of a first and a second frequency frequency shift report (fsk) number 1, where the first square wave shaping signal And the at least one first filtering! Corresponds to the first frequency, and the second square wave shaping signal and at least one second filter correspond to the second frequency. 5. The method according to item 1 of the scope of patent application, wherein the first and second parties; shaped signal coefficient bit signals. 6. The method according to the first item of the patent application, wherein the first and second i-shaped signals are synchronous signals. This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) A BCD 552774 VI. Patent application scope 7 · If the method of the first patent scope application method, further includes shaping signals from the first and second square waves One step of removing the DC element. 8. The method according to item 1 of the patent application scope, further comprising the steps of: combining the first square wave shaped signal before the step of filtering the first square wave shaped signal; and before filtering the first square wave shaped signal; Before the step of forming the square wave signal, the second square wave forming signal is combined. 9. The method of claim 8 in which the first filtered signal significantly eliminates the other in at least one of the data periods. 1 0. The method of claim 9 in which the second filtered signal significantly eliminates the other in at least one of the data periods. 1 1 · The method of claim 1, wherein the at least one first filtered signal and the at least one second filtered signal are differential combinations. 1 2 · The method according to item 8 of the scope of patent application, wherein the first square wave shaping signal is a differential combination and the second square wave shaping signal is a differential combination. 13. The method according to item 1 of the scope of patent application, wherein the first and second filters are Gaussian, Besser, and / or Bidford filters. 14. The method according to item 1 of the scope of patent application, wherein the continuous shaping wave is a phase shift signal (PSK) signal. 15 · The method according to item 14 of the patent application range, wherein the PSK signal is a binary phase shift report (BPSK) signal. 1 6 · —A system for generating a continuous shaping wave for transmission in a communication system, the system comprising: a device for generating a complex first square wave shaping signal; (CNS) A4 size (210X297 mm) 552774 Patent application scope A The BCD state uses at least one device to generate at least one filtered signal; one device to generate a complex second square wave shaping signal; and uses at least one second filter to filter the second party A device for wave shaping No. 4 'to generate at least one second filtered signal; and a device for combining the at least one first and at least one second filtered signal to generate the continuous shaped wave, the wave being defined_data Ratio; each data period has a characteristic wave 3 in each data period, a method of generating a continuous shaping wave for transmission in a communication system, the method comprising: generating at least one with a complex sinusoidal pulse A pulse signal, each sine pulse includes a positive pulse and a negative pulse; and, using at least one filter to filter the at least one pulse signal to generate the continuous shaping wave, which defines a plurality of data ratios The data has a characteristic waveform in each data period. 1 8 · If: the method of item 17 of the patent scope is further included, a step of combining the pulse signals before the filtering step a. 19. The method according to item 17 of the patent, further comprising a step of combining the pulse signal after the filtering step. 2 〇 The method according to item 17 of the patent application scope, wherein at least one of the sinusoidal 1 pulses is generated by a delayed version differential group # square wave shaping signal provided with one of the square wave shaping signals. 2 1 · The method of claim 20 in the patent scope, where the square wave forming letter -3- This paper size is IKEA M size (2iQx four off) A B c D 552774 6. Patent application scope Coefficient bit signal. 22. The method according to item 20 of the scope of patent application, wherein the square wave shaping signal is a synchronization signal. 23. The method of claim 18 or 19, wherein the pulse signal is a differential combination. 24. The method of claim 17 in which the filter is a Gaussian, Besser ' and / or Bidford filter. 25. The method of claim 17 in which the continuous shaping wave is a phase-shifted signal (PSK) signal. 26. The method of claim 27, wherein the PSk signal is a binary phase shift report (BPSK) signal. 27. The method of claim π, wherein the continuous shaping wave is a frequency shift signal (FSK) signal. 2 8 · —A system for generating a continuous shaped wave for transmission in a communication system, the system comprising: a device for generating at least one pulse signal having a complex sinusoidal pulse, each of the sinusoidal pulses comprising a positive A pulse and a negative pulse; and a device for filtering the at least one pulse signal using at least one filter to generate the continuous shaped wave, the wave having within each data period of a plurality of data periods defining a data ratio A characteristic waveform -4- This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 mm)