TW548696B - Method of manufacturing group III nitride compound semiconductor - Google Patents

Abstract

This invention provides a method of manufacturing a group III nitride compound semiconductor where pit is reduced. It is assumed that a group III nitride compound semiconductor layer 31(a) having pit P is formed due to the presence of a certain small area S. When the epitaxial growth is once stopped and the substrate temperature is raised to the constant temperature, the surface of the group III nitride compound semiconductor after the epitaxial growth is activated to exhibit the so-called mass-transport. The assumed reason is that the group III nitride compound semiconductor moves to the area near the peak point S (the lowest part) of the inverted hexagonal pyramid having impeded the epitaxial growth (b). When the bottom S of pit (the peak point of the inverted hexagonal pyramid) is once covered in the profile of lateral growth with the group III nitride compound semiconductor (c), the group III nitride compound semiconductor 32(d) is quickly formed in the recessed area through the epitaxial growth by starting again the supply of the group III source and nitrogen source. As a result, extremely flat surface (c) can be formed.

Description

548696

548696 V. Description of the invention (2) Borrowing of rich substrates that have not been completely cleaned, or the growth conditions are not optimal, etc .: 'In the situation of Tian, also ί Ⅱ ”marks ..., may still not be formed Single knot lice compound semiconductor compound nr private trace belongs to 矜 + ρ β ν Even if such substrates are cleverly dyed or hurt compounds Γί2: It is a group 111 nitride-based thick film stone that does not form a single crystal. The group m gaseous compound semiconductor is imaged, and the semiconductor group nitride compound is semiconducting.

U-1 〇!),, „, ^ Ζ #J 2 糸 When the growth plane of a compound semiconductor is 0 plane {00〇〇1 丨 plane, the angle of this place :: about 62 degrees, depending on the situation may also form In addition, the dents of the group VIII nitrogen compound semiconducting ^ 'thick film worm crystal growth degree, and the lattice constant or thermal expansion coefficient close to the substrate of the group Ⅲ nitride semiconductor, can not be obtained cheap. Therefore -Generally, different kinds of substrates, such as heartstone silicon, SiC, spinel (MgAlA), are used. However, on heterogeneous substrates, such as sapphire, silicon, SiC, and spinel (MgAl204), = ^^ gua If a nitride-based compound semiconductor is formed, a Group III nitride-based compound semiconductor having a bayonet differential row may be formed. In this case, the above-mentioned pit formation starting point may be formed. This bayonet differential row also looks like this in FIG. 4 It is shown in Fig. 4 on the substrate, with the m-th nitride-based compound semiconductor layer 3 formed slowly. If it is assumed that the small area marked by S on the second plate 1 is contaminated or has The scars are as shown in Fig. 4, and there will be formed this part which is not covered by the buffer layer 2. In this case happens, with the hem of the nitride-based compound semiconductor ^ ^ C:. \ 2D-CODE \ 91-O8 \ 91111949.ptd Page 6548696

; H2: 1 long 'will form a pit Pl with epitaxial growth plane C and forming an angle of 62 degrees two dihedral plane M' ... Originally, the epitaxial growth plane c should be edged or almost layered with m group nitrogen Compound-based compound semiconductors, but the next sound stone ::: 面 ::: is the second reason because no epitaxial growth or very late growth of the original crystal from the lattice constant difference from the substrate 1, will form through D2, D3, D4. For example, if the penetrating differential row Di disappears within the range of the buffer layer 2, the dentiferous row dying row disappears during the growth of the Group III nitride compound semiconductor layer 3, such as the penetrating differential row ~ in the Group III nitride compound semiconductor Although Sheng Cheng ^ has not been eliminated, but it grows with the growth surface c. In addition to the cause, there is still a through-difference row D4 that generates pits p2 from this point. α 丄 f, once the pits are formed, in the ordinary growth of stupid crystals, the characteristics of the group m nitrogen formed in the region of ω "Η: will be significantly reduced. The other two? For any compound semiconductor multilayer film, because of the existence; == nitride semiconductor is not flat, so the rat compound system will also lead to the formation can not have the same as the design cow; two will: short. At the same time, the compound semiconductor element #, will :to make"? In view of this, the present invention is to solve the problem = good = chemical. One is to use epitaxial growth to obtain the second reduction in pits; the second is to provide a compound semiconductor. _The 111th known nitride system [Means to solve the problem] The reason is that in order to solve the above-mentioned problems, as described in the first patent application scope

548696

In the method of manufacturing a group π nitride-based compound semiconductor using staggered crystal growth, the method includes the first step of epitaxial growth of the first group m nitride-based compound semi-body; The second step of temporarily stopping the supply of epitaxial raw materials is to raise the substrate temperature and maintain it at a constant temperature; wherein, in the second step, the m group nitrogen of S1 formed in the first step is a compound semiconductor Surface pits are buried. The "temporary cessation of supply of worm crystal raw materials" here means to stop at least one of the sources such as the Dili family (plural parts) and the nitrogen source. In addition, the so-called "buried pits" are not limited to the smooth burying of pits completely, but may also be a degree of state change "in the direction of pit burying". Moreover, according to the mechanism described in item 2 of the scope of patent application, the certain temperature in the second step is an increase range of 50 ° C or more and 2000 ° C or less. 0 Furthermore, according to the third scope of patent application scope, In the mechanism described in the item, the third step includes the epitaxial growth of the Group III gaseous compound semiconductor which is the same as that formed in the first step after the second step. In addition, according to the mechanism described in item 4 of the scope of patent application, the substrate temperature in the third step is maintained at the temperature raised in the second step. Furthermore, according to the mechanism described in item 5 of the scope of patent application, the substrate temperature in the first step is above 700 ° C and below 105 ° C; and the substrate temperature after the rise in the second step System 90 °: Above and below 1250 ° C. Furthermore, according to the mechanism described in item 6 of the scope of patent application, it includes the following step 3, at least an etching process is performed on the group nitride compound semiconductor to form islands such as dots, stripes, or lattices. State of

C: \ 2D-CODE \ 91 »0δ \ 91111949.ptd Page 8 548696 V. Description of the invention (5), the top and side of the gradient of the island state of T are nucleus, and the new epitaxial growth in the longitudinal and lateral directions grows new Step of a Group III nitride-based compound semiconductor. The new group m nitride compound semiconductor can have the same composition as the group m nitride compound semiconductor formed in the third and third steps. J J about [function and invention effect] The outline of the present invention will be described with reference to the drawings. A group VIII nitride-based compound semiconductor layer 31 having a pit P will now be formed due to any small area s (Fig. 1 (a)). Here, if the growth is temporarily stopped and the substrate temperature is raised to a certain temperature and maintained, the surface of the Group VIII nitride-based compound semiconductor that has been epitaxially grown will be activated and a so-called mass transport will be generated). That is, it can be considered that at the portion where the flat c-plane is formed, the surface will recede with some decomposition or movement. In addition, at the pit formation portion p, the m-th nitride-based compound semiconductor will move to the 丨 丨 — 丨 〇 丨 丨 plane, resulting in lateral growth. In addition, it is considered that the group π nitride compound semiconductor 'will move to the vicinity of the vertex (lowest part) of the inverted hexagonal cone that prevents epitaxial growth (Fig. 1 (b)). In this way, if the m-th nitride compound semiconductor is temporarily covered with the so-called laterally-growing pit bottom (the vertex of an inverted hexagonal cone) S (Fig. 1 (c)), then if the melon source and the nitrogen source are re-implemented, If epitaxial growth is performed and supplied, for example, a residual recessed portion, the m-th nitride-based compound semiconductor layer 3 2 (FIG. 1 (d)) will be formed rapidly in this recessed portion. As a result, an extremely flat c-plane can be formed. (Item 1 of the scope of patent application). The temperature difference between the first step and the second step is preferably more than 50 and 200 C: \ 2D-OODE \ 91-O8 \ 91111949.ptd page 9 548696

5. Description of the invention (6) Below C. In the case of a temperature difference of less than 50 t, the mass transfer effect will not be obtained. In addition, 'in the case of a temperature difference exceeding 200 ° c, it is difficult to control the single crystal growth of the Group III nitride-based compound semiconductor that has reached the first step', and the absence of mass transfer in the second step does not cause rapidity. Decomposed state (item 2 of the scope of patent application). Since it is quite difficult to completely bury the pits only by mass transfer, following the second step, the 'agricultural worm crystals' grow into the same Guarana nitride-based compound semiconductor as that formed in the first step. Thereby, a single-composition Group 2 nitride-based compound semiconductor can be formed by using the first, second, and third steps (item 3 in the scope of patent application). In the third step, the substrate temperature should preferably be kept at the temperature raised in the second step (No. 4 in the scope of patent application). The specific temperature is preferably a substrate temperature of 700 ° C or higher in the first step. ▼ —— 丄 and below C; and the temperature of the substrate after the rise in the second step is above 900 ° and below 125 ° C. It is preferable that both the first step and the second step have a single crystal growth temperature (the fifth item in the scope of patent application). Furthermore, by following the third step, at least the [] group nitride compound-based compound semiconductor is subjected to a post-treatment process to form a dot, a stripe, or a cricket " after the island state " If the side surface is epitaxially grown in the vertical and horizontal direction to grow a new Group III oxygen fx ', and the main body is transformed from the compound system, it can be cut by cutting the core of the knife with a private part of the rabbit. The epitaxial growth of the horizontal Huai row grows, so that the buried part of the gradient, f, recedes through the area of the differential row (the 6th in the scope of patent application). n Suppression [Embodiments of the invention] The embodiments of the invention described above can be selected from the following.

C: \ 2D-CODE \ 91-O8 \ 91111949.ptd 548696 V. Description of the invention (7) When a Group Π nitride-based compound semiconductor is sequentially laminated on the substrate, the substrate may be sapphire, silicon ( S i), silicon nitride (sic), sharp sunstone (MgAl2 04), LiGa02, NdGa03, ZnO, MgO, or other inorganic crystalline substrates; gallium phosphide or gallium arsenide, etc.] [Π—V compounds Semiconductor, gallium nitride (GaN), or other Group III nitride-based compound semiconductors. The method for forming a group III nitride-based compound semiconductor is preferably an organic metal vapor phase growth method (MOCVD or MOVPE), or a molecular beam vapor phase growth method (MBE) or a compound vapor phase growth method (HaHde vpE). You can also adopt different growth methods for each layer. The Group III nitride compound semiconductor can replace part or all of the Group X element elements with side (B) and ytterbium (τ 1), or can replace part of the nitrogen (N) element with phosphorus (P) and arsenic. (As), antimony (Sb), and bismuth (Bi) can be substantially applied to the present invention. These elements are doped to such an extent that they cannot be displayed on the composition. For example, AlxGai_xN (〇 $ 丨) of a group HI nitride compound semiconductor that does not have indium (丨 n) or arsenic (A s) in the composition may be doped with aluminum (A1) or gallium (Ga). Indium (In) with a larger atomic radius, or arsenic (As) with a larger atomic radius than nitrogen (N), and the crystals will expand with the removal of nitrogen atoms, and the strain will be complemented by compressive strain to form a better Crystallinity. With this, the crystallinity is improved, and in accordance with the present invention, the penetration difference can be reduced to a level of 100 to 100. In the case of the structure of the light-emitting element or the element, it is preferable to use a semi-mono- or ternary system of a group in nitride compound. _ 'When forming n-type Group HI nitride-based compound semiconductor layers, Si, Ge, Se, Te, C and other Group IV elements can be added. 1111

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548696 V. Description of the invention (8) '^ --- :: π: Ϊ P type impurities can be added to Zn, Mg, Be, Ca, Sr, Ba 咋, i I = ′, or 1v private element. These can also be doped in a plurality of types: dopant and p-type impurities are doped in the same-layer. May: mi implements a so-called lateral parasite growth structure. In other words, stone: a structure in which lateral worm crystals grow and reduce the difference in penetration. Horizontal =: = It is best to make the growth surface perpendicular to the substrate ... You can grow with the faceted hibiscus that tilts the substrate ^ ^ ^ * 0 # heart. At this time, it is also possible to make the bottom of the height difference without a bottom surface and have a V-shaped cross section. Fourthly, as shown in FIG. 2 (a), on the substrate 1, buffering will be carried out; the second claws of the claw family ϋmediation / bamboo I reader, and Yuchong layer formed by reducing the pits are carried out as shown in 2⑴. ㈣The processed semiconductor layer is referred to as / family gas " 'compound semiconductor layer_series combined display: = atmosphere, is a compound semiconductor layer 31, ". For example, two = brother melon family atmosphere compound semiconductor layer 3. 0 gradient The top and side are nuclei, while the vertical and horizontal, the compound semiconductor 33 (Figure 2 (c)) on the stone B, the new second = nitride above and below, to form a suppressed through-J gradient, when the gradient ^ > An area where the teeth are arranged in a row (Fig. 2 (d)) 〇 The etch-reduced compound-based compound semiconductor layer 30 formed on the substrate 1 with a buffer layer interposed therebetween is etched: a milky stripe Or grid-like island state method, ^ -like method to expose the substrate i, or as shown in Figure 3 (b: = ^^: upper method, or profitability as shown in Figure 3 (c)? Ladder and The method of the next paragraph. Yi Yang and up & in the formation of the Group III nitride compound semiconductor with reduced pits

548696 V. Description of Invention (9) On the wafer, semiconductor elements such as FETs and light-emitting elements can be formed. In the case of a light-emitting element, a multi-quantum well structure (MQW) or a single quantum well structure (SQW) may be considered. In addition, it may be a homogeneous structure, a heterostructure, a double heterostructure, or a pn junction formed by pin bonding. . [Example 1 The a-side washed with organic washing and heat treatment was used as the main surface. On a single-crystal sapphire substrate 1, the temperature was lowered to 40 0 ° C, and H2 was adjusted to 10 ^ / min, NH3 was supplied at 5 L / min and TMA at 20 // mol / min for about 3 minutes to form an A 1 N buffer layer 2 having a thickness of about 20 nm. Next, the temperature of the sapphire substrate 1 is maintained at 1000 × :, and h2 is introduced at 20 L / mi η, N H3 is introduced at 10 L / mi η, and TMG is introduced at 300 / zmoi / min. A 0 ′ layer 31 having a film thickness of about 1 is formed. Then, the temperature of the sapphire substrate 1 is raised to 丨 丨 ⑽. c and hold) 0 minutes. Next, the temperature of the sapphire substrate 1 was maintained at 丨 丨 〇〇, and H2 was introduced at 201/1 ^ 11, NH3 was performed at 10 L / min, and TMG was introduced at 3 0 0 " mol / min. About 5 of the GaN layer 32. Thus, in the formed GaN layer 32, no pits were found on the wafer. [Comparative example] 1

In addition to trapping the temperature of the sapphire substrate 1 a1] n layer 31 and _ layer 32, and continuously forming the a side of GaN, the A1N buffer layer shape // Π 'on the sapphire substrate Thousands of pits are formed on 0. The temperature of the monitor sapphire substrate 1 was maintained on three sides of the sapphire substrate ′ at 00 C, and a buffer layer with a film thickness of 6 # m was formed as in Comparative Example 1 & A1N.

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GaN layer. On the GaN layer formed in this manner, dozens of pits are formed on the wafer. [Element number description] 1 Substrate 2 Buffer layer 3 Group π nitride compound semiconductor layer 5 Mask 31 Group m nitride compound semiconductor layer 32 Group nr nitride compound semiconductor layer 33 New Group Π nitrogen The compound-based compound semiconductor C crystal growth planes Di, D2, D3, and D4 penetrate through the differential row M, the side of the pit P, the pit Pi, the pit P2, and the bottom of the pit being contaminated or contaminated.

C: \ 2D-CODE \ 91-O8 \ 91111949.ptd Page 14 548696 Brief description of the drawings Figures 1 (a) to (d) are illustrations of a method for manufacturing a group III nitride compound semiconductor according to a specific embodiment of the present invention. Step cross-section diagram. 2 (a) to (d) are schematic cross-sectional views showing steps of a method for manufacturing a group III nitride-based compound semiconductor according to another embodiment of the present invention. 3 (a) to (c) are schematic cross-sectional views showing a part of a step of a method for manufacturing a group III nitride-based compound semiconductor according to another embodiment of the present invention. Fig. 4 is a schematic cross-sectional view of a group III nitride-based compound semiconductor having pits.

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Claims (1)

548696 VI. Application Patent Scope 1. A method for manufacturing a group m nitride-based compound semiconductor, which is a method for manufacturing a group m nitride-based compound semiconductor grown by epitaxial growth on a substrate, and includes: The first step of epitaxial growth of a group nitride compound semiconductor; and the second step of temporarily stopping the supply of the epitaxial raw material and increasing the substrate temperature to a constant temperature; wherein, in the second step, the first step The pits on the surface of the first group m nitride-based compound semiconductor formed in the first step are buried. 2. For example, in the method for manufacturing a group III nitride compound semiconductor as described in item 1 of the scope of patent application, the certain temperature in the above-mentioned second step is an increase in a range of 50 ° C to 200 ° C. 3. For example, the method for manufacturing a group III nitride-based compound semiconductor in the scope of application for a patent, wherein after the second step described above, the epitaxial growth is the same as in the first step described above. The third step of the group nitride compound semiconductor. 4. The method for producing a group m nitride compound semiconductor as described in claim 3, wherein the substrate temperature in the third step is maintained at the temperature raised in the second step. 5. For example, the method for manufacturing a Group III nitride-based compound semiconductor in the scope of patent application, wherein the substrate temperature in the first step is 70 ° C to 1050 ° C; and in the second step, The temperature of the substrate after the temperature rise is above 90 ° C and below 125 ° C. C: \ 2D-CODE \ 9 Bu08 \ 91111949.ptd Page 16 548696 VI. Application for patent scope 6. Manufacturing method of Group Π nitride-based compound semiconductors such as any one of patent application scope Nos. 3 to 5 , Which includes following the third step, performing an etching process on at least the group m nitride compound semiconductor to form an island state such as a dot, a stripe, or a lattice, and then an upper gradient of the island state and The side is a core, and a new group m nitride-based compound semiconductor is epitaxially grown in the longitudinal and lateral directions. C: \ 2D-CODE \ 91-O8 \ 91111949.ptd Page 17