TW548537B - Circuit module capable of conducting hot swap - Google Patents

Abstract

A kind of circuit module capable of conducting hot swap is suitable for use in a circuit system having a bottom board, and includes the followings; a circuit board having plural connection pins for inserting into the bottom board; a plug implement, which is mounted on a circuit board and provided with a data input terminal that is connected to a reset data signal; a control input terminal connected to a clock signal; and an output terminal, which is connected to connection pins such that the output terminal is enabled to generate the first reset signal when the clock signal is triggered and the reset data signal is enabled.

Description

548537 V. Description of the invention (l) The present invention relates to a circuit module that can be hot-swappable, especially to a circuit module that can be hot-swappable in a switch. 'Hot swap (hot swap), that is, when the system is turned on (hot), you can insert devices such as hard disks, interface cards, etc., or pull out the device, so it provides many advantages' such as the need to shut down (shutdown) The time required and the time required for rebooting are particularly useful in the management and protection of network systems. The advantages of hot swapping are particularly useful because the network system has many logic circuits or interface cards connected together, and it shuts down. It takes a lot of time to store 1-state data, and similarly it takes a lot of time to set the initial value. For example, ^ replacing the switch module of the switch of the network system and closing the switch will increase the time the network cannot be connected, reducing work efficiency The design of hot swapping is even more important. '' For an additional indication 60 through 62, the electrical plug for transmitting telecommunications is connected to the post-recovery signal 5 3 Knowing heat pumping reduces the effect of hot pomegranate replacement on the signal, the conventional technology usually ❿ special electricity 第The l_a diagram shows the bus signal interference caused by hot plugging. Figure 1b is not familiar with the hot swap bus architecture diagram. The bus No. 63 line is connected to the device 61, and the signal line 64 is connected to the jealous device 65 to be connected to the bus 60. The devices 61, 62, and 65 have ^, lines DRV and receiving signal lines RCV. These The signal lines all have a capacitive load CLx, Cly, CLz coupled to the ground potential. When the connector of the 65 bus 60 is installed, the bus 60 uses the capacitor & instantaneous ground potential, and the stationary signal level is 51 instants. There is a perturbation signal 53 to the normal signal level. If there is no special circuit, the perturbation will cause the busbar to malfunction (111 & 1 {1111 (: 1: 1011). Figure 2 shows the architecture diagram of the exchange. It is characterized by a separate online plug-in bus

548537 V. Description of the invention (2) Live insertion bus control 70, which has a surface 71 coupled to the system bus 72, and a system bus controller 73, which is an online plug-in bus controller 70 can also be integrated into the system bus control to 73. Feature cards (feature (i card) 74, 75, 76, 77 can be plugged into the connector of the bus 72. Plug and unplug the bus controller 70 online. Use the interface 78 and the system bus controller 73 to coordinate the bus 72 Control power transfer. When a feature card is inserted on the line, the online bus controller 70 requests the system bus controller 73 via the interface 78 to obtain the control power of the system bus 72, and the online plug and unplug bus. The bus controller 70 takes: After that, it takes over the system bus 72, and plugs it in online: The control signal of the profit 70 drives a part of the system bus 72, and it does not interfere with the disturbance signal when it is plugged in. The bus controller knows that the feature card has been inserted into the system bus 72, and the system bus controls the control right of the bus 72. The same procedure is also applicable. When the feature card is inserted, a mechanism is required to control the line plug = 70 m The master controller of the system bus 72: time and v time, so the feature card must know the online plug in and out of the bus controller 70. The method is to connect the feature card with different lengths. Plug and unplug feet _ when it occurs Pin 55 contacts the system bus 7 first: = Enter, and finally pin 57 contacts the system bus. The connection is the initial time. When the feature card 74 is pulled out, it is connected to °. The time is the time sequence defined by the stop. Phase 5 0739-7307TWF; rliu.ptd 548537 V. Description of the invention (3) Contrary. Therefore, the characteristic controller 70 is normally used to know the hot foot and the connector, which take over the bus of the general device, the complexity of the circuit. In view of this, the plug-in circuit module is suitable for a clock signal with a plurality of pins for a data input terminal; and a reset data reset signal. The card 7 4 plugs the action. Moreover, the time for inserting and removing the bottom plate of the hair board must be sufficient to make the plug-in of the online plug-in bus arrangement defective. The second test device needs to be equipped with a down test device. The first additional control letter must propose a clear proposal of a circuit system with a latch. When the device receives a reset data signal and couples it to an output terminal board and an output terminal for signal enablement, 'the first requires a special connection or extraction, which does not apply to the additional bus The control circuit number path 'increasing the bus current is suitable for general interface circuits, and the circuit modules can be hot-swappable, including: a circuit board having, installed on the circuit board, having a number; the control wheel input end is coupled to the connection When the clock signal is triggered, it can be enabled to generate a first or the following, which illustrates the present invention. The diagram briefly illustrates the first diagram, which shows the conventional disturbance of the bus signal disturbance caused by hot plugging. Figure 1b shows Diagram of a conventional hot-swap busbar. Figure 2 shows the structure of a conventional hot-swap bus. Figure 3 shows the structure of a conventional hot-swap pin. Figure 4 shows the hot-swapping in the embodiment of the present invention. Block diagram of redundant switch management configuration for the switch.

548537 V. Description of the invention (4) Fig. 5 shows a block diagram of the hot-swap exchanger in the embodiment of the present invention. [Symbol Description]

M1, M2 ~ switching management module; 1, 2 ~ central processing unit; 5 ~ base plate; 1 1, 12 ~ D type flip-flop; 1 0, 20 ~ switching circuit; 5 1 ~ static signal level; 5 2 ~ Ground level; "5 3 ~ Disturb signal; 55, 56, 57 ~ pins; 6 0 ~ bus; 6 1, 62, 65 ~ device; 6 3, 64 ~ signal line; 7 0 ~ plug on the line Bus controller; 7 1 ~ interface; 7 2 ~ system bus; 7 3 ~ system bus controller; 74, 75, 76, 7 7 ~ feature card; 7 8 ~ interface; 1 00 ~ switch. Examples

0739-7307TWF; rliu.ptd Page 7 548537 V. Description of the invention (5) When replacing the exchange module or interface module of the switch, the hot-swappable backplane can maintain the uninterrupted operation of the parent switch. An embodiment of the present invention The switch in the switch is configured for redundant switch management, so it has two switch management modules (switch management modu 1 es) installed in the chassis, which can provide seamless network switching management. Fig. 4 is a block diagram showing a backup exchange management configuration of the switch in the embodiment of the present invention. The switch 100 includes a switching management module M1, a switching management module! ^ 2, and a backplane 5. The switching management module jj 1 includes a central processing unit 1, and the switching management module M 2 includes a central processing unit 2. The switch management module μ 1 and the switch management module M 2 perform two important functions. The first function is a central switch fabric, and the second function is a management entity. The switching management modules M1 and M2 have a switching circuit, that is, an interface module (not shown) receives a packet, and the purpose is not in the area port of the interface module (1 oca 1 p0r t), then it is forwarded to the switch. The management module's parent exchange management module will detour packets (r0u ^ e) to the correct destination interface module. Before the manufacturer leaves the factory, the switching system software is installed in the switching management modules M1 and M2. Therefore, the switching system software can operate during physical installation. The exchange management modules M1 and M2 exchange information by managing the bus and the interface module, that is, sending commands to the interface module and collecting information of the interface module. # Switch 1 0 0 When the switch is turned on, two switch management modules are installed. The software installed on switch 100 must determine which one is the master switch management module and the other is the slave switch management module. Module (slave switch management module)

0739-7307TWF; rliu.ptd page 8 548537

The management module is operated in hot standby mode, "t, s +, and hot standby mode", that is, with the management dynamics of the two switch management modules, the switch 1 〇 Management team 鲅 ☆ 4 is a device, that is, when the standby exchange manager > ... 4 the master and parent exchange the management module and the slave exchange management module and the management module have any configuration or changes Is to change any information, the father and the manager change the management module together, so as to ensure that when the main exchange management module fails (fall), the slave exchange management module can take over (sign ^ over) ° signal in Figure 4 The definitions are as follows: Μ 1 —HWG · Parent change management module mi hardware good signa 1 (active low) M2 —HWG: Exchange management module M2 hardware g〇〇 sign signa 1 (active low)

Ml—SWG · parent exchange management module mi software good signa 1 (active low) M2—SWG: parent exchange management module m2 software good si gna 1 (act i ve low) mi-prior: exchange management module ... priority signal (Asserted M2) M2—PRIOR: Switch management module ... Priority signal (asserted switch management module M1 and switch management module M2 are booted on the chassis at the same time. The private sequence is as described below. 'Step 1' The switch management module M1 detects Test M2-HWG is at a low level, M2-SWG is at a low level, exchange management module ... Detect Ml-HWG is at a low level, Ml-SWG is at a low level. Step 2, Set the exchange management module Ml settings ( assert) Ml-PRIOR is low level, exchange

0739-7307TWF; rliu.ptd Page 9 548537 V. Description of the invention (7) The management module M2 detects that M1-PRIOR is at a low level, and waits for the software of the switch management module to start. Step ^^ Management module rights Group M1 starts to act as the main exchange management module, and then performs three operations to change the management module to act from the exchange management module. -Change ... Group M2 starts with when the main exchange management module M1 needs to be removed, due to a foreign program ... Go is a software program error caused by temporary + (hang), from the exchange management module elbow 2 by monitoring the timing to evaluate the The main switch management modules are detected with dgt> lmer =, restart, and replace (SW1㈣. _) To become the master switch group, and the master switch management module M1 becomes the slave switch management module. Change / 2's 1 private as shown in Figure 5 'When the main switch management module M1 is suspended-(hang), the central processing unit 2 generates a reset data M2 jST_DATA input data input terminal of D-type flip-flop, H ? Signal Ml—RST —CLK input control input terminal of D-type flip-flop, d 2; = state, a reset signal M2 is generated at the wheel output end — RST setting: official, CPU of module M1! And the switching circuit ι0, so that the master traffic management group M1 restarts to become the slave switching management module. When reading the exchange letter from the exchange management module M1, Wei ICLK does not trigger the draw = = =, and the clock MUST = 矣 management mode is still the main exchange management = No. In this embodiment, D cut Π: Θ 盟， 1 1 ΤΛ «,. Important signals to prevent switching; broadcast reversing device 2 is used to lock the electric and malfunctions that have a latching function: so only stable operation is required, no special 丨: X It is necessary to use special pins or special extra bus lines to make the circuit known as TF.

0739-7307TWF; rliu.ptd Page 10 548537 V. Description of the invention (8) System. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application.

0739-7307TWF; rliu.ptd p. 11

Claims (1)

548537 6. Scope of patent application 1 · A hot-swappable circuit and one-way system, which includes at least ..., and, and is suitable for a battery with a base plate II! Road ϋ * has a plurality of pins for inserting, and the king lock is installed on the above board of the above circuit; received a reset data signal; control input =, has a data input terminal and a wheel output terminal for coupling At the above-mentioned pins, it is known that a clock signal is received; when the reset data signal is enabled, the clock signal is triggered and the previous reset signal is triggered. Only at the end of the round can the first number be generated. The project group, wherein the above circuit system is a switch. Circuit module 3 for hot swapping. As described in item 1 of the scope of patent application, the above-mentioned latch is a D-type positive hot swapping circuit module. The changed circuit module further includes: a reset input terminal coupled to the above-mentioned pin for receiving a reset signal; and a central processing unit installed on the circuit board to generate the first reset signal And the clock signal, and coupled to the reset input; a switching circuit installed on the circuit board and coupled to the reset input; and when the second reset signal is enabled, reset The central processing unit and the switching circuit. 5-a hot-swappable circuit system, which includes at least: a base plate; 0739-7307TWF; rliu.ptd Page 12 548537 VI. Patent application scope The first circuit board has a plurality of pins for inserting the above-mentioned backplane; the first circuit is installed on the above-mentioned first circuit board to generate a first Reset the data signal and receive a second reset signal; a first latch installed on the first circuit board, having a first data input terminal coupled to the first reset data signal; a first control input A first output terminal is coupled to the pin; when the clock signal is triggered and the first reset data signal is enabled, the output terminal can be enabled to generate a first clock signal; A reset signal; a second circuit board having a plurality of pins for inserting into the baseboard; a second circuit mounted on the second circuit board for generating the second reset data signal and receiving the first reset A signal; and a second latch, which is installed on the second circuit board and has a second data input terminal coupled to a second reset data signal; a second control input terminal coupled to a second clock signal; First The two output terminals are coupled to the above-mentioned pins. When the clock signal is triggered and the second reset data signal is enabled, the output terminal can enable the second reset signal to be generated; when the second reset signal is enabled When it is enabled, the first circuit is reset; when the first reset signal is enabled, the second circuit is reset. 6. The hot-swappable circuit system described in item 5 of the scope of patent application is a switch, which further comprises: a first switching circuit, which is installed on the circuit board and receives a second reset signal; And a first switching circuit, which is installed on the circuit board and receives a second tautology-free signal; 0739-7307TWF; rliu.ptd Page 13 548537 VI. Patent application scope When the second reset signal is enabled, the first switching circuit is reset; when the first reset signal is enabled, the first reset circuit is reset. Two switching circuits. 7. The hot-swappable circuit system according to item 5 of the scope of patent application, wherein the first latch is a D-type flip-flop, and the second latch is a D-type flip-flop. 8. The hot-swappable circuit system according to item 5 of the scope of patent application, wherein the first circuit is a central processing unit and the second circuit is a central processing unit. _ 0739-7307TWF; rliu.ptd p. 14