541792 A7 __________ B7 五、發明說明u ) 發明領域 (請先閱讀背面之注意事項再填寫本頁) 本發明係關於擁有線性電流/電壓特性之金氧半導體 輸出驅動電路。 發明背景 由於擁有反應速度快、低能量消耗及高積集度等優 點，含有金氧半導體（MOS)電路之半導體晶片用途廣泛。 例如金氧半導體輸出驅動電路常用於驅動達所需的電壓標 準，以傳遞所要的邏輯値。 經濟部智慧財產局員工消費合作社印製 請參考圖1爲描述一習知的金氧半導體輸出驅動電 路。P形的金氧半導體場效電晶體（PMOSFET) 140的源 極（source node)和參考電壓Vss相連接。參考電壓是依 設計規格提供相對穩定的電壓源，如MOS元件一般常用 的3或5伏特電壓。當輸入節點（inpUt node ) 110及120 的初始電壓値低時，在輸出節點130的初始電壓値高。當 輸入節點120和輸入節點140分別從前級驅動器 (predriver，未圖示）接收到高電壓値的訊號時，p形金 氧半導體場效電晶體140的源極和閘級都會被拉高，如此 一來P形金氧半導體場效電晶體140會被關閉。同時N形 金氧半導體場效電晶體（NMOSFET) 150也被拉高且N形 金氧半導體場效電晶體150的源極是接地的，如此一來N 形金氧半導體場效電晶體150被打開。在此一例子中，N 形金氧半導體場效電晶體150的汲極和閘極同時被拉高， 所以N形金氧半導體場效電晶體150是在飽和區下操作。 4SIS/200107TW; 90P47 1 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 541792 A7 '^^_____ B7 五、發明說明) 體積體電路製程中。 本發明之輸出驅動電路包含第一輸入電晶體、第二輸 入電晶體、第一對電晶體、第二對電晶體、第一輸出電晶 體及第二輸出電晶體。第一輸入電晶體輸入第一輸入訊 號，且輸出節點和輸出驅動電路之輸出節點耦合。第二輸 入電晶體輸入第二輸入訊號，且輸出節點和輸出驅動電路 之輸出節點耦合。第一對電晶體，依據第一控制訊號及輸 出訊號，產生第二控制訊號。第二對電晶體，依據第三控 制訊號及輸出訊號，產生第四控制訊號。第一輸出電晶體 用於接收第二控制訊號，且輸出節點和輸出驅動電路之輸 出節點耦合。第二輸出電晶體用於接收該第四控制訊號， 且輸出節點和輸出驅動電路之輸出節點耦合。 圖式簡要說明 圖1爲習知的金氧半導體輸出驅動電路示意圖。 圖2a到圖2d分別爲本發明的四種較佳實施例。 圖3a到圖3d分別爲本發明的另外四種較佳實施例。 圖式元件說明 經濟部智慧財產局員工消費合作社印製 丨lr---------•裝-------rtri (請先閱讀背面之注意事項再填寫本頁) 110、120輸入節點 13〇輸出節點 140 P形金氧半導體場效電晶體 150 N形金氧半導體場效電晶體 210第一輸入電晶體 215第二輸入電晶體 4SIS/200107TW; 90P47 〇 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 541792 A7 B7 五、發明說明（+) 211閘極 216閘極 212 N形金氧半導體場效電晶體 217 P形金氧半導體場效電晶體 第一對電晶體 220 P形金氧半導體場效電晶體 225 N形金氧半導體場效電晶體 第二對電晶體 230 P形金氧半導體場效電晶體 235 N形金氧半導體場效電晶體 240第一輸出電晶體 250、255反相器 270輸出節點 245第二輸出電晶體 260、265輸入節點 275、280、285、290 節點 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 310第一輸入電晶體 3 11閘極 312 N形金氧半導體場效電晶體 317 P形金氧半導體場效電晶體 第一對電晶體 320 P形金氧半導體場效電晶體 325 N形金氧半導體場效電晶體 第二對電晶體 330 P形金氧半導體場效電晶體 335 N形金氧半導體場效電晶體 315第二輸入電晶體 3 16閘極 4SIS/200107TW; 90P47 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 541792 345第二輸出電晶體 360、365輸入節點 375、380、385、390 節點 A7 B7 五、發明說明（Η) 340第一輸出電晶體 350、355反相器 370輸出節點 391、392 阻抗 發明詳細說明 以下所描述的電路是由場效電晶體（FET)所組成。 但是本發明所描述之電路並不侷限於使用場效電晶體，且 不限於其他電晶體如雙載子接合型電晶體（bipolar junction transistor)、或場效電晶體和雙載子接合型電晶體 的組合、或其他任何種類的類似技術。此外，本發明可以 不同的方式運用，如用於單一元件或積體電路。 請參考圖2a，本發明的第一較佳實施例包含一第一輸 入電晶體210，較佳爲、型金氧半導體場效電晶體元件， 一第二輸入電晶體215，較佳爲N型金氧半導體場效電晶 體元件。一第一對電晶體，包括P型金氧半導體場效電晶 體220、N型金氧半導體場效電晶體225，一第二對電晶 體，包括P型金氧半導體場效電晶體230、N型金氧半導 體場效電晶體235。一第一輸出電晶體240，較佳爲P型 金氧半導體場效電晶體元件，一第二輸入電晶體245，較 佳爲N型金氧半導體場效電晶體元件。輸出驅動電路更包 含反相器250和255。 假設輸出節點270 —開始被拉高，輸入節點260和265 分別從前級驅動器（predriver，未圖示）接收高訊號（high 4SIS/200107TW; 90P47 5 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） —i---------裝--------訂--------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印制衣 541792 A7 B7 五、發明說明（b) (請先閱讀背面之注意事項再填寫本頁) signal)。以下描述拉降的過程。P型金氧半導體場效電晶 體210的源極和閘極皆被拉昇，且P型金氧半導體場效電 晶體210爲關閉狀態。N型金氧半導體場效電晶體215的 源極爲接地而其閘極被拉高，所以N型金氧半導體場效電 晶體215是打開狀態。反相器250輸出低訊號（low signal)。反相器250的輸出節點、P型金氧半導體場效電 晶體220的閘極和N型金氧半導體場效電晶體225的閘極 耦合在一起。由於P型金氧半導體場效電晶體220的閘極 收到低訊號，且其源極和參考電壓相連接，P型金氧半導 體場效電晶體220爲開啓狀態。N型金氧半導體場效電晶 體225正好相反，爲關閉狀態。因爲其閘極被拉降，且源 極因和輸出節點270耦合而被拉昇。 經濟部智慧財產局員工消費合作社印製 當N型金氧半導體場效電晶體225被關閉時，沒有電 流流經節點280。所以節點280追隨（trace)節點270的 高電壓値。此時，P型半導體場效電晶體240是關閉的。 由於反相器250、255輸出低訊號，而且電晶體220、225 及230、235是對稱的，因此很容可得到P型金氧半導體 場效電晶體230開啓且N型金氧半導體場效電晶體235關 閉的結果。N型金氧半導體場效電晶體245的閘極和節點 290耦合。節點290追隨節點270的高電壓値，N型金氧 半導體場效電晶體245被開啓。 必須注意，以上的操作實質上是同時間完成。N型金 氧半導體場效電晶體215和245都被開啓而且在飽和區域 操作。從輸出節點270觀之，N型金氧半導體場效電晶體 4SIS/200107TW; 90P47 6 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 541792 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（q) 215和245像兩個並聯的輸出阻抗。因爲N型金氧半導體 場效電晶體215在飽和區域操作，其輸出阻抗値高。由於 節點290和節點270的電壓値高，N型金氧半導體場效電 晶體245是在二極體連接配置中（diode-connect configuration)，所以其輸出阻抗値低。N型金氧半導體場 效電晶體245提供如圖2a所示之輸出驅動電路之絕大部分 輸出阻抗。藉由小心選擇尺寸爲B之N型金氧半導體場效 電晶體215，和尺寸爲D之N型金氧半導體場效電晶體 245之間的尺寸比値，可以在轉變時得到有高線性之輸出 (電流/電壓）轉換曲線。在此電晶體的尺寸定義爲元件通 道的（寬度/高度）比。如此驅動電路可達到輸出固定阻抗 之目的。 P型半導體場效電晶體230和N型場效電晶體245被 開啓，輸出訊號因感受到拉降過程而開始下降，N型金氧 半導體場效電晶體215的汲極電壓値下降。最終N型金氧 半導體場效電晶體215進入三極體區域（triode region)， 在三極體區域中的輸出阻抗遠較在飽和區域爲低。同時， 節點290的電壓値開始減少，輸出節點270也是。N型金 氧半導體場效電晶體245的輸出阻抗變越來越高，直到電 晶體245關閉爲止。 假設輸出節點270剛開始被拉低，輸入節點260和265 居分別從前級驅動器（未圖示）收到低訊號。以下敘述一 拉昇過程。P型金氧半導體場效電晶體210之源極和閘極 都被拉低，電晶體210開啓。N型金氧半導體場效電晶體 4SIS/200107TW; 90P47 7 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -------------------訂--------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 541792 A7 B7 五、發明說明（& ) 215的源極爲接地，而其閘極被拉低，所以電晶體215爲 關閉。反相器250輸出高訊號。反相器250的輸出節點、 P型金氧半導體場效電晶體220的閘極及N型金氧半導體 場效電晶體225的閘極耦合在一起。由於p型金氧半導體 場效電晶體220的閘極接收到高訊號，且其源極和參考電 壓連接，P型金氧半導體場效電晶體220爲關閉狀態。N 型金氧半導體場效電晶體225正好相反爲開啓狀態，因爲 和輸出節點270耦合狀況下，其閘極被拉高而源極被拉低。 當P型金氧半導體場效電晶體220處於關閉狀態，沒 有電流流經節點280。所以節點280追蹤節點270有低電 壓値。在此同時，P型金氧半導體場效電晶體240開啓。 由於反相器250、255輸出高訊號，以及電晶體對220、225 及230、235爲對稱的，很容易可得出P型金氧半導體場 效電晶體230爲關閉狀態，而N型金氧半導體場效電晶體 235爲開啓狀態之結果。N型金氧半導體場效電晶體245 和節點290耦合。節點290追隨到輸出節點270的低電壓 値。N型金氧半導體場效電晶體245爲關閉狀態。 必須注意，以上所有操作實質上爲同時完成。P型金 氧半導體場效電晶體210及240皆處於開啓狀態且在飽合 區域操作。從輸出節點270觀之，P型金氧半導體場效電 晶體210及240像兩個並聯的輸出阻抗。因爲p型金氧半 導體場效電晶體210在飽和區操作，其輸出阻抗値高。由 於節點280和輸出節點270的電壓値皆低，因此P型金氧 半導體場效電晶體240是在三極體連接配置中。所以P型 4SIS/200107TW; 90P47 8 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） — l·---------裝------.---訂---------- S— <請先閱讀背面之注意事項再填寫本頁) 541792 A7 B7 五、發明說明（气） (請先閱讀背面之注意事項再填寫本頁) 金氧半導體場效電晶體240之輸出阻抗値相當低。P型金 氧半導體場效電晶體240，對如圖2a所示之輸出驅動電路 的輸出阻抗貢獻佔絕大部分。藉由小心選擇尺寸爲A之P 型金氧半導體場效電晶體210，和尺寸爲C之P型金氧半 導體場效電晶體240之間的比値，可以得到在轉換時有高 線性之輸出（電流/電壓）轉換線。在此電晶體的尺寸定義 爲元件通道的（寬度/長度）比。如此驅動電路可達到輸出 固定阻抗之目的。 N型金氧半導體場效電晶體225和P型金氧半導體場 效電晶體240被開啓，輸出訊號因感受到拉昇過程而開始 上升，P金氧半導體場效電晶體210之汲極電壓値增加。 最終P型金氧半導體場效電晶體210進入三極體區域 (triode region)，在三極體區域中的輸出阻抗遠較在飽和 區域爲低。同時，節點280的電壓値開始增加，節點270 也是。P型金氧半導體場效電晶體240的輸出阻抗越來越 高，直到電晶體240關閉爲止。 爲達到本發明之目的，本發明上有如圖2b、2c和2d 所述之實施例。 經濟部智慧財產局員工消費合作社印製 在圖2b中，N型金氧半導體場效電晶體211經由反相 器250接收輸入節點260之訊號。假設輸出節點270初使 有高訊號，且輸入節點260及265分別由前級驅動器接收 高訊號。N型金氧半導體場效電晶體215開啓。n型金氧 半導體場效電晶體211的閘極由反相器250接收低訊號， 因此N型金氧半導體場效電晶體211關閉。很容易可得知 4SIS/200107TW; 90P47 9 ^紙張尺度適用中國國家標準（CNS)A4規格（21〇 X 297公愛) "" 541792 A7541792 A7 __________ B7 V. Description of the Invention u) Field of Invention (Please read the notes on the back before filling out this page) The present invention relates to a metal oxide semiconductor output drive circuit with linear current / voltage characteristics. BACKGROUND OF THE INVENTION Semiconductor chips containing metal-oxide-semiconductor (MOS) circuits are widely used because of their advantages such as fast response speed, low energy consumption, and high accumulation. For example, metal-oxide-semiconductor output driver circuits are often used to drive to the required voltage standard to deliver the desired logic chirp. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Please refer to Figure 1 to describe a conventional metal oxide semiconductor output drive circuit. A source node of the P-shaped metal oxide semiconductor field effect transistor (PMOSFET) 140 is connected to the reference voltage Vss. The reference voltage is a relatively stable voltage source according to the design specifications, such as 3 or 5 volts commonly used for MOS devices. When the initial voltages of the input nodes (inpUt nodes) 110 and 120 are low, the initial voltage at the output node 130 is high. When the input node 120 and the input node 140 respectively receive a high-voltage signal from a predriver (not shown), the source and gate levels of the p-type metal-oxide-semiconductor field-effect transistor 140 will be pulled up. As a result, the P-shaped metal oxide semiconductor field effect transistor 140 will be turned off. At the same time, the N-type metal-oxide-semiconductor field-effect transistor (NMOSFET) 150 is also pulled up and the source of the N-type metal-oxide-semiconductor field-effect transistor 150 is grounded. As a result, the N-type metal-oxide-semiconductor field-effect transistor 150 is grounded. turn on. In this example, the drain and gate of the N-type MOSFET 150 are simultaneously pulled up, so the N-type MOSFET 150 operates in a saturation region. 4SIS / 200107TW; 90P47 1 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 541792 A7 '^^ _____ B7 V. Description of the invention) Volume body circuit manufacturing process. The output driving circuit of the present invention includes a first input transistor, a second input transistor, a first pair of transistors, a second pair of transistors, a first output transistor, and a second output transistor. The first input transistor inputs the first input signal, and the output node is coupled to the output node of the output driving circuit. The second input transistor inputs a second input signal, and the output node is coupled to the output node of the output driving circuit. The first pair of transistors generates a second control signal based on the first control signal and the output signal. The second pair of transistors generates a fourth control signal based on the third control signal and the output signal. The first output transistor is used to receive the second control signal, and the output node is coupled to the output node of the output driving circuit. The second output transistor is used to receive the fourth control signal, and the output node is coupled to the output node of the output driving circuit. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a conventional metal oxide semiconductor output driving circuit. Figures 2a to 2d are four preferred embodiments of the present invention. Figures 3a to 3d are four other preferred embodiments of the present invention. Schematic component description Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economy 丨 lr --------- • Install ------- rtri (Please read the precautions on the back before filling this page) 110 、 120 input nodes 13 output nodes 140 P-shaped MOSFETs 150 N-shaped MOSFETs 210 first input transistor 215 second input transistor 4SIS / 200107TW; 90P47 〇 This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) 541792 A7 B7 V. Description of the invention (+) 211 Gate 216 Gate 212 N-type MOS field effect transistor 217 P-type MOS field effect transistor The first pair of transistors 220 P-shaped MOSFETs 225 N-shaped MOSFETs The second pair of transistors 230 P-shaped MOSFETs 235 N-shaped MOSFETs 240 first output transistor 250, 255 inverter 270 output node 245 second output transistor 260, 265 input node 275, 280, 285, 290 node (please read the precautions on the back before filling this page) Printed by the Property Bureau Staff Consumer Cooperative 310 Input transistor 3 11 Gate 312 N-type MOS field effect transistor 317 P-type MOS field effect transistor First pair of transistor 320 P-type MOS field effect transistor 325 N-type MOS field effect transistor Transistor The second pair of transistors 330 P-shaped MOSFETs 335 N-shaped MOSFETs 315 The second input transistor 3 16 gate 4SIS / 200107TW; 90P47 This paper size applies to Chinese national standards ( CNS) A4 specification (210 X 297 mm) 541792 345 second output transistor 360, 365 input nodes 375, 380, 385, 390 node A7 B7 V. Description of the invention (Η) 340 first output transistor 350, 355 inverter Phaser 370 Output Nodes 391, 392 Impedance Invention Detailed Description The circuit described below is composed of a field effect transistor (FET). However, the circuit described in the present invention is not limited to the use of field effect transistors, and is not limited to other transistors such as bipolar junction transistors, or field effect transistors and bipolar junction transistors. Combination, or any other kind of similar technology. In addition, the invention can be applied in different ways, such as for a single component or integrated circuit. Please refer to FIG. 2a. The first preferred embodiment of the present invention includes a first input transistor 210, preferably a metal-oxide-semiconductor field effect transistor element, and a second input transistor 215, preferably an N-type transistor. Metal oxide semiconductor field effect transistor element. A first pair of transistors includes P-type MOSFETs 220, N-type FETs 225, and a second pair of transistors includes P-type MOSFETs 230, N Type metal oxide semiconductor field effect transistor 235. A first output transistor 240 is preferably a P-type MOSFET, and a second input transistor 245 is more preferably an N-type MOSFET. The output driving circuit further includes inverters 250 and 255. Assume that the output node 270 is started to be pulled up, and the input nodes 260 and 265 respectively receive high signals (high 4SIS / 200107TW; 90P47) from the pre-driver (not shown) 5 This paper standard applies the Chinese National Standard (CNS) A4 specification ( 210 X 297 mm) —i --------- Installation -------- Order --------- (Please read the precautions on the back before filling this page) Economy Ministry of Intellectual Property Bureau, printed clothing for consumer cooperatives 541792 A7 B7 V. Description of invention (b) (Please read the precautions on the back before filling this page) signal). The process of pulling down is described below. Both the source and gate of the P-type MOSFET 210 are pulled up, and the P-type MOSFET 210 is turned off. The source of the N-type metal oxide semiconductor field effect transistor 215 is grounded and its gate is pulled up, so the N-type metal oxide semiconductor field effect transistor 215 is turned on. The inverter 250 outputs a low signal. The output node of the inverter 250, the gate of the P-type MOSFET 220 and the gate of the N-type MOSFET 225 are coupled together. Since the gate of the P-type metal-oxide semiconductor field-effect transistor 220 receives a low signal and its source is connected to the reference voltage, the P-type metal-oxide semiconductor field-effect transistor 220 is turned on. The N-type metal-oxide-semiconductor field-effect transistor 225 is just the opposite and is in the off state. Because its gate is pulled down and its source is pulled up due to the coupling with output node 270. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. When the N-type MOSFET is turned off, no current flows through node 280. So node 280 traces the high voltage of node 270. At this time, the P-type semiconductor field effect transistor 240 is turned off. Since the inverters 250 and 255 output low signals and the transistors 220, 225, and 230 and 235 are symmetrical, it is possible to obtain a P-type MOSFET 230 and an N-type MOSFET Crystal 235 turned off as a result. The gate and the node 290 of the N-type metal oxide semiconductor field effect transistor 245 are coupled. The node 290 follows the high voltage 节点 of the node 270, and the N-type metal oxide semiconductor field effect transistor 245 is turned on. It must be noted that the above operations are essentially completed at the same time. Both N-type MOSFETs 215 and 245 are turned on and operate in the saturation region. From the perspective of the output node 270, N-type metal-oxide-semiconductor field-effect transistor 4SIS / 200107TW; 90P47 6 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 541792 Employee Consumer Cooperative of Intellectual Property Bureau, Ministry of Economic Affairs Print A7 B7 V. Description of the invention (q) 215 and 245 are like two parallel output impedances. Because the N-type metal-oxide-semiconductor field-effect transistor 215 operates in the saturation region, its output impedance is high. Because the voltages at the nodes 290 and 270 are high, the N-type metal-oxide-semiconductor field-effect transistor 245 is in a diode-connect configuration, so its output impedance is low. The N-type metal-oxide-semiconductor field-effect transistor 245 provides most of the output impedance of the output driving circuit shown in Fig. 2a. By carefully selecting the size ratio N between the N-type MOSFET and the N-type FET 245 with size B, a high linearity can be obtained during the transition. Output (current / voltage) conversion curve. Here the size of the transistor is defined as the (width / height) ratio of the component channels. In this way, the drive circuit can achieve the purpose of fixed impedance output. The P-type semiconductor field-effect transistor 230 and the N-type field-effect transistor 245 are turned on, and the output signal begins to decrease due to the pull-down process, and the drain voltage of the N-type metal-oxide-semiconductor field-effect transistor 215 decreases. Eventually, the N-type metal-oxide-semiconductor field-effect transistor 215 enters the triode region, and the output impedance in the triode region is much lower than that in the saturation region. At the same time, the voltage at node 290 starts to decrease, as does the output node 270. The output impedance of the N-type MOSFET 245 becomes higher and higher until the transistor 245 is turned off. Assume that the output node 270 is initially pulled low, and the input nodes 260 and 265 receive low signals from the front-end driver (not shown), respectively. A lifting process is described below. The source and gate of the P-type metal-oxide semiconductor field-effect transistor 210 are pulled down, and the transistor 210 is turned on. N-type metal-oxide-semiconductor field-effect transistor 4SIS / 200107TW; 90P47 7 This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) ---------------- --- Order --------- (Please read the notes on the back before filling out this page) Printed by the Intellectual Property Bureau Employee Consumer Cooperative of the Ministry of Economic Affairs 541792 A7 B7 V. Source of Invention Note & 215 Is extremely grounded and its gate is pulled low, so transistor 215 is turned off. The inverter 250 outputs a high signal. The output node of the inverter 250, the gate of the P-type metal-oxide-semiconductor field-effect transistor 220 and the gate of the N-type metal-oxide-semiconductor field-effect transistor 225 are coupled together. Since the gate of the p-type MOSFET 220 receives a high signal and its source is connected to the reference voltage, the P-type MOSFET 220 is turned off. The N-type metal-oxide-semiconductor field-effect transistor 225 is just on the contrary, because under the coupling condition with the output node 270, its gate is pulled up and its source is pulled down. When the P-type metal-oxide-semiconductor field-effect transistor 220 is turned off, no current flows through the node 280. So node 280 tracks that node 270 has low voltage 値. At the same time, the P-type MOSFET 240 is turned on. Since the inverters 250 and 255 output high signals and the transistor pairs 220, 225, 230, and 235 are symmetrical, it can be easily concluded that the P-type metal-oxide-semiconductor field-effect transistor 230 is off, and the N-type metal-oxide The semiconductor field effect transistor 235 is turned on. The N-type metal oxide semiconductor field effect transistor 245 is coupled to the node 290. The node 290 follows the low voltage 値 of the output node 270. The N-type metal oxide semiconductor field effect transistor 245 is in an off state. It must be noted that all of the above operations are done substantially simultaneously. The P-type MOSFETs 210 and 240 are both on and operating in a saturated region. Judging from the output node 270, the P-type MOSFETs 210 and 240 resemble two parallel output impedances. Because the p-type metal-oxide semiconductor field-effect transistor 210 operates in the saturation region, its output impedance is high. Since the voltages at node 280 and output node 270 are both low, the P-type metal-oxide semiconductor field effect transistor 240 is in a triode connection configuration. So P type 4SIS / 200107TW; 90P47 8 This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) — l · --------- install ------.-- -Order ---------- S— < Please read the notes on the back before filling out this page) 541792 A7 B7 V. Description of the invention (gas) (Please read the notes on the back before filling out this page The output impedance of the metal oxide semiconductor field effect transistor 240 is quite low. The P-type metal-oxide-semiconductor field-effect transistor 240 contributes most of the output impedance of the output driving circuit shown in Fig. 2a. By carefully choosing the ratio between the P-type MOSFET 210 of size A and the P-type MOSFET 240 of size C, a highly linear output can be obtained at the time of conversion. (Current / Voltage) Conversion Line. The size of the transistor is defined here as the (width / length) ratio of the element channel. In this way, the drive circuit can achieve the purpose of fixed impedance output. N-type FET 225 and P-type FET 240 are turned on, and the output signal starts to rise due to the pull-up process. The drain voltage of P-type MOSFET 210 increase. Eventually, the P-type metal-oxide-semiconductor field-effect transistor 210 enters the triode region, and the output impedance in the triode region is much lower than that in the saturation region. At the same time, the voltage at node 280 starts to increase, as does the node 270. The output impedance of the P-type metal-oxide semiconductor field-effect transistor 240 becomes higher and higher until the transistor 240 is turned off. In order to achieve the purpose of the present invention, the present invention has the embodiments described in Figs. 2b, 2c, and 2d. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. In Figure 2b, the N-type metal oxide semiconductor field effect transistor 211 receives the signal of the input node 260 via the inverter 250. It is assumed that the output node 270 initially has a high signal, and the input nodes 260 and 265 receive the high signal from the front-end driver, respectively. The N-type metal oxide semiconductor field effect transistor 215 is turned on. The gate of the n-type metal oxide semiconductor field effect transistor 211 receives a low signal from the inverter 250, so the N-type metal oxide semiconductor field effect transistor 211 is turned off. It is easy to know that 4SIS / 200107TW; 90P47 9 ^ Paper size is applicable to Chinese National Standard (CNS) A4 (21〇 X 297 public love) " " 541792 A7
五、發明說明（\<?) 圖2b的操作與圖2a中的輸出驅動電路的操作相同。 (請先閱讀背面之注意事項再填寫本頁) 在圖2c中，P型金氧半導體場效電晶體216經由反相 器255接收輸入節點265之訊號。假設輸出節點270有高 訊號，且輸入節點260及265分別由前級驅動器接收高訊 號。P型金氧半導體場效電晶體210開啓，且P型金氧半 導體場效電晶體216關閉。P型金氧半導體場效電晶體216 的閘極由反相器255接收低訊號，因此P型金氧半導體場 效電晶體216關閉。很容易可得知圖2c的操作與圖2a中 的輸出驅動電路的操作相同。 在圖2d中，是利用N型金氧半導體場效電晶體212 和P型金氧半導體場效電晶體217，不需要任何反相器。 很容易可由圖2a中類似的輸出驅動電路，來推測圖2d中 的輸出驅動電路的結果。 爲保護本發明的驅動電路，不被靜電釋放效應 (Electro Static Discharge, ESD )破壞，本發明於電路中 使用阻抗，如圖3a、3b、3c及3d所示。 經濟部智慧財產局員工消費合作社印製 比較圖3a及圖2a，阻抗391連結於N型金氧半導體 場效電晶體325之源極和輸出節點370之間。阻抗392連 接於P型金氧半導體場效電晶體330之源極和輸出節點 370之間。阻抗391和392分別提供當靜電釋放效應產生 時的放電途徑，從而保護在電路中之電晶體元件。圖3a 之輸出電路的操作方式基本上和圖2a相似。 圖3b也是揭露和圖2b相似的輸出電路，且含有靜電 釋放效應的保護裝置。圖3b之輸出電路的操作方式基本上 4SIS/200107TW; 90P47 in 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 541792 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（丨\) 和圖2b相似。 圖3c也是揭露和圖2c相似的輸出電路，且含有靜電 釋放效應的保護裝置。圖3c之輸出電路的操作方式基本上 和圖2 c相似。 圖3d也是揭露和圖2d相似的輸出電路，且含有靜電 釋放效應的保護裝置。圖3d之輸出電路的操作方式基本上 和圖2d相似。 以上的說明書以特定的較佳實施例說明本發明。然而 在不脫離本發明的範圍與精神之下，本發明可以許多修改 方式實施之。上述說明書和圖式應該爲說明性質，而非限 定本發明的範圍。因此本發明的範圍涵蓋所附之申請專利 範圍及其均等的變化與修改。 4SIS/200107TW: 90P47 11 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） I-----------裝--------訂--------- (請先閱讀背面之注意事項再填寫本頁)5. Description of the invention (<?) The operation of FIG. 2b is the same as that of the output driving circuit in FIG. 2a. (Please read the precautions on the back before filling this page.) In Figure 2c, P-type metal-oxide-semiconductor field-effect transistor 216 receives the signal from input node 265 via inverter 255. It is assumed that the output node 270 has a high signal, and the input nodes 260 and 265 receive high signals from the front-end driver, respectively. The P-type metal-oxide semiconductor field-effect transistor 210 is turned on, and the P-type metal-oxide semiconductor field-effect transistor 216 is turned off. The gate of the P-type MOSFET 216 receives a low signal from the inverter 255, so the P-type MOSFET is turned off. It is easy to see that the operation of Fig. 2c is the same as that of the output driving circuit in Fig. 2a. In FIG. 2d, N-type metal-oxide-semiconductor field-effect transistor 212 and P-type metal-oxide-semiconductor field-effect transistor 217 are used, and no inverter is required. The result of the output drive circuit in Figure 2d can be easily inferred from the similar output drive circuit in Figure 2a. In order to protect the driving circuit of the present invention from being damaged by Electro Static Discharge (ESD), the present invention uses impedance in the circuit, as shown in Figs. 3a, 3b, 3c and 3d. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. Comparing Figure 3a and Figure 2a, the impedance 391 is connected between the source of the N-type metal-oxide semiconductor field effect transistor 325 and the output node 370. The impedance 392 is connected between the source of the P-type metal oxide semiconductor field effect transistor 330 and the output node 370. The impedances 391 and 392 respectively provide a discharge path when an electrostatic discharge effect occurs, thereby protecting the transistor components in the circuit. The operation of the output circuit of Figure 3a is basically similar to that of Figure 2a. Fig. 3b also discloses a protection device similar to Fig. 2b and including an electrostatic discharge effect. The operation mode of the output circuit in Figure 3b is basically 4SIS / 200107TW; 90P47 in. This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm). The invention description (丨 \) is similar to FIG. 2b. Figure 3c also reveals a protective device similar to Figure 2c with an electrostatic discharge effect. The operation of the output circuit of Fig. 3c is basically similar to that of Fig. 2c. Fig. 3d also discloses a protection device similar to Fig. 2d and including an electrostatic discharge effect. The operation of the output circuit of Fig. 3d is basically similar to that of Fig. 2d. The above description illustrates the invention with specific preferred embodiments. However, the present invention can be implemented in many modifications without departing from the scope and spirit of the invention. The above descriptions and drawings should be illustrative in nature and should not limit the scope of the invention. Therefore, the scope of the present invention covers the scope of the attached patent application and its equivalent changes and modifications. 4SIS / 200107TW: 90P47 11 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) I ----------- installation -------- order --- ------ (Please read the notes on the back before filling this page)