TW538332B - Power on-off periods auto-testing system of computer equipment and the method thereof - Google Patents

Abstract

A power on-off periods auto-testing system for computer equipment comprises a remote host computer, a data bus circuit, a plurality of data access transmission circuit, a plurality of data transmission lines, a power on-off periods switching unit. With these circuit arrangement, the present invention conducts the automatic testing on power on-off periods for a plurality of tested computers. The testing computer will transmit the generated power-on-testing error codes to the data input port of the data bus circuit through the connected data access transmission circuit in the on-off cycles of the testing power, and transmit to and record on the remote host computer with the power-on-testing error code transmitted from each testing computer through the data access transmission circuit.

Description

538332 V. Words of invention (1) 1. Field of the invention: The present invention relates to the testing technology of computer equipment. The source switch cycle automatic test of computer equipment refers to-2. Background: /. Test method. -The newly-developed electrical post is placed in the trial production stage. The brain device is tested in various aspects to ensure its product quality. In the test of the reliability project, the power switch cycle test (i > 〇wJ

TeSt) is a very important product reliability test item. In the design of computer systems, every time the computer starts up, the Electrical Input-Input System (BI OS) will perform a sequence test on the hardware of the system. The computer system's display, keyboard, memory, and testing. This is the system self-test process (On Sen Test) performed when the computer is turned on-generally referred to as _. When the self-test procedure of the computer system is started, if any device is detected to have an error, a corresponding boot-test error code (p〇ST co〇de) will be generated. For example, when a memory test detects an error, a memory test error message is displayed on the computer screen, or an alert sounds. Most personal computer systems that are widely used at present follow the definition of the IBM standard error codes. For example, the error code 2 0 indicates a tenth body test error (% e m 0 r y τ e s t F a i 1 e d). Users and technicians can query the system error according to the definition of this error code. And for a computer manufacturer, an assembly manufacturer, or a maintenance manufacturer, the boot-up test error code is an important test message. When testing the power switching cycle, the current test method,

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V. Inventor's note: It is often necessary to continuously test the power switch for more than 200 times or more than 3 days. Each computer machine tested must pass the test. Without # errors or crashes, Only then can we ensure that the product of the computer equipment depends on 'θ degrees, before considering mass production. However, in the current power switch cycle test technology or method, if one or two or more errors occur during the test, it is often impossible to completely record the bad phenomenon. Because when the computer under test is restarted, and the system cannot be started normally, the error message is: 戍 = error code will disappear after shutdown, making it difficult to trace the error ^^. In the current testing technology, only a specific file can be recorded after each power-on and system boot (System Boot), and its counter value is increased by 1, and the test result data of the floppy disk or hard disk exists. (File Report File), or a dedicated person at any time to record the power supply execution results and undesirable phenomena of each tested computer and each time the computer circuit is turned on and off. However, this traditional test method is neither perfect nor efficient. The invention is summarized as follows: ==, = The main purpose of the invention is to address the lack and consistency of the aforementioned conventional technology, and to develop a computer power switch cycle test system = wj, which can fully record the test process The execution status of the power switch cycle of each tested brain machine and each tested computer machine Another object of the present invention is to provide a computer power switch cycle automatic 'three systems' which is implemented by a remote host Control computer monitors several computers under test 538332 at the same time 51. Invention description (3) :: household = = executive power supply, I ~ spear 庠 + hold the record, Ya Ke can turn on the power from # r 21: ϊ 生Start-up test_send to the remote master control unit i Ύ f than the car parent or generate a test result report. Yuedian and Fenki—The purpose is to provide—a convenient way to perform follow-up error tracking in: Open: System, test engineer Ϊ: Record results of a specific slot case, 4: ... test each on the computer machine ;: The detailed implementation of turning off the power: ί computer machine period since 2: work :: heavy :, prepared by the power switch on the machine to perform power gating on the machine to know the number of tested computers ^ t ^ ^ ^ VI ^ When transmitting the power & generating the startup test error code, the data collection test error code can be manipulated, and then read by the machine test error code and merged 1 :: " The control computer, a preferred embodiment of the eleventh embodiment includes a circuit, a plurality of pieces of data to be transmitted, a set circuit, a plurality of pieces of data to be retrieved and transmitted through the above-mentioned circuit, a source switching period switching unit, and an automatic test of the source switching period. Xi, during the D-switching test cycle of the computer machine, just test the power on and off cycle, 2 computer machine is connected to the power switch cycle to retrieve the data and send the second test error code through the port, and then the data Data input circuit of capture circuit 538332 transmitted by each computer under test V. Description of the invention (4) Boot test error code Other examples of the present invention and attached schematic diagrams Brief diagrams 1 shows the connection diagrams 2 shows the wave diagrams 3 shows Figures, computer graphics, four series of display blocks, and five series of display numbers are illustrated. 1 11 12 13 14 1 5 16 17 For further explanation: Show this hair, but do n’t show the shape of this hair; Show this hair and the machine ’s display. The map and the data display are sent and recorded in the remote host computer. The design and its design will be explained in the following preferred implementation steps, where: 5 The connection circuit diagram of the data collection circuit of the switching cycle test power supply used in the Ming Dynasty, the data collection circuit, the remote master computer, and the tested connection diagram; the further circuit of Ming Ming's data acquisition transmission circuit and the data acquisition The connection relationship diagram between the transmission circuit and the computer circuit under test; the control flow chart of the Ming. The remote main control computer central processor main memory lean bus address address bus control PCI bus PCI bridge

Page 7 538332 V. Description of the invention ⑸ 2 Data collection circuit 2 la, 21b " · 21η data buffer 2 2a, 22b ··· 22η and gate 3 a, 3b · 3n data acquisition and transmission 3 1 data pin Locks, 3 2 and gates 4 a, 4b ... 4n Data transmission line 5 Power switch cycle 6 a, 6b ... 6n Tested computer 6 1 Central processing unit 6 2 Main memory 6 3 Data bus 64 Address bus 6 5 Control bus 6 6 PCI bridge 6 7 Description of a preferred embodiment of the PCI bus: First, refer to FIG. 1, which is a schematic diagram showing the connection of the automatic test system for the power switch cycle of the computer equipment of the present invention. The test system includes a remote control computer (Remote Control PC) 1, a data collection circuit (Data Acquis i 1: ion Dev ice) 2, a plurality of data acquisition and transmission circuits (Data Port Capture Dev ice) 3a, 3b " 々η, multiple data transfer cables (Data Transfer Cable) 4a, 4b ... 4η, a power switch cycle

Page 8 538332 V. Description of the Invention (6) Period Switching (On-0ff Cycies Switch Unit), through the above-mentioned circuit arrangement, 'the automatic switching cycle of the plurality of computer computers 6a, 6b ... 6n can be performed. test. The data collection circuit 2 can be made into a card type, and can be inserted into the bus of the remote main control computer 1, such as the PCI bus slot (pci Bus S10t), Each data port (Data Port) or data channel: Each data port is connected to a data acquisition transmission circuit 3a, 3b via a data transmission line 4a, "... rainbow, respectively. The data acquisition transmission circuit 3a, 3b " · 3η may also be Made into a card type, which can be inserted into the bus of the computer under test, 6b. &Quot; 6n, such as a PCI bus slot. (Each ACV 'of the PCI Bus is powered by electricity. , ACV '(see Figure 2 Xiaoxiao (Ding 1)), and the power supply is scheduled to be supplied when 6a, 6 b… 6n is opened. : Brain machine 6a source switch cycle switching switch cycle switching single, its power output output is shown as 2), for example, its power green is turned off (Power off cycle test, so the number of off operations can be displayed. The connection diagram between this issue and the data bank, main memory 1 2, 6b ... 6 The switching cycle test power supply unit n is provided by the unit 5. In this embodiment, the AC power is obtained by an AC power source ACV. The switching cycle test power supply has a Power On time of 50.

Of f) time is 5 seconds (T2). In this week, the power supply A C V to each computer 2 under test is planned to be used in the future. The data collection circuit 2 will be used in the future— + circuit 2 and the remote master computer, =. The remote master computer 1 includes: = data bus 1 3, address stream

538332 V. Description of the invention ⑺ 1 4. Control bus 1 5, PC I bridge 16, and pc I bus 1 7 known components. The data collection circuit 2 includes a plurality of data buffers (Date Buffers 21a, 21b ... 21n ', each data buffer 2 缓冲器 &, 21b ... 21η data bus UD Bus) is connected to the remote master control PCI bus 17. In addition, the data collection circuit 2 includes a plurality of gates 22a, 22b ... 22η ', and one of the inputs of each of the gates 22a, 22b ... 22η is connected to the output signal of the PCI bus #.丨 ⑽, and 'the other input is connected to the remote master control computer respectively selected input: 38〇 ~ 39CH). By using the input / output device to read the signal and the input / output address signals, the output terminals of the AND gates 22a, 22b ... 22n generate an enable signal to the data buffers 21a, 21b ... 2in = Terminal G, and optionally enable the data buffer. Each data buffer 21a, 21b of the moon dagger " · 2ΐη data wheel 嫜 ρ2, P2 ... pn is a data manipulation transmission circuit &, 3b via a data transmission line 4a, 4b ... stomach m1 '6a, 6b 611 ... 3n. 2 Transmission lines 4a, 4b ... 411 can use the standard 9mm transmission cable, such as the 9th green transmission cable, 8 of which is connected to the power-on test error code f In addition to the eight bits-a line is connected to the computer under test: at first, replies Γ〇 ^^^^ Power 〇n) ^ to transfer nickel. Wooden dagger-shaped sad sorrow information Figure 4 is a block diagram showing the data extraction of the present invention, and the data toss you further circuit of the electric call

1 ^ · Page 10 538332 V. Description of the invention (8) Collect the connection relationship diagram between the circuits. The tested computer, such as the first tested computer 6a, includes a central processing unit 61, a main memory 62, a data bus 6 3, an address bus 64, a control bus 65, and a PCI bridge. Device 6 6 and PC I busbar 67 and other conventional components. The data acquisition and transmission circuit 3a includes a data latch 31, and its data bus (Ad Bus) is connected to the PC I bus 67 of the computer 6a under test. In addition, the data acquisition and transmission circuit 3a includes a sum gate 32, and one input terminal is connected to the input / output device write signal I 0W generated by the PCI bus 67 of the computer 6a under test, and The other input is connected to

One of the input / output port addresses (for example, 0) of the text measurement computer 6a. By reading the I / O device write signal 10W and the I / O port address signal, the output terminal of the AND gate 32 can generate an enable signal and send it to the enable latch G of the data latch 3 丨, and can choose to enable Can the data latch. The data wheel out port DO ~ D7 of the data latch is connected to the second lean wheel input port P1 of the data collection = 2 via the data transmission line 4a. In this way, the computer under test can be turned on and tested The boot test error code (p0sT 3 generated during the process passes the data latch, the data transmission line, and the data host computer. &Amp; ”¥ When the back host computer is starting丨 丨 " Μ5 Π ancient ,.

Take the data on the circuit of the circuit-tested electricity and start to buy 5. ^ The information of the 151 cases where the machine is connected to the machine and the address of each machine are recorded on the computer of the machine. The start-up test error of s is that each of the δ purchased by δ is in the memory or disk. and

Page 11 538332 V. Description of the invention (9) During the test of each tested computer machine, ~ a% of each tested computer is displayed in real time and the electric machine is tested. It is also possible to store the startup test error code in the test error code of the machine, or to store it in. The memory or disk of a computer system with a fork test. Figure 5 shows the present invention and is jealous of the annual structure shown in Figures 1 to 4. Figure 2 is an example control flow chart, and the main steps of the present invention are provided. The processing steps are described later. The ACV is tested during the switching cycle, and the switching unit 5 is supplied by the deadline. Each of the main test computer units 6a, 6b ... (step 101). During the switching cycle, test each of the computer computers 6a, 6b, and — > --- during the production period, (step 102), and start the self-test program at the power door to open the source and test the error code. c. Heart original :: from :: in the test file generated in the test file (step 1fm ten _ stored in the memory or disk in its prominent :.) 'You can also display the boot test error horse ^ In step 1 (| 4, each data acquisition and transmission circuit 仏 = measures Γ 嶋 6a, 6b. After performing the power-on self, η's power-on test error code is retrieved and stored in the data latch of the transmission circuit. In each case: test: "code ... take" and send it to ^ host 6 control for storage, the remote host computer 1 can store the boot test error code + specific code stored in memory or disk In the case (step _6 ^ = page 12 5. Description of the invention (10) The start-up test is generated by the above-mentioned main control computer and the execution status of each tested computer at the same time. The result of the re-examination case is related to the detailed use value of the power supply. It can be seen that the station (for example, 8 executes the power supply and can transmit the error code to the table. Therefore, the test host computer can easily know the result. Therefore, the error code Explain that the monitoring machine is recording the test error results End, you can execute -16 of the display inventions) Turn on the power to the remote test project and test each test, the test of the test is the test of the test power I turn on the independent power control personnel only computer test computer clear tool When I use the brain-computer program, I test my brain. I need to test the machine at the far end of each height of the machine on the test platform, and use the generated program as a specific time for the comparison time. Only the description of the preferred embodiments of the present invention, those skilled in the art can make other improvements and changes based on the description of the above embodiments of the present invention. However, these improvements and changes made according to the embodiments of the present invention , It still belongs to the spirit of the invention and the scope of patents defined below.

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Claims (1)

VI. 1. The sources of lightning for various types of computer equipment in the scope of patent application include: a remote master control computer; an automatic test system for the sweat cycle; a data collection circuit; a data buffer buffer for the material buffer; The data buffer is controlled by the bus of the host computer; the enable signal generated by the host computer; multiple data acquisition transmissions; " includes a data lock cry, ^ ^ material acquisition One of the data in the transmission circuit is collected. The second signal is controlled by the "signal generated by the oral brain f stage: after the stern latch is connected, its 2 cycle switching unit is used to obtain the AC ESC from an AC power source. IAS = the source end. Output switch cycle test power supply, and # library ζ, each fork test computer machine; Hong 7 JL supply to ΐ ΐ J brain ΐ when the test is performed 'will self-open through the data collection circuit to read each-test computer machine The execution status that occurred when the computer of the power supply test was executed, and recorded the power-on test error code of each χ money port. The power on of the computer equipment described in the application 4 f 'issue scope item 1 Close cycle, white, and white Φ ^ "" system, where the data collection circuit is made into a card type, which can be inserted in the PC I bus slot of the main control computer at 拎, 土 # 遗 遇 端. If you apply The power switching cycle of the computer equipment described in item 1 of the patent scope 'Applicable ft patent scope self-testing system' can be inserted %% patent patent self-testing system is captured by a circuit through this information. Is the data transfer wheel and line test computer machine in the ground test system in the start-up period 4¾) -g-, in Xi Γ, the data acquisition and transmission circuit is made of a card-type μ fork test computer machine? (^ Bus slot . The system of power generation reward 1 system, the power switch cycle of the computer equipment described in the item = the transmission line is connected to extract the data = test the test error code sent by the computer machine, the transmission line is sent to In the data collection circuit, the cycle of the power switch of the computer equipment described in item 4, first, wherein the data transmission line includes a plurality of signals as data signal lines, and also includes a line connected to the receiving work. Power to judge the subject Between computer equipments: From the cycle of the power switch of the computer equipment described in item 1 above, the code is incorrect; ρ ΐ, where the startup test generated by the computer equipment under test is displayed on the computer equipment under test, and The start-up test code is stored in the computer under test. Since the power switch cycle gas system of the computer equipment described in item 1 of the Ming patent, the data collection circuit includes a number of exchanges: 1! &Amp; One of the input terminals of the brake is connected to the read signal of the input and output device generated by the remote host computer, and the other input terminal 538332 is applied to the selected wheel in the remote host computer and the input and output are connected respectively. The device reads the signal and turns in and out of the port :, ^ binds the address, and generates an enable signal by the month & w 、 Bamboo buffer 8. The automatic test system for computer equipment as described in the first item of the scope of the patent application, wherein the data capture and transmission power supply, switching cycle switch, each and one of the input terminals of the switch are connected Including one and the input and output device write signal generated by the bus, the computer is connected to the selected input and output bee in the tested computer machine, and the other input terminal is the input and output device write signal and the input and output port address signal. : Lstop 'sends the enable signal to the enable terminal of the output of the data latch and the brake by the output terminal. 9 · The power switch cycle of a computer device is automatically tested by the main control computer. The test is performed on a plurality of computers under test. The remote main control computer is connected with a piece of data. A computer is connected with a data acquisition two circuit, and each method includes the following steps: bite the circuit, this test supplies a switching cycle test electricity in the engraving week # month test power supply during the power supply several calls for the power-on self-test procedure 、 == The test computer is connected to the test error code by each data acquisition and transmission circuit; when the power is turned on and the self-test procedure is performed, the brain computer is in charge; it is retrieved and stored in each data. In the latch · 538332 6. The scope of the patent application and the data collection circuit will read the computer under test captured in each data acquisition and transmission circuit: the test error code of the computer is read and transmitted to the remote end. In the host computer. 1 0. The automatic test method of the power switch cycle of computer equipment as described in item 9 of the scope of the patent application, which further includes storing the startup test error code generated by each computer computer under test in the memory of the computer computer under test Volume or disk. 1 1. According to the automatic test method of the power switch cycle φ of the computer equipment described in item 9 of the application scope, it further includes displaying the startup test error code generated by each tested computer machine on the display of the tested computer machine. step. 1 2. The method for automatically testing the power switch cycle of a computer device as described in item 9 of the scope of the application, which further includes storing the startup test error code generated by each tested computer machine in the remote master computer. Step t in memory or disk. 1 3. According to the automatic test method of the power switch cycle of the computer equipment as described in item 9 of the scope of the application, it further includes displaying the startup test error code generated by each tested computer machine on the remote master computer Steps on the display Page 17