TW530281B - Energy recovery driving circuit and method with current compensation for AC plasma display panel - Google Patents

Energy recovery driving circuit and method with current compensation for AC plasma display panel Download PDF

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Publication number
TW530281B
TW530281B TW89116178A TW89116178A TW530281B TW 530281 B TW530281 B TW 530281B TW 89116178 A TW89116178 A TW 89116178A TW 89116178 A TW89116178 A TW 89116178A TW 530281 B TW530281 B TW 530281B
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Taiwan
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switch
display panel
current
plasma display
inductor
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TW89116178A
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Chinese (zh)
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Chern-Lin Chen
Chen-Chang Liu
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Chern-Lin Chen
Chen-Chang Liu
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Abstract

A kind of energy recovery driving circuit and method using current compensation and parallel resonance to drive AC plasma display panel are disclosed in the present invention. The plasma display panel is approximately equal to a loaded capacitor that sustains the display of an image signal through continuous charging and discharging. The driving circuit uses the parallel resonance generated between the external inductor and the plasma display panel to decrease energy loss of panel caused by rapid charging and discharging. In addition, by using current compensation to decrease voltage drop caused by the flowing of large current through the conduction resistance of the switch at the instant of plasma discharging, the wall charge accumulation is then increased so as to expand the operation voltage range of the plasma display panel. Furthermore, zero voltage switching can be obtained for all four switches of the voltage clamping circuit.

Description

530281 五、發明說明(l) 產業上之利用領域 一本發明係提供一種具有電流補償功能之交流型電漿顯 不面板(AC Piasma DlspUy panel,AC pDp)的驅動電 路與方法’尤指一種利用電感和電漿顯示面板等致電容的 ,7,振來消除電漿顯示面板由於急速地充放電而造成二 能量損失,並透過電流補償來提高電漿顯示面板操作電壓 範圍之驅動電路與方法。 ,漿顯示器有重量輕、厚度薄、視角廣、壽命長、對 比,南等優點,特別適用於高解析度電視(HDTV );請參 ,^二,,第一圖是電漿顯示器的構造圖,電漿顯示器主 f ^ f後二個失著放電氣體(通常是Ne和Xe混合氣體)的 反以及二個電極所組成,分別是掃描電極Y ( 、 scanning electrnHD 、 ” ctrode )、維持電極X ( sustairi electrode )以月 . .,^ L 疋址電極 A (address electrode ), 其中刖板的掃描雷;1¾ 祕:# & ^ ^ , 电枉和維持電極平行排列,而後板的定址 j亟^之垂直棑列;3夕卜,由於掃描電極和維持電極是由 透:月材料IT〇所構成,纟導通電阻較大,所以在其表面再 覆盍一層匯流排電極(bus electr〇de )以降低導通 阻,接著再依序覆蓋介電層(dleUctri(: Uyer )和 護層(乳.化鎮^ Mg〇 ),因此,電極之間便有等效電容存 在,其=,保護層除了保護電極免於受到電漿破壞之外, 也另外提供二次電子(sec〇ndary electron)幫助電漿解530281 V. Description of the invention (l) Field of application in the industry-The present invention provides a driving circuit and method of an AC Piasma DlspUy panel (AC pDp) with a current compensation function, especially a utilization Inductive and plasma display panels, such as capacitors, 7, vibrate to eliminate two energy losses caused by rapid charge and discharge of plasma display panels, and drive circuits and methods to increase the operating voltage range of plasma display panels through current compensation. The plasma display has the advantages of light weight, thin thickness, wide viewing angle, long life, contrast, and other advantages. It is especially suitable for high-definition television (HDTV); please refer to ^ 二, the first picture is the structure of the plasma display , The plasma display main f ^ f after the two missing discharge gas (usually a mixture of Ne and Xe gas) and two electrodes composed of scan electrode Y (, scanning electrnHD, ”ctrode), sustain electrode X (sustairi electrode) in months.., ^ L address electrode A (address electrode), in which the scan of the scan board; 1 ¾ Secret: # & ^ ^, the electrode and the maintenance electrode are arranged in parallel, and the address of the rear plate is urgent ^ The vertical queue; 3, because the scan electrode and the sustain electrode are composed of a transparent material IT0, the on-resistance is large, so a layer of bus electrodes (bus electrode) is coated on the surface. In order to reduce the on-resistance, the dielectric layer (dleUctri (: Uyer)) and the protective layer (emulsion ^ Mg〇) are sequentially covered, so there is an equivalent capacitance between the electrodes, which =, except for the protective layer Protects electrodes from plasma damage In addition also provides a secondary electron (sec〇ndary electron) plasma solution help

C:\tmp\patent. ptd 第4頁 530281 五、發明說明(2) 離;而定址電極覆蓋著紅、藍、綠三種螢光劑,將電漿放 電所產生的|、外光轉換成全彩可見光,並且在各個定址電 極之間有屏障支撐(barrier rib ),不但用來支撐前板 和後板,還可避免不同顏色的光互相干擾。 大部份交流型電漿顯示器顯示影像是採用「定址—顯 示一分離」(address-display-separation,ADS )的方 式;請參閱第二圖,一個電視晝面(TV f i e 1 d )被分成八 個子畫面(sub-field),而每個子畫面都是由重置 (reset)、定址(address)和顯示(display)三個區 段所組成,其中,在重置期間,利用高電壓(通常高於 34 0V )來點亮整片電漿顯示面板,讓所有像素(pixel ) 的起始狀態一致;於定址期間,根據所要顯示的影像,在 掃描電極和定址電極上分別提供掃描脈波(s c a n p u 1 s e ) 和資料脈波(data pu 1 se ),以便在適當的位置中植入壁 電荷(wa 11 charge );於顯示期間,在掃描電極和維持 電極上提供交錯的維持脈波(sustain pulse)以顯示影 像;而影像灰階則採用二進位制之發光長度 (binary-coded light-emission-period)的方式,也就 是說,八個子畫面之顯示區段的時間長度比為 1:2:4:8:16:32:64:128,因此,紅、藍、綠三種顏色各可 以表現出2U56灰階。 交流型電漿顯示面板具有記憶的特性;請參閱第三C: \ tmp \ patent. Ptd Page 4 530281 V. Description of the invention (2) Isolation; and the address electrodes are covered with three red, blue and green fluorescers, and the plasma and external light generated by plasma discharge are converted into full color Visible light, and barrier ribs between the address electrodes are not only used to support the front plate and the rear plate, but also to avoid interference of light of different colors. Most of the AC plasma displays use the "address-display-separation (ADS)" method; see the second picture, a TV day (TV fie 1 d) is divided into eight Sub-fields, each of which consists of three sections: reset, address, and display. During reset, high voltage (usually high) (At 34 0V) to illuminate the entire plasma display panel, so that the initial state of all pixels (pixels) are consistent; during the addressing period, according to the image to be displayed, scanning pulses (scanpu) are provided on the scanning electrodes and the addressing electrodes, respectively. 1 se) and data pulses (data pu 1 se), so as to implant wall charges (wa 11 charge) in the appropriate position; during the display, provide staggered sustain pulses on the scan electrode and the sustain electrode (sustain pulse) ) To display the image; and the gray scale of the image uses the binary-coded light-emission-period method, that is, the time length ratio of the display segments of the eight sub-screens is 1: 2 : 4: 8: 16: 32: 64: 128, so the three colors of red, blue, and green can each exhibit a 2U56 gray scale. AC plasma display panel has memory characteristics; please refer to the third

C:\trap\patent. ptd 第5頁 五 發明說明(3) 圖,在第三(a)圖中,在掃描電極 持脈波電壓Vs低於氣體的崩潰電°維持電極上提供的維 電;在第三(b)圖中,於定址電bd,因此不會有電漿放 資料脈波~和掃描脈波—Vy,而 〇掃描電極上分別加上 、,導致氣體放電;在第^三(〇 d + Vy )大於崩潰電壓 荷累積在介電層上,稱之為壁電@ 電水放電產生的電 此壁電荷會抵消外加電壓在氣體】w=u char§e),而 止放電;在第三u)圖中,當維採r跨壓,因此電漿會停 上的電壓為外加的維持脈波電壓和y皮二相壓則跨在氣體 :過由氣;::潰電壓,…會導;時 的累積抵消外加電壓,因此氣體停止解 :二;如第圖4。::維r波再度^ 弟一(ί)圖所不,练而言之,一旦氣體被 離而導致壁電荷累積’則提供交錯的維持脈波(Vs<Vbd) 可讓電聚持續放電’這就是交流型電漿顯示面板的記恒 性。 〜m 當我們提供維持脈波(sustain pulse )於掃描電 極和維持電極,對電漿顯示器的内部等效電容做充放電動 作時’對於每一次充電或放電,電源供應端必須提供 〇-5CP(Vs) 2的能量,其中cp是電漿顯示面板的等效電容, vs是電源供應端的電壓,然而,由於對電容性負載的兩 極突然短路或施加高壓,會在瞬間造成很大的電流而導致 能量被電路中的元件和電漿顯示面板的等效電阻消耗掉,C: \ trap \ patent. Ptd Page 5 of the fifth description of the invention (3), in the third (a), the scan electrode holding pulse voltage Vs is lower than the breakdown voltage of the gas ° maintaining the voltage provided on the electrode ; In the third (b) diagram, at the address bd, there will be no plasma pulses and scanning pulses — Vy, and 0 is added to the scanning electrodes, resulting in gas discharge; Three (〇d + Vy) greater than the breakdown voltage charge is accumulated on the dielectric layer, which is called wall electricity @ electricity water discharge. This wall charge will offset the applied voltage in the gas] w = u char§e), and only Discharge; in the third u) diagram, when weite r cross-pressure, the voltage at which the plasma will stop is the added sustaining pulse voltage and y-skin two-phase pressure across the gas: The voltage,… will lead; the cumulative time offsets the applied voltage, so the gas stops solution: two; as shown in Figure 4. :: dimensional r wave again ^ Di Yi (ί) diagram, not to mention, in practice, once the gas is removed and wall charges accumulate 'provide a staggered sustaining pulse (Vs < Vbd) can allow the electro-polymerization to continue to discharge' This is the record of AC plasma display panel. ~ M When we provide sustain pulses to scan electrodes and sustain electrodes, and charge and discharge the internal equivalent capacitance of the plasma display, 'For each charge or discharge, the power supply must provide 0-5CP ( Vs) 2 energy, where cp is the equivalent capacitance of the plasma display panel, and vs is the voltage at the power supply end. However, due to the sudden short-circuit or high voltage applied to the two poles of the capacitive load, a large current will be caused in an instant. The energy is consumed by the components in the circuit and the equivalent resistance of the plasma display panel.

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Shang

如果維持脈波的頻率是【,則、“ 2fCP(Vs)'2 ;因此,隨著j破消耗的能量功率等於 其内部等效電容也跟著變*水顯示面板的尺寸越來越大, 加;傳统電漿顯示哭的驅私φ於是,消耗的能量也跟著增 電感與電容乒椐動電路為了降低能量損耗,採用 、、^ ’使電漿顯示面板和缓地充放電。 電水在放電瞬間會產生 導通電阻存在,士 ♦泣 很大的電流,由於開關元件有 實際跨在電渡顯-^ Γ會在開關元件上產生電壓降,造成 電壓VS,進二二,反一端的電壓會小於外加維持脈波的 壓來維持電將技士 土累積,因此必須提供較高的電 波電壓摔作=R績放電,也就是說,電壓降會導致維持脈 秌tF乾圍會縮小。 【習知技術】 效雷踅^四圖,第四圖是習知運用電漿顯示面板之等 駆勤# :、感之間的串聯共振來減少能量損耗的能量回復 雷將g _,該驅動電路係用來驅動交流型電漿顯示面板; 電水4 =面板可用一等效電容Cp來表示,用來經由持續之 ^放電來維持_影像訊號的顯示;該驅動電路包含四個電 晶體Ml、M2、M3及M4組成的電壓掊制電路,其中一側由二 極體^、D2和電晶體M5、M6組成的雙向開關,再和電感u 和電谷Cssl形成串聯共振電路,另一側由二極體D3、D4和 電晶體M7、M8組成的雙向開關,再和電感L2和電容Css2形If the frequency of the sustaining pulse wave is [, then, "2fCP (Vs) '2; Therefore, as the energy consumed by j is equal to its internal equivalent capacitance, it also changes accordingly. The size of the water display panel is getting larger and larger. The traditional plasma shows that the driving force of crying is φ. Therefore, the energy consumed is also increased by the inductance and capacitance. In order to reduce the energy loss, the plasma display panel is slowly charged and discharged with. An on-resistance will be generated, and a large current will flow. Because the switching element actually crosses the electric current-^ Γ will cause a voltage drop on the switching element, causing a voltage VS. Enter two or two, and the voltage at the opposite end will be less than In addition to maintaining the pulse pressure to maintain the electrical accumulation of the technician, it is necessary to provide a high radio wave voltage drop = R discharge, that is, the voltage drop will cause the maintenance pulse tF to dry down. [Knowledge Technology ] The four pictures of the effect of lightning, the fourth picture is the conventional use of a plasma display panel, etc. Qin # :, series resonance between the senses to reduce energy loss energy recovery thunderbolt g_, the drive circuit is used to Driven AC Plasma Display panel; Electro-hydraulic 4 = The panel can be represented by an equivalent capacitor Cp, which is used to maintain the display of the _image signal through continuous ^ discharge; the driving circuit includes a voltage composed of four transistors Ml, M2, M3 and M4 A custom circuit, one side of which is a bidirectional switch composed of diodes ^, D2 and transistors M5, M6, and then forms a series resonance circuit with inductor u and valley Cssl, and the other side is composed of diodes D3, D4 and electricity A bidirectional switch composed of crystals M7 and M8, and then shaped as inductor L2 and capacitor Css2

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530281 五、發明說明(5) *------ 成串聯共振電路,而二極靜n 寄生元件所造成的振盪。、、D6、D7及D8則是用來抑制 請參閱第五圖,第五圖 其中,vP為電漿顯示面板等^第四圖驅動電路之時序圖, 圖之控制時序圖所顯示的^電容Cp兩端的電位差;第五 J挖制程序如下: 步驟一:在to之前,雷曰 開關為關閉的狀態,因此,=體祕1 &M4為導通狀態,其它 到電壓源¥3和接地線。 、聚顯示面板的兩端分別連接 步驟二:在10到11之間 晶體M6,此時電漿顯示面^,關閉電晶體M1,接著導通電 共振電路,電漿顯示面板的電感L1和電容Csd形成串聯 電感L1感應反向電動勢,淮電電流開始流過電感L1,該 %而產生共振電流。 步驟三··在11到12之n 電漿顯示面板的\電位t接日、乂 ^广说是共振半週期&後,當 认)X %丨取得近接地線,此時導通電晶體M3 段時間之後,再將電晶體 以便將Vx電位柑制在接地線, M6關閉。 步驟四:在t2到t3之間,將電晶體M4關閉,接著導通 電晶體M7,此時電漿顯示面板、電感L2和電容Css2形成串 聯共振電路,電漿顯示面板的放電電流開始流過電感L2,530281 V. Description of the invention (5) * ------ Oscillation caused by a two-pole static n parasitic element. ,, D6, D7, and D8 are used to suppress. Please refer to the fifth figure. In the fifth figure, vP is a plasma display panel, etc. ^ The timing diagram of the driving circuit of the fourth diagram, and the capacitor shown in the control timing diagram of the diagram. The potential difference across Cp; the fifth J digging procedure is as follows: Step 1: Before to, the Thunder switch is in the off state, so = body secret 1 & M4 is on, the other to the voltage source ¥ 3 and the ground wire . 2. The two ends of the poly display panel are respectively connected to step 2: crystal M6 between 10 and 11, at this time the plasma display surface ^, close the transistor M1, and then turn on the resonance circuit, the inductance L1 and the capacitance Csd of the plasma display panel A series inductance L1 is formed to induce a reverse electromotive force, and the Huai power current starts to flow through the inductance L1, and this% generates a resonance current. Step Three: At the n to 11 of the plasma display panel, the potential of the plasma display panel is connected to the day, and ^^ is widely known as the resonance half cycle & when it is recognized) X% 丨 gets near ground, at this time the crystal M3 is turned on. After a period of time, the transistor is again connected to ground the Vx potential and M6 is turned off. Step 4: Between t2 and t3, turn off the transistor M4, and then turn on the transistor M7. At this time, the plasma display panel, inductor L2 and capacitor Css2 form a series resonance circuit, and the discharge current of the plasma display panel begins to flow through the inductor. L2,

C:\tmp\patent.ptd 第8頁 530281 五、發明說明(6) 該電感L2感應反向電動勢,進而產生共振電流 步驟五:,在一4之間,也就是共振半週期之後 時刻t3時’當電漿顯不面板的、電位最接近電壓源 時導通電晶體M2以便將Vy電位掊制在%,一段時間之 再將電晶體M7關閉。C: \ tmp \ patent.ptd Page 8 530281 V. Description of the invention (6) The inductor L2 induces the back electromotive force and generates a resonance current. Step 5: Between 1 and 4, which is at time t3 after the resonance half cycle. 'When the potential of the plasma display panel is closest to the voltage source, the crystal M2 is turned on to control the Vy potential at%, and the transistor M7 is turned off after a period of time.

步驟六:在t4到t5之間,將電晶體M2關閉,接著導通 電晶體M8,此時電漿顯示面板、電感L2和電容id形成串 聯共振電路’電漿顯示面板的放電電流開始流過電感L2, 該電感L2感應反向電動勢,進而產生共振電流,而電感電 流方向和步驟四中的電流方向相反。 步驟七:在15到16之間,也就是共振半週期之後,當 電漿顯示面板的Vy電位最接近接地線,此時導通電晶體μ 4Step 6: Between t4 and t5, turn off the transistor M2, and then turn on the transistor M8. At this time, the plasma display panel, inductor L2 and capacitor id form a series resonance circuit. The discharge current of the plasma display panel begins to flow through the inductor. L2, the inductor L2 induces a reverse electromotive force, thereby generating a resonance current, and the direction of the inductor current is opposite to the direction of the current in step 4. Step 7: Between 15 and 16, that is, after the resonance half cycle, when the Vy potential of the plasma display panel is closest to the ground line, the crystal μ 4 is turned on at this time.

以便將Vy電位柑制在零電位,一段時間之後,再將電晶體 M8關閉。 S 步驟八:在t6到t7之間,關閉電晶體M3,接著導通電 晶體M5,此時電漿顯示面板、電感L1和電容c⑻形成串聯 共振電路’電漿顯示面板的放電電流開始流過電感L1,該 電感L1感應反向電動勢,進而產生共振電流,而電感電流 方向和步驟二中的電流方向相反。In order to set the Vy potential to zero, the transistor M8 is turned off after a period of time. Step 8: Between t6 and t7, turn off transistor M3, and then turn on transistor M5. At this time, the plasma display panel, inductor L1, and capacitor c form a series resonance circuit. The discharge current of the plasma display panel begins to flow through the inductor. L1. The inductor L1 induces a reverse electromotive force, thereby generating a resonance current, and the direction of the inductor current is opposite to that of the current in step 2.

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步驟九:在17 7也就是共振半週期之饴 本 時刻t7時,當電漿顯示面板的v 之後,名 時導:電晶舰以便將Vx電位扭制在 =門: 後’再將電晶體M5關閉。 s 仅叶間之 由待續步::放= 二電::—經 第四圖中的電路利用外加電感和電漿顯示面板等效電 谷之串聯共振,減少電漿顯示面板在電壓源%和接地線之 間做切換時所消耗的能量;請參閱第六圖,第六圖是使用 第四圖中的電路來點亮八吋電漿顯示面板,所量測到跨在 電漿顯示面板的電壓以及流過面板的電流波形;由第六圖 中看出,當電漿顯示面板兩端的跨壓到達vs或—時,電漿 開始放電,而在電漿放電的瞬間會產生很大的電流,由於 電晶體上有導通電阻存在,該大電流流過電晶體時會產生 不小的電壓降,此電壓降會導致電漿顯示面板兩端的跨壓 瞬間減小,進而減少壁電荷的累積,也進而縮小了電漿顯 示面板操作電壓的範圍。 【發明之目的】 因此本發明的主要目的是在提供一種具有電流補償功 能之電漿顯示面板的能量回復驅動電路與方法,利用電感Step 9: At 17 7 which is the moment of the resonance half cycle at this moment t7, when the plasma display panel v, the time guide: the crystal ship so as to twist the Vx potential at = gate: and then the transistor M5 is off. s Only leaves the ground to be continued :: put = two electricity ::-the series resonance in the circuit shown in the fourth figure using the additional inductor and the equivalent valley of the plasma display panel, reducing the plasma display panel in the voltage source% The energy consumed when switching between ground and ground; please refer to Figure 6, Figure 6 uses the circuit in Figure 4 to light the eight-inch plasma display panel. Voltage and current waveform flowing through the panel; as seen in the sixth figure, when the voltage across the plasma display panel reaches vs or-, the plasma starts to discharge, and a large amount of electricity will be generated at the instant of the plasma discharge. Current, due to the on-resistance of the transistor, a large voltage drop will occur when the large current flows through the transistor. This voltage drop will cause the transient voltage across the plasma display panel to instantly decrease, thereby reducing the accumulation of wall charges. , Which further narrowed the operating voltage range of the plasma display panel. [Objective of the Invention] Therefore, the main object of the present invention is to provide an energy recovery driving circuit and method for a plasma display panel with a current compensation function, using an inductor

C:\tmp\patent. ptd 第10頁 530281 五、發明說明(8) 和電漿顯示面板共振來減小面板因急速充放電造成的能量 損耗,此外,透過電流補償來減少因電漿放電瞬間產生的 大電流所造成的電壓降,進而增進壁電荷累積,擴大電漿 顯示面板的操作電壓範圍;此外,電壓柑制電路的四個開 關均可達成零電壓切換。 明 說 單 簡 之 圖 附 J 分 I 示 顯 ο I 圖址 造定 構r 之之 板板 面面 示示 顯顯 漿漿 。 電電圖 型型形 流流波 交交及 為為序 圖圖時 一 二動 第第驅 電 放 漿 電習第 為為為 圖圖圖 三四五 第第第 圖 說 解 之 程 過 成 形 荷 電 壁 路 電 驅 復 回 量 能 之 板 面 示 顯 漿 電 型 流 交 知 圖 序 時 作 操 之 路 電 驅 中 圖 四 圖 形 波 作 實 之 路 電 區 中 圖 四 能 功 償 補 流 電 具 之 明 發 第本第 為為為 圖圖圖 六七八 i弟 作 操 之 路 電 驅 中 圖 七 的時 路 電 區 馬 復 回 量 能 圖 序 圖 解 。 分 圖 作 序 時 路圖作 電形操 細波種 詳作一 之實另 提之之 所路路 明電電 發動動 本驅驅 為中中 圖圖圖 六七七 十第第 第為為 至圖圖 圖七八 九十十 第第第 段 手 之 用 採 功 償 補 流 電 具 提 所 明 發 本 為 圖 七 第 圖 七 第 閱 參 請C: \ tmp \ patent. Ptd Page 10 530281 V. Description of the invention (8) Resonance with the plasma display panel to reduce the energy loss caused by rapid charge and discharge of the panel. In addition, current compensation is used to reduce the instant of plasma discharge. The voltage drop caused by the generated large current will further increase the wall charge accumulation and expand the operating voltage range of the plasma display panel. In addition, the four switches of the voltage circuit can achieve zero voltage switching. The diagram of the plain sheet is attached with J points and I is displayed. Ο I is the site where the structure r is constructed to show the slurry. Electro-Electrical diagram type flow current wave wave intersection and the sequence diagram is a two-moving and driving electric discharge slurry electric exercise for the diagram is shown in Figure 345. The driving surface of the drive-recovery energy display shows the electric flow of the electric power flow in the sequence diagram of the electric drive. Figure 4 shows the graphic wave in the road area. This section is a diagram of the sequence diagram of the horse power recovery in the electric circuit of the electric circuit in the electric circuit of the electric circuit in the electric circuit of FIG. The sub-map is sequenced, the road map is used for electrical operation, and the fine wave type is detailed. The other is mentioned. The road and the electricity are driven. The drive is driven by the middle and the middle. Figure 7.80.90. The second paragraph of the manual use of power to compensate for supplemental electric appliances. The issued version is shown in Figure 7. Figure 7.

C:\tmp\patent. ptd 第11頁 530281C: \ tmp \ patent.ptd p. 11 530281

的能量回 示面板, 持續之充 有一第一 不面板之 極體之負 電漿顯示 一端與第 面板之第二 連接,該 接,一第 感之第二 一第一及 之第一端 及一第四 端,而另 來控制六 係由M0S 且各電晶 4是驅動雷》 电路,驅動電路係用來驅動交流型電漿顯 冤默县音 一 ”、、、不面板可用一等效電容Cp來示,用來經由 敦電來給4士 唯待一影像訊號的顯示;該驅動電路包含 雷感Ϊ 1 , #二山’此電感的第一端與第二端分別和電漿顯 ^ 端與一第九二極體D9之正端連接,而第九二 端和一第五開關Μ 5連接’該第五開關之另一端和 面f之第二端連接;一第二電感L2,此電感的第 一,分別和一第十二極體!)丨〇之正端與電漿顯示 #端連接,而第十二極體之負端和一第六開關M6 第六開關之另一端和電漿顯示面板之第一端連 七及第八二極體(D7、D8)的負端分別和第一電 知及第二電感之第一端連接,而另一端均接地, 一第三開關(Ml、M3 )電連接於該電漿顯示面板 ’而另一端分別連接於電壓源及接地線,一第二 開關(M2、M4 )電連接於該電漿顯示面板之第二 一端分別連接於電壓源及接地線;一控制電路用 個開關Μ1、Μ 2、Μ 3、Μ 4、Μ 5及Μ 6,該六個開關均 (Metal Oxide Semiconductor )電晶體所組成, 體之汲極(Drain)與源極(Source)間均存在 有一寄生二極體,在第七圖中分別以D1、D2、D3、D4、D5 及D6來表示,而在没極與源極間亦存在寄生電容ci、C2、 C3 及C4。 請參閱第八圖’弟八圖為第七圖中能量回復驅動電路The energy display panel is continuously filled with a negative plasma display electrode with a first non-panel pole body connected to the second end of the second panel. The connection is a first, second, first, and first end and a first Four terminals, while another control six series by M0S and each transistor 4 is a driving circuit. The driving circuit is used to drive the AC type plasma to display the sound of the sound. The equivalent capacitance Cp is not available on the panel. Here, it is used to display a video signal to 4 Shiwei through Dundun; the driving circuit contains the thunder sense 1, # 二 山 'the first and second ends of this inductor and the plasma display ^ respectively Connected to the positive terminal of a ninth diode D9, and the ninth terminal is connected to a fifth switch M 5 'the other end of the fifth switch is connected to the second end of the surface f; a second inductor L2, this The first end of the inductor is connected to a twelfth pole body of the twelfth pole!) 丨 the positive end of the inductor is connected to the plasma display # terminal, and the negative end of the twelfth pole body and a sixth switch M6 and the other end of the sixth switch are The first terminal of the plasma display panel is connected to the negative terminals of the seventh and eighth diodes (D7, D8), and the first and second inductors, respectively. The first end is connected, and the other end is grounded. A third switch (M1, M3) is electrically connected to the plasma display panel, and the other end is connected to the voltage source and the ground wire respectively. A second switch (M2, M4) ) The second end electrically connected to the plasma display panel is connected to a voltage source and a ground wire respectively; a control circuit uses switches M1, M2, M3, M4, M5, and M6, and the six switches It consists of metal oxide semiconductor transistors. There is a parasitic diode between the drain and source of the body. In the seventh figure, D1, D2, D3, D4, D5, and D6, and parasitic capacitances ci, C2, C3, and C4 also exist between the non-pole and the source. Please refer to the eighth figure. The eighth figure is the energy recovery driving circuit in the seventh figure.

C:\tmp\patent.ptd 第 12 頁 530281 五、發明說明(ίο) 之控制時序圖;Vp為電顯示面板等效電容Cp兩端的電位 差’ Ιυ為流經電感L1的電流’ 為流經電感L2的電流,弟 八圖之控制時序圖所顯示的控制程序如下·· 步驟一:在to之前,開關Ml和Μ4為導通狀態,其它開 關為關閉的狀態,因此,電漿顯示面板兩端的電位差VP為 步驟二:在to到tl期間,開關M5導通,則電感L1上之 電流Iu呈線性增加,電壓源Vs會經由第一開關Ml及第四開 關M4將流過電感L1之電流Iu提升至某一預定值Iu,raax。 步驟三:在tl到t2期間,請參閱第九圖,關閉第四開 關M4以使電感L1之電流Iu開始對電漿顯示面板CP及電容C2 放電,而對電容C4充電,使電漿顯示面板之Y端的電位¥¥ 提升。 步驟四:在t2到t3期間,請參閱第十圖,當電位Vy於 時間t2提升到電壓源Vs使得第二開關M2之寄生二極體D2導 通時,電感L1之電流Iu會開始流經寄生二極體D 2,此時導 通第二開關Μ 2以達成零電壓切換。 步驟五:在t3到t4期間,請參閱第十一圖,關閉第一 開關Ml以使電感L1之電流Iu開始對電漿顯示面板CP及電容C: \ tmp \ patent.ptd Page 12 530281 V. Control timing diagram of the invention description (ίο); Vp is the potential difference between the equivalent capacitance Cp of the electric display panel 'Ιυ is the current flowing through the inductor L1' is flowing through the inductor The current of L2, the control sequence shown in the control timing diagram of Figure 8 is as follows: Step 1: Before to, the switches M1 and M4 are on, and the other switches are off. Therefore, the potential difference between the two ends of the plasma display panel VP is Step 2: Between to to t1, the switch M5 is turned on, and the current Iu on the inductor L1 increases linearly. The voltage source Vs will increase the current Iu flowing through the inductor L1 to the first through the first switch M1 and the fourth switch M4. Some predetermined value Iu, raax. Step 3: From t1 to t2, please refer to the ninth figure, turn off the fourth switch M4 to make the current Iu of the inductor L1 start to discharge the plasma display panel CP and the capacitor C2, and charge the capacitor C4 to make the plasma display panel The potential at the Y terminal ¥¥ increases. Step 4: From t2 to t3, please refer to the tenth figure. When the potential Vy is increased to the voltage source Vs at time t2 and the parasitic diode D2 of the second switch M2 is turned on, the current Iu of the inductor L1 will begin to flow through the parasitic The diode D 2 is turned on at this time to achieve zero voltage switching. Step 5: During the period from t3 to t4, please refer to the eleventh figure. Turn off the first switch M1 so that the current Iu of the inductor L1 starts to plasma display panel CP and capacitor.

C:\tmp\patent.ptd 第13頁 530281 五、發明說明(11) C1充電,而對電容C3放電,使電漿顯示面板之X端的電位 vx下降。 步驟六:在t4到t5期間,請參閱第十二圖,當電位¥, 於時間t4下降到接地電位使得第三開關M3之寄生二極體D3 導通時,電感L1之電流Iu會開始流經寄生二極體D3,此 時,導通第三開關M3以達成零電壓切換,而電漿顯示面板 兩端的電位差VP為-Vs,並且第一電感L1的電流Iu開始減 少 0 步驟七:在t 5到t 6期間,當電感L1之電流Iu於七5減少 至零時,關閉第五開關M5,而開關M2和M3繼續導通,因 此,電漿顯示面板兩端的電位差VP仍維持為-Vs。 步驟八:在t6到t7期間,導通第六開關M6,則電感L2 上之電流Iu呈線性增加,電壓源Vs會經由第二開關M2及第 三開關M3將電感之電流Ιί2提升至某一預定值Il2,raax。 步驟九:在t 7到18期間,請參閱第十三圖,關閉第二 開關M2以使電感L2之電流Ιί2開始對電漿顯示面板CP及電容 C4放電,而對電容C2充電,使電漿顯示面板之Y端的電位C: \ tmp \ patent.ptd Page 13 530281 V. Description of the invention (11) Charge C1 and discharge capacitor C3, so that the potential vx at the X terminal of the plasma display panel decreases. Step 6: From t4 to t5, please refer to the twelfth figure. When the potential ¥, drops to the ground potential at time t4 and the parasitic diode D3 of the third switch M3 is turned on, the current Iu of the inductor L1 will begin to flow through Parasitic diode D3. At this time, the third switch M3 is turned on to achieve zero voltage switching, and the potential difference VP between the two ends of the plasma display panel is -Vs, and the current Iu of the first inductor L1 starts to decrease 0. Step 7: At t 5 During t 6, when the current Iu of the inductor L1 is reduced to zero at 7-5, the fifth switch M5 is closed, and the switches M2 and M3 continue to be turned on. Therefore, the potential difference VP across the plasma display panel remains at -Vs. Step 8: Between t6 and t7, when the sixth switch M6 is turned on, the current Iu on the inductor L2 increases linearly, and the voltage source Vs will increase the inductor current Iί2 to a predetermined value through the second switch M2 and the third switch M3. Value Il2, raax. Step 9: During t 7 to 18, please refer to the thirteenth figure, turn off the second switch M2 so that the current I2 of the inductor L2 starts to discharge the plasma display panel CP and the capacitor C4, and charge the capacitor C2 to make the plasma Potential at the Y terminal of the display panel

Vy下降。 步驟十:在t8到t9期間,請參閱第十四圖,當電位VyVy drops. Step 10: During t8 to t9, please refer to Figure 14 when the potential Vy

C:\trap\patent. ptd 第14頁 530281 五、發明說明(12) 於時間18下降到接地電位使得第四開關M4之寄生二極體D4 導通時’電感L 2之電流I u會開始流經寄生二極體D 4 ^此時 導通第四開關M4以達成零電壓切換。 步驟十一:在19到11 0期間,請參閱第十五圖,關閉 第三開關M3以使電感L2之電流Ιί2開始對電漿顯示面板CP及 電容C3充電,而對電容C1放電,使電漿顯示面板X端的電 位¥,提升。 步驟十二:在11 0到111期間,請參閱第十六圖,當電 位¥,於時間11 0提升到電壓源Vs使得第一開關Μ1之寄生二極 體D1導通為止,此時電感L 2之電流會開始流經寄生二極 體D1,此時,導通第一開關Ml以達成零電壓切換,而電漿 顯示面板兩端的電位差VP為Vs,並且第二電感L 2電流Iu開 始減少。 步驟十二·在111到11 2期間’當電感L 2之電流I u於 111減少至零時,關閉第六開關Μ 6,而開關Μ1和M4繼續導 通,因此,電漿顯示面板兩端的電位差VP仍維持為vs。 步驟十四:重複步驟二至步驟十二以使電漿顯示面板 得以經由持績之充放電來維持影像訊號的顯不。 在時間14和11 0,當電漿顯示面板兩端的跨壓VP為-VsC: \ trap \ patent. Ptd Page 14 530281 V. Description of the invention (12) When the potential drops to ground at time 18 so that the parasitic diode D4 of the fourth switch M4 is turned on, the current I u of the inductor L 2 will begin to flow. At this time, the parasitic diode D 4 ^ turns on the fourth switch M 4 to achieve zero voltage switching. Step 11: During the period from 19 to 110, please refer to the fifteenth figure. Turn off the third switch M3 so that the current I2 of the inductor L2 starts to charge the plasma display panel CP and the capacitor C3, and discharge the capacitor C1 to make the electricity The potential of the X terminal of the display panel is raised. Step 12: During the period from 110 to 111, please refer to the sixteenth figure. When the potential ¥ is raised to the voltage source Vs at time 110 to make the parasitic diode D1 of the first switch M1 conductive, the inductance L 2 at this time The current will begin to flow through the parasitic diode D1. At this time, the first switch M1 is turned on to achieve zero voltage switching, the potential difference VP across the plasma display panel is Vs, and the second inductor L 2 current Iu starts to decrease. Step 12: Between 111 and 11 2 'When the current I u of the inductor L 2 decreases to 111 at zero, the sixth switch M 6 is closed, and the switches M1 and M4 continue to be turned on. Therefore, the potential difference between the two ends of the plasma display panel VP remains at vs. Step 14: Repeat steps 2 to 12 so that the plasma display panel can maintain the display of the image signal through the charge and discharge of the performance. At times 14 and 110, when the voltage VP across the plasma display panel is -Vs

C:\tmp\patent. ptd 第15頁 530281 五、發明說明(13) 或Vs時,電漿開始放電,此時電漿放電所需的大電流由電 感電流Iu或1[^供應,而非由電壓源\經由電晶體M2、M3或 電晶體Ml、M4供應’也就沒有大電流通過電晶體導通電阻 造成電壓降的問題,以上就是本發明所謂的「電流補 償」;另外,由於電漿放電瞬間沒有電壓降,所以可以促 進壁電荷累積,進而增加電漿顯示面板的電壓操作範圍。 在步驟二和步驟八期間,提升第一電感L1和第二電感 L2之電流到Iu,max和Ιί2,„^χ需大於所欲補償電流的大小,因 為在電漿放電之前,電感L1或L 2上的電流必須用來對電容 Cp、Cl、C2、C3、C4充放電,因此,當電漿放電時,電感 L1或L2所能提供的電流會稍微小於Iu,max或Ιί2,_。 在步驟六和步驟十二期間,電感電流Iu或L在供應電 漿放電所需電流之後,其電流會經由二極體D2、D3或D1、 D4將能量送回電源端Vs,稱之為能量回復。C: \ tmp \ patent. Ptd Page 15 530281 V. Description of the invention (13) or Vs, the plasma starts to discharge. At this time, the large current required for plasma discharge is supplied by the inductor current Iu or 1 [^ instead of It is supplied by the voltage source \ through the transistors M2, M3 or transistors M1, M4 ', so there is no problem of voltage drop caused by the on-resistance of the transistor through the transistor. The above is the so-called "current compensation" of the present invention; There is no voltage drop at the moment of discharge, so the wall charge accumulation can be promoted, thereby increasing the voltage operating range of the plasma display panel. During step two and step eight, increase the current of the first inductor L1 and the second inductor L2 to Iu, max, and Ιί2, and ^ χ needs to be larger than the desired compensation current, because before the plasma discharge, the inductor L1 or L The current on 2 must be used to charge and discharge the capacitors Cp, Cl, C2, C3, and C4. Therefore, when the plasma is discharged, the current provided by the inductor L1 or L2 will be slightly less than Iu, max or Ιί2, _. During step 6 and step 12, after the inductor current Iu or L is supplied with the current required for the plasma discharge, its current will return the energy to the power supply terminal Vs via the diode D2, D3 or D1, D4, which is called energy recovery. .

C:\tmp\patent. ptd 第16頁 530281 五、發明說明(14) 看出,在加入電流補償之後,原本電漿放電之大電流流過 電晶體等效導通電阻所造成之電壓降已經消失了。 請參閱第十八圖,第十八圖為第七圖驅動電路之另一 種控制時序圖;Vp為電顯示面板等效電容cp兩端的電位 差,IL1為流經電感L1的電流,IL2為流經電感L2的電流;第 十八圖之控制時序圖所顯示的控制程序如下: 步驟一:在10之前,開關Μ1和M4為導通狀態,其它開 關為關閉的狀態,因此,電漿顯示面板兩端的電位差Vp為C: \ tmp \ patent. Ptd page 16 530281 V. Description of the invention (14) It can be seen that after adding the current compensation, the voltage drop caused by the large current of the original plasma discharge flowing through the equivalent on-resistance of the transistor has disappeared. Already. Please refer to Figure 18, which is another control timing diagram of the driving circuit of Figure 7. Vp is the potential difference across the equivalent capacitance cp of the electric display panel, IL1 is the current flowing through inductor L1, and IL2 is flowing through The current of the inductor L2; the control sequence shown in the control timing chart of Figure 18 is as follows: Step 1: Before 10, the switches M1 and M4 are on and the other switches are off. Therefore, the two ends of the plasma display panel The potential difference Vp is

Vs。 步驟二:在t 0到11期間,開關M5導通,則電感L1上之 電流IL1呈線性增加,電壓源Vs會經由第一開關mi及第四開 關M4將流過電感之電流iL1提升至某一預定值。 步驟三··在tl到t2期間,關閉第一開關Ml和第四開關 M4以使電感L1之電流IL1開始流過電漿顯示面板心,並對電 容C2及C3放電’而對電容C1和C4充電,使電漿顯示面板之 Y端的電位Vy提升,而X端的電位\下降。 步驟四:在t2到t3期間,當電位vy於時間t2提升到電 壓源Vs使得第二開關Μ 2之寄生二極體])2導通時,而且,當 電位Vx於時間t2下降到接地線使得第三開關M3之寄生二極Vs. Step 2: During t 0 to 11, when the switch M5 is turned on, the current IL1 on the inductor L1 increases linearly, and the voltage source Vs will increase the current iL1 flowing through the inductor to a certain value through the first switch mi and the fourth switch M4. Predetermined value. Step Three: Between t1 and t2, turn off the first switch M1 and the fourth switch M4 so that the current IL1 of the inductor L1 starts to flow through the plasma display panel core and discharge the capacitors C2 and C3. Charging raises the potential Vy at the Y terminal of the plasma display panel, while reducing the potential \ at the X terminal. Step 4: Between t2 and t3, when the potential vy is raised to the voltage source Vs at time t2 to make the parasitic diode of the second switch M2]) 2 conductive, and when the potential Vx is dropped to the ground line at time t2 so that Parasitic diode of the third switch M3

C:\tmp\patent.ptd 第17頁 530281 五、發明說明(15) 體D3導通時,電感L1之電流Iu會開始流經寄生二極體D2及 D3,此時導通開關M2及M3以達成零電壓切換。此時,電漿 顯不面板兩端的電位差Vp為-Vs ’並且弟一電感L1的電流Ijj 開始減少。 步驟五:在13到14期間,當電感L 1之電流Iu於13減少 至零時,關閉第五開關M5,而開關M2和M3繼續導通,因 此,電漿顯示面板兩端的電位差VP仍維持為-Vs。 步驟六··在t4到t5期間,導通第六開關M6,使得電感 L2上之電流Ιί2呈線性增加,電壓源Vs會經由第二開關M2及 第三開關M3將電感之電流Iu提升至某一預定值Il2,max。 步驟七··在t5到t6期間,關閉第二開關M2和第三開關 M3以使電感L2之電流開始流過電漿顯示面板CP,並對電 容C1及C4放電,而對電容C2和C3充電,使電漿顯示面板之 Y端的電位Vy下降,而X端的電位¥\上升。 步驟八:在t 6到t 7期間,當電位Vy於時間16下降到接 地線使得第四開關M4之寄生二極體D4導通時,而且,當電 位乂,於時間t6提升到電壓源Vs使得第一開關Ml之寄生二極 體D1導通時,第二電感L2之電流Ιί2會開始流經寄生二極體 D1及D4,此時導通開關Ml及Μ4以達成零電壓切換。此時, 電漿顯示面板兩端的電位差,並且第二電感L2的電C: \ tmp \ patent.ptd Page 17 530281 V. Description of the invention (15) When the body D3 is turned on, the current Iu of the inductor L1 will begin to flow through the parasitic diodes D2 and D3. At this time, the switches M2 and M3 are turned on to achieve Zero voltage switching. At this time, the potential difference Vp between the two ends of the plasma display panel is -Vs' and the current Ijj of the first inductor L1 starts to decrease. Step 5: During the period 13 to 14, when the current Iu of the inductor L 1 decreases to 13 at zero, the fifth switch M5 is closed, and the switches M2 and M3 continue to be turned on. Therefore, the potential difference VP across the plasma display panel remains at -Vs. Step 6: During the period from t4 to t5, the sixth switch M6 is turned on, so that the current I2 of the inductor L2 increases linearly. The voltage source Vs will increase the current Iu of the inductor to a certain value via the second switch M2 and the third switch M3. The predetermined value Il2, max. Step 7: During t5 to t6, turn off the second switch M2 and the third switch M3 so that the current of the inductor L2 starts to flow through the plasma display panel CP, discharge the capacitors C1 and C4, and charge the capacitors C2 and C3. , So that the potential Vy of the Y terminal of the plasma display panel decreases, while the potential of the X terminal ¥ \ rises. Step 8: Between t 6 and t 7, when the potential Vy drops to the ground at time 16 and the parasitic diode D4 of the fourth switch M4 is turned on, and when the potential is ramped up, the voltage source Vs is raised at time t6 such that When the parasitic diode D1 of the first switch M1 is turned on, the current I2 of the second inductor L2 starts to flow through the parasitic diodes D1 and D4. At this time, the switches M1 and M4 are turned on to achieve zero voltage switching. At this time, the potential difference between the two ends of the plasma display panel and the current of the second inductor L2

C:\trap\patent, ptd 第18頁 530281 五、發明說明(16) 流開始減少。 步驟九:在17到18期間,當電感L 2之電流Ιί2於17減少 至零時,關閉第六開關M6,而開關Ml和M4繼續導通,因 此,電漿顯示面板兩端的電位差VP仍維持為Vs。 步驟十:重複步驟二至步驟九以使電漿顯示面板得以 經由持績之充放電來維持影像訊5虎的顯不。C: \ trap \ patent, ptd page 18 530281 V. Description of the invention (16) The stream starts to decrease. Step 9: During the period from 17 to 18, when the current I 2 of the inductor L 2 is reduced to zero at 17, the sixth switch M6 is closed, and the switches M1 and M4 continue to be turned on. Therefore, the potential difference VP across the plasma display panel remains at Vs. Step 10: Repeat steps 2 to 9 so that the plasma display panel can maintain the display of the image 5 tiger through charge and discharge.

C:\tmp\patent. ptd 第19頁C: \ tmp \ patent.ptd p.19

Claims (1)

530281 t、申請專利範圍 1 、一種具電流補償功能之電漿顯示面板的能量回復驅動 電路,該電漿顯示面板係近似為一負載電容,用來經由持 續之充放電來維持一影像訊號的顯示,該驅動電路包含有 一第一電感,此電感的第一端與第二端分別和電漿顯示面 板之第一端與一第九二極體之正端連接,而第九二極體之 負端和一第五開關連接,該第五開關之另一端和電漿顯示 面板之第二端連接,一第二電感,此電感的第一端與第二 端分別和一第十二極體之正端與電漿顯示面板之第二端連 接,而第十二極體之負端和一第六開關連接,該第六開關 之另一端和電漿顯示面板之第一端連接,一第七及第八二 極體的負端分別和第一電感之第二端及第二電感之第一端 連接,而另一端均接地,一第一及一第三開關電連接於該 電漿顯示面板之第一端,而另一端分別連接於電壓源及接 地線,一第二及一第四開關電連接於該電漿顯示面板之第 二端,而另一端分別連接於電壓源及接地線,一控制電路 用來控制開關對該電漿顯示面板持續充放電;該六個開關 均係由一電晶體所組成,且各電晶體之波極(D r a i η )與 (Source )間均存在有一寄生二極體和寄生電容。530281 t, patent application scope 1, an energy recovery driving circuit of a plasma display panel with a current compensation function. The plasma display panel is approximately a load capacitor, which is used to maintain the display of an image signal through continuous charging and discharging. The driving circuit includes a first inductor. The first end and the second end of the inductor are respectively connected to the first end of the plasma display panel and the positive end of a ninth diode, and the negative end of the ninth diode. Terminal is connected to a fifth switch, the other end of the fifth switch is connected to the second end of the plasma display panel, a second inductor, the first end and the second end of the inductor are respectively connected to a twelfth pole body. The positive end is connected to the second end of the plasma display panel, and the negative end of the twelfth pole is connected to a sixth switch. The other end of the sixth switch is connected to the first end of the plasma display panel. A seventh And the negative terminal of the eighth diode are respectively connected to the second terminal of the first inductor and the first terminal of the second inductor, and the other ends are grounded, and a first and a third switch are electrically connected to the plasma display panel The first end and the other end respectively At the voltage source and the ground line, a second and a fourth switch are electrically connected to the second end of the plasma display panel, and the other ends are respectively connected to the voltage source and the ground line. A control circuit is used to control the switch to the electrical power. The liquid crystal display panel continues to be charged and discharged; the six switches are all composed of a transistor, and a parasitic diode and a parasitic capacitor exist between the wave electrodes (D rai η) and (Source) of each transistor. C:\tmp\patent. ptd 第20頁 530281 六、申請專利範圍 (1 )導通該第五開關,則第一電感上之電流呈線性增 加,電壓源會經由第一開關及第四開關將流過第一電感之 電流提升至某一預定值; (2 )關閉第四開關以使第一電感之電流開始對電漿顯示 面板之等效電容及第二開關之寄生電容放電,而對第四開 關之寄生電容充電,使電漿顯示面板之第二端的電位提 升; (3 )當電漿顯示面板第二端的電位提升到電壓源,使得 第二開關之寄生二極體導通時,第一電感之電流會開始流 經第二開關之寄生二極體,此時導通第二開關以達成零電 壓切換; (4 ) 一段時間後,關閉第一開關以使第一電感之電流開 始對電漿顯示面板之等效電容及第一開關之寄生電容充 電,而對第三開關之寄生電容放電,使電漿顯示面板第一 端的電位下降; (5 )當電漿顯示面板第一端的電位下降到接地電位,使 得第三開關之寄生二極體導通時,第一電感之電流會開始 流經第三開關之寄生二極體,此時,導通第三開關以達成 零電壓切換,而電漿顯示面板兩端的電位差VP為-Vs,並且 第一電感的電流開始減少; (6 )當第一電感之電流減少至零時,關閉第五開關,而 第二開關和第三開關繼續導通,因此,電漿顯示面板兩端 的電位差VP仍維持為-Vs ; (7 ) —段時間後,導通第六開關,則第二電感之電流呈C: \ tmp \ patent. Ptd Page 20 530281 VI. Patent application scope (1) When the fifth switch is turned on, the current on the first inductor increases linearly, and the voltage source will flow the current through the first switch and the fourth switch. The current through the first inductor is increased to a predetermined value; (2) The fourth switch is turned off so that the current of the first inductor starts to discharge the equivalent capacitance of the plasma display panel and the parasitic capacitance of the second switch, and The parasitic capacitance of the switch is charged, so that the potential of the second end of the plasma display panel is increased; (3) When the potential of the second end of the plasma display panel is increased to a voltage source, so that the parasitic diode of the second switch is turned on, the first inductance The current will begin to flow through the parasitic diode of the second switch. At this time, the second switch is turned on to achieve zero voltage switching. (4) After a period of time, the first switch is turned off so that the current of the first inductor starts to display on the plasma. The equivalent capacitance of the panel and the parasitic capacitance of the first switch are charged, and the parasitic capacitance of the third switch is discharged, so that the potential of the first end of the plasma display panel decreases; (5) When the potential of the first end of the plasma display panel decreases When the ground potential makes the parasitic diode of the third switch conductive, the current of the first inductor will begin to flow through the parasitic diode of the third switch. At this time, the third switch is turned on to achieve zero voltage switching, and the plasma The potential difference VP across the display panel is -Vs, and the current of the first inductor starts to decrease; (6) When the current of the first inductor decreases to zero, the fifth switch is turned off, and the second switch and the third switch continue to be turned on, so , The potential difference VP between the two ends of the plasma display panel is still maintained at -Vs; (7)-after a period of time, the sixth switch is turned on, and the current of the second inductor is C:\tmp\patent.ptd 第21頁 530281 感 電二 第 將 關 三 第 及 關 開二 第 由 經 合曰 源 壓 電 圍, 範加 專增 膏 =° 六線 示 顯 漿 電 對 始 EfJ1 流 電 之 感 電二 ;第 值使 定以 預關 一 開 某二 至第 升閉 提關 流} 電 8 之C afJ、 四 第 及 容 電 使 電 充 電容 效電 等生 之寄 板之 面關 m幵 二下 第位 對電 而的 ’端 電二 放第 容之 電板 生面 寄示 之顯 關漿 使 位 地 接 到 降 下 位 電 的 端二 第 之 板 面 示 顯 漿 ^ttD 『^a 當 N)/ 9 極二 生 寄 之 關 四 第 二 生 寄 之 關 QtiN 四 第 經 得流 始零 開成 會達 流以 之開 感四 電第 二通 第導 ’時 時此 通, 導體 體極 流 電 之 感 l^ttD ^¾二 第 使 以 關 ΜΠ 9^ 三 第 9HW 關 後 間 時 段;一 換} 切ο 壓 r-H 電C 充一 容第 電板 生面 寄示 之顯 關漿 開電 三使 第’ 及電 容放 電容 一令、^ 等生 之寄 板之 面關 示開 顯一 漿第 電對 對而 始’ 開電 使 源 壓 到 升 提 位 電 的 端 - 第 板 面 示 顯 •,將水 升電 提當 位} 電 1 的 1 端C 合曰以 流關 ΓζΠΪΓΒ^ 之一 感第 電通 二導 第, 時時 此此 時體 通極 導二 體生 極寄 二之 生關 寄開 之一 關第 開經 一流 第始 得開 ν^ο 為 ν^Γ 差 位 電 的 端 兩 板 面 ·, 示少 顯減 漿始 ^ag^ 而流 ,電 換之 切感 壓電 電二 零第 成且 達並 ,兩 關板 開面 六示 第顯 閉漿 關電 , , 時此 零因 至, 少通 減導 流續 電繼 之關 感開 電四 二第 第和 當關 \J/2 一 IX C而 面 示 顯 漿。 電示 使顯 以的 teu 2訊 IX 像 C影 驟持 步維 至來 \1/ 為2放 持C充 維驟之 ^步續 VP複持 差重由 位}經 電3 以 的1得 端{板 C:\tmp\patent. ptd 第22頁 530281 六、申請專利範圍 端的電位下降到接地線使得第三開關之寄生二極體導通 時,第一電感之電流會開始流經第二及第三開關之寄生二 極體,此時導通第二開關及第三開關以達成零電壓切換; 此時,電漿顯示面板兩端的電位差vP為-vs,接著第一電感 的電流開始減少; (4 )當第一電感之電流減少至零時,關閉第五開關,而 第二開關和第三開關繼續導通,因此,電漿顯示面板兩端 的電位差VP仍維持為-Vs ; (5 ) —段時間後,導通第六開關,使得第二電感之電流 呈線性增加,電壓源會經由第二開關及第三開關將第二電 感之電流提升至某一預定值; (6 )關閉第二開關和第三開關以使第二電感之電流開始 流過電漿顯示面板,並對第一及第四開關之寄生電容放 電,而對第二及第三開關之寄生電容充電,使電漿顯示面 板第二端的電位下降,而第一端的電位上升; (7 )當電漿顯示面板第二端的電位下降到接地線使得第 四開關之寄生二極體導通時,而且,當電漿顯示面板第一 端的電位提升到電壓源使得第一開關之寄生二極體導通 時,第二電感之電流會開始流經第一及第四開關之寄生二 極體,此時導通第一開關及第四開關以達成零電壓切換, 此時,電漿顯示面板兩端的電位差VP為Vs,接著第二電感 的電流開始減少; (8 )當第二電感之電流減少至零時,關閉第六開關,而 第一開關和第四開關繼續導通,因此,電漿顯示面板兩端C: \ tmp \ patent.ptd Page 21 530281 Inductive second second will be off third and off on second second by Jinghe Yueyuan Piezoelectric Circumference, Fan Jiazhuan Gao Gao = ° Six-line display of plasma electricity to EfJ1 flow Inductive power of electricity; the first value is set to pre-close one to open the second to the second to close the lift flow} C afJ of electric power 8, fourth power and electric capacity make electric charge, capacitive efficiency, etc. Twenty-twoth place to the electricity and the end of the second side of the board to display the display of the off-site slurry, so that the ground is connected to the lower-end side of the second-side board showing the display of the paste ^ ttD "^ a When N) / 9 poles, the second life, the second life, the second life, the second life, the QtiN, the fourth pass, the current start, the zero pass, and the current flow, the current will be sensed, the second pass, and the second pass. The sense of current l ^ ttD ^ ¾ The second pass to the gate ΠΠ 9 ^ The third pass to the 9HW time period; a change} Cut ο Press rH power C to charge the display board on the surface of the first board The three sides of the board and the capacitor discharge capacitor, the order of ^, etc. are displayed on the display board. Right to the beginning, the power is turned on so that the source voltage is raised to the end of the power-the first surface of the display shows, the water is raised to the right position} The 1 terminal C of the electricity 1 is the first to pass the current off ΓζΠΪΓΒ ^ The second pass of Dentsu, at this time, the second pass of the second pass, the second pass of the second pass, the second pass of the second pass, the first pass of the second pass, the first pass, the first pass, and the first pass, ν ^ ο is ν ^ Γ. The surface, showing less sizing reduction, ^ ag ^, and the current, the electric piezo-electricity of the piezo-electricity is completed and reached, and the two closed plates are opened, and the closed-closed piezo-electricity is shown. So far, the Shaotong reduced the continuity of the electricity and continued the sense of closing. The power was turned on, the second and the off, \ J / 2, and IX C, and the face was displayed. The telex makes the display of the teu 2 news IX like the C shadow step. \ 1 / is the 2 step of the C charge and maintenance step. Continued VP resumption. The difference is determined by the position. {Board C: \ tmp \ patent. Ptd Page 22 530281 VI. When the potential at the end of the patent application scope drops to the ground line and the parasitic diode of the third switch is turned on, the current of the first inductor will begin to flow through the second and the first. The parasitic diode of the three switches, the second switch and the third switch are turned on at this time to achieve zero voltage switching; at this time, the potential difference vP across the plasma display panel is -vs, and then the current of the first inductor starts to decrease; (4 ) When the current of the first inductor decreases to zero, the fifth switch is turned off, and the second switch and the third switch continue to be turned on. Therefore, the potential difference VP between the two ends of the plasma display panel is still maintained at -Vs; (5) for a period of time Then, the sixth switch is turned on, so that the current of the second inductor increases linearly. The voltage source will increase the current of the second inductor to a predetermined value through the second switch and the third switch; (6) Turn off the second switch and the first switch. Three switches to make the current of the second inductor begin to flow through the plasma display The panel and discharges the parasitic capacitances of the first and fourth switches, and charges the parasitic capacitances of the second and third switches, so that the potential of the second end of the plasma display panel decreases and the potential of the first end increases; (7) When the potential of the second end of the plasma display panel is lowered to the ground line to make the parasitic diode of the fourth switch conductive, and when the potential of the first end of the plasma display panel is raised to a voltage source, the parasitic diode of the first switch is made When conducting, the current of the second inductor will begin to flow through the parasitic diodes of the first and fourth switches. At this time, the first and fourth switches are turned on to achieve zero voltage switching. At this time, the potential difference between the two ends of the plasma display panel VP is Vs, and then the current of the second inductor starts to decrease; (8) When the current of the second inductor decreases to zero, the sixth switch is turned off, and the first switch and the fourth switch continue to be turned on. Therefore, the plasma display panel has two end C:\tmp\patent. ptd 第25頁C: \ tmp \ patent.ptd p. 25
TW89116178A 2000-08-11 2000-08-11 Energy recovery driving circuit and method with current compensation for AC plasma display panel TW530281B (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100414585C (en) * 2005-06-22 2008-08-27 中华映管股份有限公司 Driving circuit of plasma display panel
CN100426355C (en) * 2005-06-22 2008-10-15 中华映管股份有限公司 Driving circuit of plasma display panel
US7564431B2 (en) 2005-08-15 2009-07-21 Chunghwa Picture Tubes, Ltd. Method for reducing power consumption of plasma display panel
US7671824B2 (en) 2004-12-31 2010-03-02 Lg Electronics Inc. Plasma display and driving method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7671824B2 (en) 2004-12-31 2010-03-02 Lg Electronics Inc. Plasma display and driving method thereof
CN100414585C (en) * 2005-06-22 2008-08-27 中华映管股份有限公司 Driving circuit of plasma display panel
CN100426355C (en) * 2005-06-22 2008-10-15 中华映管股份有限公司 Driving circuit of plasma display panel
US7564431B2 (en) 2005-08-15 2009-07-21 Chunghwa Picture Tubes, Ltd. Method for reducing power consumption of plasma display panel

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