TW526461B - Automatic adjusting device for common voltage of liquid crystal display - Google Patents

Automatic adjusting device for common voltage of liquid crystal display Download PDF

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Publication number
TW526461B
TW526461B TW89101239A TW89101239A TW526461B TW 526461 B TW526461 B TW 526461B TW 89101239 A TW89101239 A TW 89101239A TW 89101239 A TW89101239 A TW 89101239A TW 526461 B TW526461 B TW 526461B
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transistor
voltage
common voltage
data
capacitor
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TW89101239A
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Chinese (zh)
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Yen-Chen Chen
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Chi Mei Optoelectronics Corp
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Abstract

There is provided an automatic adjusting device for common voltage of liquid crystal display, which is used to adjust the common voltage of the pixel unit in the pixel array of the liquid crystal display. The automatic adjusting device for common voltage includes: a transistor; a scanning line electrically connected to the gate of the transistor for turning the transistor on or off; a data line electrically connected to the drain of the transistor and having a voltage maintained at an average of a data maximum voltage and a data minimum voltage, wherein the data maximum voltage and the data minimum voltage are the maximum and minimum voltage values provided to the data signal of the pixel array, respectively; a capacitor set formed by a liquid crystal capacitor and a hold capacitor connected in parallel, and having a terminal connected to the common voltage of the pixel unit circuit of the pixel array and the other terminal connected to the source of the transistor; and a buffer having an input terminal electrically connected to the source of the transistor and an output terminal providing a voltage for use as the common voltage of the pixel unit circuit of the pixel array, wherein the circuit formed by the transistor, the data line, the capacitor set and the scanning lines is formed by the same manufacturing steps as the pixel unit circuit of the pixel array, and the corresponding components are the same.

Description

526461 五、發明說明(1) -- 【發明背景】 【發明領域】 本發明係關於一種用於液晶_ + 口口 %曰日4不裔之共同電壓自動調 整裝置,尤關於一種可調整液晶_ +哭士 曰曰…貝不|§中畫素陣列之共同 電壓的共同電壓自動調整裝置。 【相關技術之說明】 在液晶顯示器的主動矩陣中’一般而言,係利用TFT (thin film transistor)電晶體作為晝素單元(pixel cell)的主動元件。 111 ; 一資料線13 圖1係一般之晝素單元的等效電路圖,其中包含:一 TFT電晶體11; 一掃描線12,連接到TFT電晶體之閘極 極112 ; —電容 I 4 (令其電谷值為q ),係為液晶電容q和保持電容q兩者 並聯之等效電容,該電容14 一端接到TFT電晶體的源極 II 3,另一端接到共同電壓。 假設其電壓為VH。而當掃描線1 2上的電壓為低值時,亦即 丁2到T3的時間内,TFT電晶體11不通(cut —off),而資料將526461 V. Description of the invention (1)-[Background of the invention] [Field of the invention] The present invention relates to a common voltage automatic adjustment device for liquid crystals _ + 口 %% 日 日 4 族, especially about an adjustable liquid crystal _ + Crying man said ... Beibu | §The common voltage automatic adjustment device for the common voltage of the pixel array. [Explanation of related technology] In the active matrix of a liquid crystal display, generally speaking, a thin film transistor (TFT) transistor is used as an active element of a pixel cell. 111; a data line 13 FIG. 1 is an equivalent circuit diagram of a general daylight unit, which includes: a TFT transistor 11; a scanning line 12, connected to the gate electrode 112 of the TFT transistor;-a capacitor I 4 (let it The electric valley value is q), which is the equivalent capacitance of the liquid crystal capacitor q and the holding capacitor q in parallel. One end of the capacitor 14 is connected to the source II 3 of the TFT transistor, and the other end is connected to a common voltage. Suppose its voltage is VH. When the voltage on the scanning line 12 is low, that is, from T2 to T3, the TFT transistor 11 is cut off, and the data will be cut off.

接著,說明圖1所示之電路的運作方式。如圖2之時序 圖所不,線A代表掃描線1 2上的電壓、線β代表資料線丨3上 的電壓、線C代表電容14上的電壓。當掃描線I〗上的電壓 為咼值時(假設其電壓為VG),亦即τι到T2的時間内,電晶 體11將會導通,而使得資料線13上的資料寫入電容14中, 會儲存在電容1 4中。但是,在電晶體丨丨的關閉過程中,電Next, the operation of the circuit shown in FIG. 1 will be described. As shown in the timing diagram of FIG. 2, line A represents the voltage on scanning line 12, line β represents the voltage on data line 3, and line C represents the voltage on capacitor 14. When the voltage on scan line I is 咼 (assuming its voltage is VG), that is, from τι to T2, transistor 11 will be turned on, so that the data on data line 13 is written into capacitor 14, Will be stored in capacitor 1 4. However, during the turn-off process of the transistor, the electricity

第5頁 526461 五、發明說明(2) 的資料值)將會下降一小部分Vj, 的閘極11 1和源極11 3之間的雜散 ’和電容14分壓所造成。該降低 谷14上的電位(即所儲存 主要是因為TFT電晶體11 電容(令其電容值為cesi) 值71如下式所示:Page 5 526461 V. The data value of the description of the invention (2)) will drop by a small part Vj, caused by the stray between the gate 11 1 and the source 11 3 ′ and the partial voltage of the capacitor 14. The potential at the valley 14 (that is, the storage is mainly due to the capacitance of the TFT transistor 11 (let its capacitance value be cesi)). The value 71 is as follows:

CC

GSI + cGSI + c

GSI •(i) 士同理,虽在貝料線13上的電壓為vL,掃描線12為高值 日^亦即T3到T4的時間内,電晶體"將通 =線13的資料電壓\寫入電容14中。而當掃描線12為低值 時,亦即T4之後的時間内,電晶體 ,存在電容“曰中。同樣的,電容"上的電位(貝:儲電 貝料值)會因電晶體11的閘極111和源極113之間的雜散電 容而下降相同大小的電壓值^。 雜狀电 壓的中心 因此,吾人可以νΗ和vL的平均值作為資料電 值,令其為Vcet,貝U :GSI • (i) In the same way, although the voltage on the shell line 13 is vL, and the scanning line 12 is a high value day ^, that is, the time from T3 to T4, the transistor " will pass = the data voltage of line 13 \ Write in capacitor 14. When the scan line 12 has a low value, that is, in the time after T4, there is a capacitor in the transistor. "Similarly, the potential on the capacitor" (beam: storage material value) will be affected by the transistor 11 The stray capacitance between the gate 111 and the source 113 decreases the voltage value of the same magnitude ^. Therefore, we can use the average value of ν 电压 and vL as the data electrical value, let it be Vcet, be U :

V cetV cet

Vh+Vl 2 • .(2) 上的電壓為低 亦即,共同電 接著,設定共同電壓以⑽為當掃描線12 值時,電容14所儲存的資料電壓之平均值,Vh + Vl 2 •. (2) The voltage is low, that is, common power. Next, set the common voltage to ⑽ as the average value of the data voltage stored in capacitor 14 when the value of scan line 12 is,

526461 五、發明說明(3) 壓Vcom的大小為vcet減去Vi所得到的值 然而,在實際的製造過程裡,每一晝素陣列中佘 路單元裡之電晶體Η的閘極ηι和源極113之間的雜=^電 CGS1,無可避免的會隨著不同的晝素陣列,而有一些^電容 i。換句話說’ Vl值會有一些變動。但—般而言广 13上的電壓Vh和八都是固定,故Vcet亦為定值,所以4線 因不同的晝素陣列裡不同的Vl值,會有不同的共同電斤會 Vcom、。目&,為了使每一晝素陣列的電路運作狀況固^ 所以必須針對每一畫素陣列作共同電壓Vc⑽的調整。, 一般而言,在習用方法中,共同電壓Vc⑽係利用 電阻之分壓來調整,如圖3所示。但是,此習用方法了變X 需要耗費人力來調整此可變電阻,且可靠度亦比較低。但 【發明概述】 有鑑於此,本發明的目的係提供一種用於液晶 之共同電壓自動調整裝^,可自動調整液晶顯示器中:: 陣列之共同電壓。 因此,本發明之用於液晶顯示器之共同電壓自動 裝置,係用以調整該液晶顯示器之畫素陣列中的書素二, 電路之共同電壓,該共同電壓自動調整裝置包含:二二= 體;一掃描線,電連接到該電晶體閘極,用以啟動關= 該電晶體;一資料線,電連接到該電晶體之汲極,且^ 維持在一資料最高電壓和一資料最低電壓之平均值,其= 該資料最高電壓和該資料最低電壓分別為提供至該書^陣526461 V. Description of the invention (3) The magnitude of the voltage Vcom is the value obtained by subtracting Vi from vce. However, in the actual manufacturing process, the gate and source of the transistor Η in the circuit unit in each day element array Miscellaneous between poles 113 = CGS1, inevitably there will be some capacitors i with different daylight arrays. In other words, there will be some changes in the V1 value. But—in general, the voltages Vh and VIII on Guang 13 are fixed, so Vcet is also a fixed value. Therefore, due to the different Vl values in the different day element arrays, the four wires will have different common voltages Vcom ,. In order to make the circuit operating condition of each pixel array solid, it is necessary to adjust the common voltage Vc⑽ for each pixel array. In general, in the conventional method, the common voltage Vc⑽ is adjusted by using the resistance voltage, as shown in FIG. 3. However, this conventional method requires a labor-intensive adjustment of the variable resistor to change X, and the reliability is relatively low. [Summary of the Invention] In view of this, the object of the present invention is to provide a common voltage automatic adjustment device for liquid crystals, which can automatically adjust the common voltage of an array in a liquid crystal display :. Therefore, the common voltage automatic device for the liquid crystal display of the present invention is used to adjust the common voltage of the book element two and the circuit in the pixel array of the liquid crystal display. The common voltage automatic adjustment device includes: two two = body; A scan line is electrically connected to the transistor gate for activating the transistor = the transistor; a data line is electrically connected to the drain of the transistor, and ^ is maintained at a data highest voltage and a data lowest voltage Average value, which = the highest voltage of the data and the lowest voltage of the data are provided to the book ^

第7頁 526461 五、發明說明(4) 列的資料信號之電壓最大值與最小值;一電容組,由並聯 之一液晶電容和一保持電容所構成,其一端接到該晝素陣 列的畫素單元電路之該共同電壓,另一端接到該電晶體的 源極,以及一緩衝器’輸入端電連接到電晶體的源極,而 輸出端電壓作為該晝素陣列的晝素單元電路之該共同電 壓;其中該電晶體、該資料線、該電容組以及該掃描線所 組成之電路,係與該晝素陣列之該晝素單元電路於同一製 程步驟形成,且其相對應的構件均相同或按相對的比例放 大,其所得到的效果亦相同,而此裝置係位於該晝素陣列 周源之非顯示區域。 【符號之說明】 11 電 晶 體 111 電 晶 體11 之 閘 極 112 電 晶 體11 之 汲 極 113 電 晶 體11 之 源 極 12 掃 描 線 13 資 料 線 14 電 容 41 電 晶 體 411 電 晶 體41 之 閘 極 412 電 晶 體41 之 汲 極 413 電 晶 體41 之 源 極 42 掃 描 線Page 7 526461 V. Description of the invention (4) The maximum and minimum voltages of the data signals in the column; a capacitor group consisting of a liquid crystal capacitor and a holding capacitor connected in parallel, one end of which is connected to the picture of the day element array The other end of the common voltage of the element unit circuit is connected to the source of the transistor, and a buffer 'input terminal is electrically connected to the source of the transistor, and the output terminal voltage is used as the day element unit circuit of the day element array. The common voltage; the circuit composed of the transistor, the data line, the capacitor group, and the scanning line is formed in the same process step as the day element unit circuit of the day element array, and the corresponding components are all The same or enlarged in relative proportions, the effect obtained is the same, and the device is located in the non-display area of the source of the daylight array. [Explanation of symbols] 11 transistor 111 transistor 11 gate 112 transistor 11 drain 113 transistor 11 source 12 scan line 13 data line 14 capacitor 41 transistor 411 transistor 41 gate 412 transistor Source of 41 413 Source of transistor 42 Scan line

526461 五、發明說明(5) 43 資料線 44 電容 A1 緩衝器 【較佳實施例之詳細說明】 以下參閱各附圖,詳細說明本發明之用於液晶顯示器 的共同電壓自動調整裝置的構造及其工作原理。 圖4係本發明之用於液晶顯示器的共同電壓自動調整 裝置的電路圖,係用在調整液晶顯示器之畫素陣列中之共 同電壓,包含·一 T F T電晶體41 ; 一掃描線4 2,連接到τ F T 電晶體之閘極411; 一資料線43,連接到電晶體之汲極 412,且此資料線電壓維持在Vcet ; 一電容44(令其電容值 ),係為液晶電容Clc和保持電容Q兩者並聯之等效電 :搞1電容一端接到共同電壓,另一端接到TFT電晶體的 :斤極’以5 一緩衝,輸入端電連接到TFT電晶體的 ^極413 ’而輸出端電連接到共同電壓以⑽。其中,電晶 線42、資料線43、以及電容44所組合之電路, 周緣之一畫素單元電路,而緩衝器A1係由-亦= 成…於外部驅動電路或驅動IC上, 41、掃描線42、資料線43、以H :曰曰體 畫素陣列裡的晝素單元電路 點:a卢路’和 之用途不㈤。另外,由於此 在於兩者 非顯示區域中,亦即不:係於”陣列周緣之 ·、、、頁不裔顯不區域的内容。526461 V. Description of the invention (5) 43 Data line 44 Capacitor A1 buffer [Detailed description of the preferred embodiment] The structure of the common voltage automatic adjustment device for liquid crystal display of the present invention and its structure are described in detail below with reference to the accompanying drawings. working principle. FIG. 4 is a circuit diagram of a common voltage automatic adjustment device for a liquid crystal display of the present invention, which is used to adjust a common voltage in a pixel array of a liquid crystal display, including a TFT transistor 41; a scanning line 4 2 connected to τ FT transistor gate 411; a data line 43, connected to the drain 412 of the transistor, and the voltage of this data line is maintained at Vcet; a capacitor 44 (to make its capacitance value) is a liquid crystal capacitor Clc and a holding capacitor Q The equivalent electricity of the two in parallel: One capacitor is connected to a common voltage at one end, and the other end is connected to the TFT transistor: the cathodic pole is 'buffered by 5', and the input terminal is electrically connected to the ^ pole of the TFT transistor and output The terminals are electrically connected to a common voltage. Among them, the circuit composed of the crystal line 42, the data line 43, and the capacitor 44 is a pixel unit circuit on the periphery, and the buffer A1 is formed by-also = on the external driving circuit or driving IC. 41, scanning Line 42, data line 43, and H: the day-to-day unit circuit point in the volume pixel array: a lulu 'and its purpose is not bad. In addition, because it lies in the non-display area of both, that is not: the content of the display area on the periphery of the array.

526461 五、發明說明(6) 圖5係圖4所示之電路運作時,掃描線42上之 電容44上之電塵的時序圖。當掃描線42上的電麼二5 (作又设其電壓為VG ),亦即τ 1到τ 2的時間内,電曰二向^ 導通,而使得資料線43的電壓Vcet寫入電容44_艰41=會 描線42上的電壓為低值時,亦即以到以的時間内j而,掃 41不通(cut-off),所以,因電晶體41的閘極411和^體 之3之間的雜散電容(令其為Cgs2),電容“所儲存的電原: 曰下降一小部分,依式i和式2可得緩衝器M的輸入、 Vcom’ ,如下式所示: 电变526461 V. Description of the invention (6) FIG. 5 is a timing diagram of the electric dust on the capacitor 44 on the scanning line 42 when the circuit shown in FIG. 4 is operating. When the voltage on the scanning line 42 is 5 (and its voltage is set to VG), that is, in the period of τ 1 to τ 2, the electricity is turned on in two directions, and the voltage Vcet of the data line 43 is written into the capacitor 44.难 41 = When the voltage on the trace 42 is low, that is, within the time period j, the sweep 41 is cut-off. Therefore, the gate 411 of the transistor 41 The stray capacitance between them (let's call it Cgs2), the stored "electricity of the capacitor": a small drop, and the input of the buffer M, Vcom 'can be obtained according to formula i and formula 2, as shown in the following formula: change

Vcom ’ = VcetVcom ’= Vcet

C GS2 C 2 + C GS 2 因為電晶體41、掃描 之電路,係為晝素陣 匸2和CGS2和畫素陣列中 相同或等比例放大, 异得到的V c 〇 m ’相同< 達成自動調整共同電 元件去做調整,可節 在理想的狀況下 發明之用於液晶顯示 動調整Vcom。但是, 所組合 以,其 設計為 上述計 回授, 或電路 置一本 即可自 在較大 線42、資料線43、以及電容44 列周緣之一畫素單元電路。所 的晝素單元電路中之電容值可 因此,可經計算得到其Vc⑽和 >換句話說,可藉由圖4之電路 壓的目的,而無須多餘的人力 省成本,亦可提高可靠度。 ’同一畫素陣列只需在周緣設 器的共同電壓自動調整裝置, 在實際應用上則不然。首先, 526461 五、發明說明(7) =素陣列中,畫素單元電路(如圖1)t掃描線12上 曰隨著不同的畫素單元而有不同。如圖6所示,在八電 知描線上的電壓為圖7A之波形,但是在經過傳輸之後‘:如 B屈、’掃描線上的電壓波形會因傳輪時所發生的Rc時間 —(C time delay),而會失真,如圖7C之波形。因此, 在A點和B點所下降的電壓值V1不同(如圖7B和圖7d), 同電壓Vcom也會產生誤差。 /、 為了解決上述實際應用上產生的問題,我們可以 列的周緣不同位置,設置多個上述之本發 “ 自:調整裝置(如圖8所示,設置在四個角落),以補償電: 同角洛、位置之晝素單元電路’因製程不均或掃描 因傳輸而失真所造成的VI之誤差,進而調整共同電壓電 Vcom ° 熟習此技術者可知,在實 免的會有一輸入電容,而使得 容,和晝素陣列中的晝素單元 異。因此’可利用幾種電路補 料線電壓設定為Vcet加上一補 411和源極41 3之間並聯一補償 輸入電容所引發之負載效應。 所以,以上所述者,僅為 佳實施例’本發明之範圍不限 明所做的任何變更’皆屬本發 際應用上,緩衝器A丨無可避 其和Cs並聯所得到的等效電 1路中之電容值會有些微差 领方式來補償,例如:將資 償電壓’或是在電晶體閘極 電容’即可補償緩衝器A丨的 用以方便說明本發明之一較 於該較佳實施例,凡依本發 明申請專利之範圍。C GS2 C 2 + C GS 2 Because the transistor 41 and the scanning circuit are enlarged in the same or equal proportion in the day element array 匸 2 and CGS2 and the pixel array, the difference between the obtained V c 〇m 'same < Adjusting the common electrical component to make adjustments can be used to adjust Vcom for liquid crystal display invented under ideal conditions. However, the combination is that it is designed as the above-mentioned feedback circuit, or a circuit can be placed in a single pixel unit circuit with a larger line 42, a data line 43, and a capacitor 44 on the periphery of the column. Therefore, the capacitance value in the daytime unit circuit can be calculated to obtain Vc⑽ and > In other words, the purpose of the circuit voltage of FIG. 4 can be saved without extra labor and cost, and reliability can be improved. . ’The same pixel array only needs a common voltage automatic adjustment device in the peripheral device, but it is not true in practical applications. First, 526461 V. Description of the invention (7) = In the pixel array, the pixel unit circuit (as shown in Fig. 1) t scan line 12 is different with different pixel units. As shown in FIG. 6, the voltage on the eight-wire drawing line is the waveform of FIG. 7A, but after transmission, the voltage waveform on the scanning line will be caused by the Rc time that occurs when the transmission passes— (C time delay), but will be distorted, as shown in the waveform of Figure 7C. Therefore, the voltage values V1 dropped at points A and B are different (as shown in Figs. 7B and 7d), and an error will also occur at the same voltage Vcom. /. In order to solve the above-mentioned problems in practical applications, we can arrange multiple above-mentioned "from: adjustment devices (as shown in Figure 8, set at four corners) at different positions on the periphery of the column to compensate for electricity: At the same angle, the location of the daytime unit circuit 'VI error caused by process unevenness or scanning distortion due to transmission, and then adjust the common voltage Vcom ° Those familiar with this technology will know that there will be an input capacitor in practice, The capacitance is different from the celestial element in the celestial array. Therefore, the voltage caused by several kinds of circuits can be set to Vcet plus a compensation 411 and the source 41 3 in parallel with a load caused by the input capacitor. Therefore, the above is only the preferred embodiment of the invention, "the scope of the present invention is not limited to any changes made" are in the hairline application, the buffer A 丨 unavoidably obtained in parallel with Cs The capacitance value of the equivalent electric circuit 1 will be compensated in a slightly different way, for example: the compensation voltage 'or the transistor gate capacitor' can be used to compensate the buffer A. Compared to Preferred embodiment, where the scope of the application under this patent inventions.

526461 圖式簡單說明 -- 圖1係一般之晝素單元的等效電路圖; 圖2係圖1所示之電路運作時之掃描線電壓(線a)、資 料線電壓(線B)以及電容電壓(線c)的時序圖; 圖3係$用之共同電壓調整裝置; 圖4係本發明之用於液晶顯示器之共同電壓自動調整 裝置的電路圖;以及 圖5係圖4所示之電路運作時之掃描線電壓(線A )、資 料線電壓(線B)以及電容電壓(線c)的時序圖。 、526461 Brief description of the diagram-Figure 1 is an equivalent circuit diagram of a general daylight unit; Figure 2 is the scanning line voltage (line a), data line voltage (line B), and capacitor voltage when the circuit shown in FIG. 1 operates (Line c) timing diagram; FIG. 3 is a common voltage adjustment device used in FIG. 4; FIG. 4 is a circuit diagram of a common voltage automatic adjustment device for a liquid crystal display of the present invention; and FIG. 5 is when the circuit shown in FIG. 4 operates The timing diagram of the scanning line voltage (line A), data line voltage (line B), and capacitor voltage (line c). ,

第12頁Page 12

Claims (1)

526461 六、申請專利範圍 1. 一種用於液晶顯示器之共同電壓自動調整裝置, 係用以調整該液晶顯示器之晝素陣列中的晝素單元電路之 共同電壓,該共同電壓自動調整裝置包含: 一電晶體,具有一閘極、一汲極以及一源極; 一掃描線,電連接到該電晶體之該閘極,用以啟動或 關閉該電晶體; 一資料線,電連接到該電晶體之該汲極,且電壓維持 在一資料最高電壓和一資料最低電壓之平均值,其中該資 料最高電壓和該資料最低電壓分別為提供至該畫素陣列的 資料信號之電壓最大值與最小值; 一電容組,由並聯之一液晶電容和一保持電容所構 成,其一端接到該晝素陣列的畫素單元電路之該共同電 壓,另一端接到該電晶體之該源極;以及 一緩衝器,輸入端電連接到該電晶體之該源極,而輸 出端電壓作為該晝素陣列的晝素單元電路之該共同電壓; 其中該電晶體、該貧料線、該電容組以及該掃描線所 組成之電路,係與該晝素陣列之該晝素單元電路於同一製 程步驟形成,且其相對應的構件均相同。 2. 如申請專利範圍第1項之共同電壓自動調整裝 置,其中該電晶體係TFT電晶體。 3. 如申請專利範圍第1項之共同電壓自動調整裝 置,其中該共同電壓自動調整裝置係設置在該液晶顯示器526461 6. Scope of patent application 1. A common voltage automatic adjustment device for a liquid crystal display is used to adjust a common voltage of a daylight unit circuit in a daylight array of the liquid crystal display. The common voltage automatic adjustment device includes: The transistor has a gate, a drain, and a source; a scan line electrically connected to the gate of the transistor to enable or disable the transistor; a data line electrically connected to the transistor The drain, and the voltage is maintained at an average value of a data maximum voltage and a data minimum voltage, wherein the data maximum voltage and the data minimum voltage are the maximum and minimum values of the voltage of the data signal provided to the pixel array, respectively A capacitor group consisting of a liquid crystal capacitor and a holding capacitor connected in parallel, one end of which is connected to the common voltage of the pixel unit circuit of the day element array, and the other end of which is connected to the source of the transistor; and A buffer, the input terminal of which is electrically connected to the source of the transistor, and the output terminal voltage is used as the common voltage of the day element unit circuit of the day element array Circuit consisting of wherein the transistor, the depleted feed line, the capacitor bank and the scan line, based on the same process step of forming the day pixel unit circuit of the day pixel arrays, and the corresponding member are the same. 2. The common voltage automatic adjustment device as described in item 1 of the patent application scope, wherein the transistor system is a TFT transistor. 3. If the common voltage automatic adjustment device of item 1 of the patent application scope, wherein the common voltage automatic adjustment device is provided on the liquid crystal display 第13頁 526461 六、申請專利範圍 之該畫素陣列周緣 4. 如申明專利範圍第3項之共同電壓自動調整裝 置,其中該電晶體、該資料線、該電容紐以及該掃描線所 組合之電路,係為該晝素陣列周緣之一晝素單元電路。 5. 如申明專利範圍第4項之共同電壓自動調整裝 置,更包含: 一補償電容’連接在該電晶體之該閘極以及該源極之 間,用以補償該緩衝器所引發之負載效應。 6 · 一種用於液晶顯示器共同電壓自動調整裝置,係 用以調整液晶顯示器之晝素陣列中,畫素單元電路的共同 電壓,該共同電壓自動調整裝置包含: ^ 一電晶體,具有一閘極、一汲極以及一源極; 一掃描線,電連接到該電晶體之該閘極,用以啟 關閉該電晶體; 一電容組,係為並聯之一液晶電容和一保持電容,1 一端接到該晝素陣列之該共同電壓’另一端接& 之該源極;以及 甩日日體 一緩衝器,供輸出緩衝之用,輸入端電連 體之該源極,而輸出端電連接到該晝素陣列之丘^曰曰 壓;以及 μ /、卜j電 -資料線’連接到該電晶體之該沒極’I電壓維持在Page 13 526461 VI. The periphery of the pixel array for which the patent is applied 4. If the common voltage automatic adjustment device of item 3 of the patent scope is declared, the transistor, the data line, the capacitor button, and the scan line are combined The circuit is a celestial unit circuit on the periphery of the celestial array. 5. If the common voltage automatic adjustment device of item 4 of the declared patent scope further includes: a compensation capacitor is connected between the gate and the source of the transistor to compensate for the load effect caused by the buffer . 6 · A common voltage automatic adjustment device for a liquid crystal display, which is used to adjust the common voltage of the pixel unit circuit in the diurnal array of the liquid crystal display. The common voltage automatic adjustment device includes: ^ a transistor with a gate , A drain and a source; a scan line electrically connected to the gate of the transistor to turn the transistor on and off; a capacitor group, which is a liquid crystal capacitor and a holding capacitor in parallel, 1 end Connected to the common voltage of the celestial array, the other end is connected to the source of the & and a buffer of the solar body for output buffering, the source is connected to the source of the input terminal, and the output terminal is powered The voltage connected to the dipole array of the day element array; and the μ /, b-electrical-data line 'connected to the transistor's' immortal' voltage is maintained at 526461 六、申請專利範圍 資料最高電壓和資料最低電壓之平均電壓加上一補償電 壓,其中該資料最高電壓和該資料最低電壓,係為提供至 該晝素陣列的資料信號之電壓最大值與最小值,且該補償 電壓係用以補償該緩衝器所產生之負載效應; 貝 其中該電晶體、該資料線、該電容組以及該掃描線所組人 之電路,,係與該晝素陣列之該畫素單元電路於同一製ς 步驟形成,且其相對應的構件均相同。 衣 7·如申請專利範圍第6項之共同電壓自動調整梦 置’其中該電晶體係TFT電晶體。 衣 =請專利範圍第6項之共同電壓自 同電壓自動調整裝置係設置在該液曰顯哭 之該晝素陣列周緣。 ^文日日顯不器 9·如申請專利範圍第8項之丘回雪懕白知 置,其中該電晶體R自動調整裝 組合之電路,係為螻蚩音查 久落知描線所 行马該旦素陣列周緣之一晝素526461 6. The average voltage of the highest voltage and the lowest voltage of the data in the scope of the patent application plus a compensation voltage, where the highest voltage of the data and the lowest voltage of the data are the maximum and minimum voltages of the data signals provided to the daylight array. Value, and the compensation voltage is used to compensate the load effect generated by the buffer; the transistor, the data line, the capacitor group, and the circuit composed of the scanning line are connected to the day element array. The pixel unit circuit is formed in the same manufacturing process, and the corresponding components are the same. 7. The common voltage automatic adjustment dream device according to item 6 of the scope of patent application, wherein the transistor system is a TFT transistor. The common voltage self-adjusting device for common voltage from item 6 of the patent scope is set on the periphery of the day element array where the liquid is crying. ^ Wenri Daily Display Device 9 · For example, Qiu Huixue, Bai Zhizhi, No. 8 in the scope of patent application, where the transistor R automatically adjusts and combines the circuit, which is performed by Yinyin Chajiluozhi. Dioxin
TW89101239A 2000-01-24 2000-01-24 Automatic adjusting device for common voltage of liquid crystal display TW526461B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI386901B (en) * 2008-03-14 2013-02-21 Chimei Innolux Corp Lcd and driving method thereof
TWI399731B (en) * 2007-07-10 2013-06-21 Japan Display West Inc Electro-optical device, driving circuit, and electronic apparatus
TWI560681B (en) * 2010-03-29 2016-12-01 Samsung Display Co Ltd Liquid crystal display and method of operating the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI399731B (en) * 2007-07-10 2013-06-21 Japan Display West Inc Electro-optical device, driving circuit, and electronic apparatus
TWI386901B (en) * 2008-03-14 2013-02-21 Chimei Innolux Corp Lcd and driving method thereof
TWI560681B (en) * 2010-03-29 2016-12-01 Samsung Display Co Ltd Liquid crystal display and method of operating the same

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