TW519594B - High-speed circuit design method of interface technique - Google Patents

High-speed circuit design method of interface technique Download PDF

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Publication number
TW519594B
TW519594B TW90117289A TW90117289A TW519594B TW 519594 B TW519594 B TW 519594B TW 90117289 A TW90117289 A TW 90117289A TW 90117289 A TW90117289 A TW 90117289A TW 519594 B TW519594 B TW 519594B
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Taiwan
Prior art keywords
upd
circuit diagram
speed
netprops
circuit
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TW90117289A
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Chinese (zh)
Inventor
Shuei-Ke Huang
Jiun-Lang Lu
Cheng-Ruei Lin
Shiun-Tai Wei
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Changhwa Telecom Co Ltd
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Priority to TW90117289A priority Critical patent/TW519594B/en
Application granted granted Critical
Publication of TW519594B publication Critical patent/TW519594B/en

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Abstract

A high-speed circuit design method of interface technique is disclosed in the present invention, where the main technique is to move and execute the setting work of high-speed circuit rule in the circuit drawing system (Orcad Capture). Additionally, the interface setting and Orcad Capture of high-speed circuit rule as well as the Expedition PCB communication interface are designed to simplify the intervention of manpower and accelerate the setting work of high-speed rule. Therefore, it is not necessary to set repeatedly the former high-speed circuit rule data of the corrected PCB so as to reach the purpose of increasing yield and efficiency.

Description

519594 五、發明説明(I ) 【技術領域】 本發明係關於一種介面技術之咼速線路設計方法,特 別是指一種將高速線路法則之設定工作移至電路圖繪圖系 統(Oread Capture)中執行,並設計高速線路法則之設定介面 5 及 Oread Capture與 Expedition PCB 溝通介面。 【先前技術】 為因應電路高速化之發展,印刷電路板(Print Circuit Board,PCB)詨計時須依各種不同高速線路之特性,設定 不同之設計法則,然後PCB佈線時再依所設定之各種法則 10佈線;然目前高速線路法則之設定均在PCB設計系統中 (Expedition PCB)依高速線路信號名稱逐一以人工方式設 定,此不僅費時無效率,且容易錯誤,而影響PCB設計品 質。 由此可見,上述習用物品仍有諸多缺失’實非一良善 15 之設計者,而亟待加以改良。 經濟部智慧財產局員工消費合作社印製 本案發明人鑑於上述習用方法所衍生的各項缺點’乃 亟思加以改良創新,並經多年苦心孤詣潛心研究後’終於 成功研發完成本件介面技術之高速線路設計方法。 【發明目的】 20 本發明之目的即在於提供一種介面技術之南速線路設 計方法,係將高速線路法則之設定工作移至電路圖繪圖系 統(Oread Capture)中執行,並設計高速線路法則之設定介面 及Oread Capture與Expedition PCB溝通介面,以簡化人工之介 入,使高速法則之設定工作加速,且對於改版PCB之舊有 _;___^_ —_ 本紙張尺度適用中國國家標準(CNS ) A4規格(210Χ;297公釐) 519594 A7 B7 PAflQnfiQQ Twp - 4/9~ 經濟部智慧財產局員工消費合作社印製 五、發明説明(^) 高速線路法則資料可免重複設定,而達提高良率與效率之 目的。 【技術内容】 Oread Capture與Expedition PCB介面技術高速線路設計 5 方法之執行及轉換過程方法,如下步驟: ◎建立電路圖之netlist.kyn ; ◎執行Forward n.upd程式,產生電路圖之n.upd ; ◎將 n.upd填入電路圖,並 Create netlist.edf ; ◎執行NetPreps for VB程式,產生電路圖之 10 NetProps.hkp : ◎ Import 電路圖之 NetProps.hkp 至 Layout Database,完成 Layout後,Export Layout Database之 NetProps.hkp ; ◎執行 Backward n.upd 程式,產生 Layout Database 之 n.upd ; ◎將n.upd填入電路圖中進行電路圖NetProps之ECO。 【圖式簡單說明】 請參閱以下有關本發明一較佳實施例之詳細說明及其 附圖,將可進一步瞭解本發明之技術内容及其目的功效; 有關該實施例之附圖為: 圖一為本發明介面技術之高速線路設計方法之設定及 轉換過程流程圖。【主咢部分代表符號】 10建立動作 20執行動作 15 20 -4- 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閲讀背面之注意事項再填寫本頁) 裝· 訂 五 、發明説明(孑) PA89Q59Q Τ\Λ7ρ 10 15 30填入動作 40執行動作 5〇輪出動作 6〇產生動作 70填入動作 【較佳實施例】 t發明之介面技術之高速線路設計方法是將高速線路 又疋工作移至電路圖繪圖系統(Oread Capture)中執行,並 十向速線路法則之設定介面及Oread Capture與Expedition PCB溝通介面,以簡化人工之介入,使高速法則之設定工 #力°速’且對於改版PCB之舊有高速線路法則資料可免重 複攻定,而達提高良率與效率。 4參閱圖一所示,為本發明之設定及轉換流程圖,其 中包括有七項執行步驟,分述如下·· 步驟一(10);:建立電路圖之netlist.kyn。 5兒明:從〇rcacl Capture電路圖中抽取電路圖網路表… netlist.kyn。 (20 ) ••執行Forward n.upd程式,產生電路圖之 n.upd 〇 透過Forward n.upd程式,依netlist.kyn内容產生高 速線路設計法則…n.upd槽案;產生n.upd檔案過 程中依電路板是新版或是改版而過程稍有不 同,若為新版僅需依目前版本2netlist.kyn内容 產生n.upd即可;若為改版則需結合目前版本之 步驟 說明 度適用中國國家榡準(CNS ) A4規格(210X297公羡) (請先閲讀背面之注意事項再填寫本頁) 裝. 線 519594 A7 B7 五 發明説明(&) ο Γ ---4 5 1 經濟部智慧財產局員工消費合作社印製 20 net ist.kyn及上一版本之 netiist.kyn、n.upd槽案内 容,參考比對後再產生目前版本之n.upd檔案。 步驟三(30 ) ••將n.upd填入電路圖,並Create netlist.edf ° 說明:將高速線路設計法則…^叩“當案内容,填入 Oread Capture 電路圖中,並抽取 0rcad capture 電 路圖edifZOO格式之網路表…netlist.edf,内含高速 線路設計資料。 步驟四(40 ):執行NetProps for VB程式,產生電路圖 之 NetProps.hkp。 說明··透過NetProps for VB程式依〇rcad Capture電路圖之 netlist.edf及netlist.kyn檔案内容產生PCB設計欲用 之南速線路屬性控制擋…NetProps.hkp。 步驟五(50 )·· Import 電路圖之 NetProps.hkp 至 Layout Database,完成 Layout 後,Export Layout Database 之 NetProps.hkp。 說明··將NetProps.hkp檔案輸入到PCB設計資料庫中, 開始高速PCB之設計工作,在高速PCB設計過 程中,可能會修改NetProps.hkp檔案内容·,為取 得Oread Capture電路圖及高速PCB設計資料庫之 高速線路設計資料之一致性,需在設計完成後 . 將最新之NetProps上kp檔案内容Export出來’回 傳給Oread Capture電路圖。 步驟六(60 ):執行Backward n.upd程式’產生Layout519594 V. Description of the Invention (I) [Technical Field] The present invention relates to a high-speed circuit design method of an interface technology, in particular, a method for moving the setting work of a high-speed circuit rule to a circuit diagram drawing system (Oread Capture) for execution, and Design interface 5 for high-speed line rules and communication interface between Oread Capture and Expedition PCB. [Previous technology] In order to respond to the development of high-speed circuits, the timing of printed circuit boards (Print Circuit Boards, PCBs) must be set according to the characteristics of various high-speed circuits, and then different rules must be set during PCB wiring. 10 wiring; however, the current high-speed line rules are set manually in the PCB design system (Expedition PCB) according to the high-speed line signal names one by one, which is not only time-consuming and inefficient, but also easy to make mistakes, and affects the quality of PCB design. It can be seen that there are still many shortcomings in the above-mentioned conventional articles. It is not a good designer, and it needs to be improved. The inventor of the Intellectual Property Bureau of the Ministry of Economic Affairs printed the inventor of this case in view of the shortcomings derived from the above-mentioned conventional methods. method. [Objective of the Invention] 20 The purpose of the present invention is to provide a South Speed line design method of interface technology, which moves the setting work of the high speed line rule to the circuit diagram drawing system (Oread Capture) and designs the setting interface of the high speed line rule. And Oread Capture and Expedition PCB communication interface to simplify manual intervention, speed up the setting of high-speed rules, and the old PCB revision _; ___ ^ _ —_ This paper size applies Chinese National Standard (CNS) A4 specifications ( (210 ×; 297 mm) 519594 A7 B7 PAflQnfiQQ Twp-4/9 ~ Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (^) The high-speed line rule data can be set without repeating, so as to improve the yield and efficiency. purpose. [Technical content] Oread Capture and Expedition PCB interface technology high-speed circuit design 5 method implementation and conversion process method, the following steps: ◎ create a netlist.kyn of the circuit diagram; ◎ execute the Forward n.upd program to generate the n.upd of the circuit diagram; ◎ Fill n.upd into the circuit diagram and create netlist.edf; ◎ Run the NetPreps for VB program to generate 10 NetProps.hkp of the circuit diagram: ◎ Import NetProps.hkp of the circuit diagram to the Layout Database. After completing the layout, export the NetProps of the Layout Database. hkp; ◎ Execute Backward n.upd program to generate n.upd of Layout Database; ◎ Fill n.upd into the circuit diagram for ECO of NetProps. [Brief description of the drawings] Please refer to the following detailed description of a preferred embodiment of the present invention and the accompanying drawings to further understand the technical content of the present invention and its purpose and effect. The drawings related to this embodiment are: Figure 1 It is a flowchart of the setting and conversion process of the high-speed line design method of the interface technology of the present invention. [Representative symbols of the main part] 10 establishment actions 20 execution actions 15 20 -4- This paper size applies to the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page) Installation · Order five. Description of the invention (孑) PA89Q59Q Τ \ Λ7ρ 10 15 30 Fill in action 40 Execute action 50 Round out action 60 Generate action 70 Fill in action [preferred embodiment] t Invented interface technology for high-speed line design method The high-speed circuit is moved to the circuit diagram drawing system (Oread Capture) for execution, and the setting interface of the ten-direction circuit rule and the communication interface of Oread Capture and Expedition PCB are used to simplify manual intervention and make the setting method of the high-speed rule # Force's speed 'and to revise the old high-speed circuit law data of PCB can avoid repeated determination, so as to improve the yield and efficiency. 4 Refer to Figure 1 for the setting and conversion flowchart of the present invention, which includes seven execution steps, which are described as follows: Step 1 (10) ;: Create netlist.kyn of the circuit diagram. 5 Erming: Extract circuit diagram netlist from 〇rcacl Capture circuit diagram ... netlist.kyn. (20) •• Run the Forward n.upd program to generate n.upd of the circuit diagram. 〇Use the forward n.upd program to generate high-speed circuit design rules based on the contents of netlist.kyn ... n.upd slot; in the process of generating n.upd files The process is slightly different depending on whether the circuit board is new or revised. For the new version, you only need to generate n.upd according to the content of the current version 2netlist.kyn; if the version is revised, you need to combine the current version of the step description to apply the Chinese national standard. (CNS) A4 specification (210X297 public envy) (Please read the precautions on the back before filling out this page) Packing. Line 519594 A7 B7 Five & Description of invention () Γ --- 4 5 1 Employee of Intellectual Property Bureau, Ministry of Economic Affairs The consumer cooperative prints the contents of the 20 net ist.kyn and the previous versions of the netiist.kyn and n.upd slots. After reference and comparison, the current version of the n.upd file is generated. Step three (30) •• Fill n.upd into the circuit diagram and create netlist.edf ° Note: fill in the high-speed circuit design rules ... ^ 叩 "the content of the case, fill in the Oread Capture circuit diagram, and extract the 0rcad capture circuit diagram edifZOO format Netlist ... netlist.edf, which contains high-speed line design data. Step 4 (40): Run the NetProps for VB program to generate the NetProps.hkp of the circuit diagram. Explanation ·· Netlist by NetProps for VB program according to the cadcad capture circuit diagram The contents of the .edf and netlist.kyn files are used to generate the South Speed line attribute control block for the PCB design ... NetProps.hkp. Step five (50) · Import NetProps.hkp of the circuit diagram to the Layout Database. After completing the layout, export the Layout Database NetProps.hkp. Explanation ·· Input the NetProps.hkp file into the PCB design database and start the high-speed PCB design work. During the high-speed PCB design process, the contents of the NetProps.hkp file may be modified. To obtain the Oread Capture circuit diagram and The consistency of the high-speed circuit design data in the high-speed PCB design database is required after the design is completed. The latest NetProps kp out Export file content 'step back to the circuit diagram of Oread Capture six (60): Backward n.upd program executed' generates Layout

(請先閱讀背面之注意事項再填寫本頁)(Please read the notes on the back before filling this page)

、1T 519594 A7 B7 五、發明説明(5"), 1T 519594 A7 B7 V. Description of the invention (5 ")

Database之 n.upd 〇 (請先閲讀背面之注意事項再填寫本頁) 說明:使用Backward n.upd程式取最新之NetProps.hkp檔 案内容,產生Layout Database之n.upd槽案。 步驟七(70 ):將n.upd填入電路圖中進行電路圖 NetProps之 ECO 〇 說明:將n.upd填入電路圖中,完成〇rcad capture電路圖 及南速PCB設計資料庫之高速線路設計資料之 同步工作。 【特點及功效】 10 本發明所提供之介面技術之高速線路設計方法,與前 述引證案及其他習用技術相互比較時,更具有下列之優 本务明提供一種介面技術之高速線路設計方法,係將 高速線路法則之設定工作移至電路圖繪圖系統(〇rcad 15 CaPture)中執行,並設計高速線路法則之設定介面及〇rcad Capture與Expedition PCB溝通介面,以簡化人工之介入,使 高速法則之設定工作加速,且對於改版PCB之舊有高速線 路法則資料可免重複設定,而達提高良率與效率。 上列詳細說明係針對本發明之一可行實施例之具體說 20明,惟該實施例並非用以限制本發明之專利範圍,凡未脫 離本發明技藝精神所為之等效實施或變更,均應包含於本 案之專利範圍中。 综上所述,本案不但在技術思想上確屬創新,並能較 習用物品增進上述多項功效,應已充分符合新穎性及進步 ______- 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公慶) 519594 A7 ------PA89Q59Q.TWP - 8/9五、發明説明(厶)性之法定發明專利要件,爰依法提出申請,懇請貴局核 准本件發明專利申請案,以勵發明,至感德便。 丨· ^ 7 I (請先閱讀背面之注意事項再填寫本頁)Database n.upd 〇 (Please read the notes on the back before filling this page) Note: Use the Backward n.upd program to get the latest NetProps.hkp file content to generate the n.upd slot of the Layout Database. Step seven (70): Fill n.upd into the circuit diagram and perform the ECO of the NetProps circuit diagram. Description: Fill n.upd into the circuit diagram to complete the synchronization of the rcad capture circuit diagram and the high-speed circuit design data of the Nansu PCB design database. jobs. [Features and effects] 10 When compared with the aforementioned citations and other conventional technologies, the high-speed circuit design method of the interface technology provided by the present invention has the following advantages. This book provides an interface technology-based high-speed circuit design method. Move the setting work of the high-speed line rule to the circuit diagram drawing system (〇rcad 15 CaPture), and design the setting interface of the high-speed line rule and the communication interface of 〇rcad Capture and Expedition PCB, in order to simplify the manual intervention and make the setting of the high-speed rule The work is speeded up, and the old high-speed circuit law data of the modified PCB can be avoided from being repeatedly set, so as to improve the yield and efficiency. The above detailed description is a specific explanation of a feasible embodiment of the present invention. However, this embodiment is not intended to limit the scope of the patent of the present invention. Any equivalent implementation or change that does not depart from the technical spirit of the present invention should be Included in the patent scope of this case. In summary, this case is not only technically innovative, but also enhances the above-mentioned multiple effects over conventional items. It should have fully met the novelty and progress ______- This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 (Government Day) 519594 A7 ------ PA89Q59Q.TWP-8/9 V. Description of invention (厶) statutory invention patent elements, apply in accordance with the law, and kindly ask your office to approve this invention patent application to encourage invention To the sense of virtue.丨 · ^ 7 I (Please read the notes on the back before filling this page)

、1T 線 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) Μ規格(210Χ297公釐)Line 1T Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper size applies to Chinese National Standards (CNS) M specifications (210 × 297 mm)

Claims (1)

519594 A8 B8 C8 D8 PA890590.TWP - 9/9 六、申請專利範圍 1 · 一種介面技術之高速線路設計方法,主要是將高速 線路法則之設定工作移至電路圖繪圖系統(〇cad Capture)中執行,並設計高速線路法則之設定介面及 Oread Capture與Expedition PCB溝通介面,其中包括下 5 列步驟: a. 建立電路圖之netlist.kyn ; b. 執行Forward n.upd程式,產生電路® in.upd ; c ·將 n.upd填入電路圖,並 Create netlist.edf ; d.執行NetPrqps for VB程式,產生電路圖之 10 NetProps.hk^^^ e · Import 電路圖^^NetProps.hkp 至 Layout Database,完成 Layout後,Export Layout Database之 NetProps.hkp ; f ·執行 Backward n_upd 程式,產生 Layout Database 之 n.upd ; 15 g·將n.upd填入電路圖中進行電路圖NetProps之ECO。 (請先閲讀背面之注意事項再填寫本頁)519594 A8 B8 C8 D8 PA890590.TWP-9/9 VI. Application for patent scope 1 · A high-speed circuit design method of interface technology, which mainly moves the setting work of high-speed circuit rules to the circuit diagram drawing system (〇cad Capture) for execution, And design the interface of the high-speed line rule and Oread Capture and Expedition PCB communication interface, including the following 5 steps: a. Create a netlist.kyn of the circuit diagram; b. Run the Forward n.upd program to generate the circuit ® in.upd; c · Fill n.upd into the circuit diagram and create netlist.edf; d. Run the NetPrqps for VB program to generate 10 NetProps.hk ^^^ e · Import the circuit diagram ^^ NetProps.hkp to the Layout Database. After completing the layout, NetProps.hkp of Export Layout Database; f · Run the Backward n_upd program to generate n.upd of Layout Database; 15 g · Fill in n.upd into the circuit diagram to perform the ECO of NetProps. (Please read the notes on the back before filling this page) 經濟部智慧財/4¾¾工消費合作社印製 本紙張尺度顧中國10 χ 297公缝)(Printed by the Ministry of Economic Affairs, Smart Money / 4¾¾Industrial Consumer Cooperative)
TW90117289A 2001-07-16 2001-07-16 High-speed circuit design method of interface technique TW519594B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108549756A (en) * 2018-04-02 2018-09-18 郑州云海信息技术有限公司 Checked in a kind of placement-and-routing high-speed line across island method and system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108549756A (en) * 2018-04-02 2018-09-18 郑州云海信息技术有限公司 Checked in a kind of placement-and-routing high-speed line across island method and system

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