TW508504B - Method and apparatus for serving data - Google Patents

Abstract

A method for translating a VPI/VCI of an ATM cell into an internal ID comprising the steps of: distributing VPI/VCI entries into sections in a table according to a portion of each VPI/VCI entry; receiving an ATM cell; selecting a section to be searched according to the portion of a VPI/VCI of the received ATM cell; performing a search over the selected, section to find an entry corresponding to the VPI/VCI of the received ATM cell; and outputting an internal ID corresponding to the found entry.

Description

508504 A7 _ B7 V. Description of the invention (1) Background of the present invention: The present invention relates to a server for data transmission. Traditional server designs tend to actively involve the physical transfer of data. For applications such as on-demand video or on-demand accompaniment, it is necessary to deliver a high number of digital video streams in real time. Digital video strings typically include video data compressed in accordance with ISO / IEC11172 or ISO / IEC13818 (potentially the well-known MPEG-1 standard and μPEG-2 standard, respectively). In European Patent Application No. 9 · 2008 · 19.1, a server system has been proposed that extends beyond the ATM (Asynchronous Transfer Mode) series with only pure data transmission capabilities. International Patent Application No. WO96 / 〇8 8 9 6 published in PCT (Patent Cooperation Treaty) has proposed a string type for ATM communication constructed as an AS IC (Special Application Integrated Circuit) processor. ’European Patent Application No. EP 0 6 6 7 7 1 3 A 2 proposes a method for recording and reproducing compressed video data according to the M EP G standard. In this case, the compressed video data is recorded on the magnetic disk in a special way containing scanning information, so that the specially compressed video data reproduction device can obtain the VCR function (such as fast-forward, fast-rewind the description of the present invention : The purpose of the present invention is to improve the above-mentioned conventional technology and / or provide the paper size applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling this page) .f Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs I nnnnn III nnin in n If n -4-Printed by the Consumers’ Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 508504 A7 ____ Β7 _ V. Description of the invention (2) Servers for future applications The first aspect of the present invention provides a method for converting an VPI / VCI of an ATM unit into an internal ID, which includes the following steps: classifying the VρI / VCI entry into one according to a part of each VPI / VCI entry Segments in the table; Receive an A TM unit; · Select the segment to be searched according to the part of the VPI / VCI of the received ATM unit; The segment is searched in order to find the entry corresponding to the VP I / VC I of the received ATM unit; and to output the internal ID corresponding to the found entry. A preferred embodiment of the method according to the invention is described in The attached child is in the scope of patent application. The present invention further provides a device that converts the unit "? 1/7 (: 1 into an internal ID), which includes:-a table for storing the VP I / VC Γ entry, And is divided into segments; a mechanism that classifies VPI / VCI entries into sections in the table according to a part of each VP I / VC I entry; selects the part that will be selected based on the VPI / VCI part of the received AT MU unit The organization of the searched segment; and a search of the selected segment to find the VP I / VC I entry corresponding to the received ATM unit and the mechanism to output the internal ID corresponding to the found entry ≫ This paper size applies to Chinese National Standard (CNS) A4 (210 X 297 public love) ~ -5- (Please read the precautions on the back before filling this page}

508504 Α7 ----____ Β7 Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (3) The second aspect of the present invention provides a device for sending data to the AT Μ network and receiving data from a T The information of the M network, the device includes (a)-a bus interface 'for interfacing with a host, a storage device and the bus to support communication between the device; (b)-asynchronous transfer mode (ATM) An interface for connecting to the AT M network; (c) a sending unit for transmitting output data from the bus interface to the ATM interface, the sending unit includes: (1) a first RAM interface for connecting the RA MU used as a buffer This buffer is used to temporarily store the output data from the bus interface; (2) the mechanism used to divide the output data from the buffer into output A τ Μ units; and (3)-communication A quantity shaper is used to control the communication volume of the output ATM unit-ATM interface in cooperation with the division mechanism; and (d) —a receiving unit is used to transmit input data from the ATM interface to the bus interface. The receiving unit includes : (1) Used to lose The ATM unit implements the VP I / VC I filtering mechanism, (2) the mechanism for reorganizing the input data by using the payload of the input A TM unit, and (3) the second RAM interface, which is used to interface with the buffer used as a buffer RA M, this buffer is used to temporarily store input data from the reorganization agency. This device according to the present invention is provided with a large number of users and distributed on the system (please read the precautions on the back before filling out this page) Φ Order --- line 丨 · This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) -6- 508504 A7 B7 V. Description of the Invention (4) Management of the daily application interaction of the management module and management of the data being transmitted. The server according to the present invention provides time or processing energy to perform higher-level management tasks when the host is less actively involved in the physical transfer of data. The hardware according to the present invention can transfer data in real time under different performance requirements, and is quite suitable for such real-time transport. The string processor according to the present invention is capable of supporting simultaneous communication with many users and assisting video string tasks. The server according to the present invention also provides interactive capabilities, such as services for providing information to any type of user. The content to be delivered can be stored in the server according to the invention in various forms (i.e., raw or unformatted). A third aspect of the present invention provides a method for stringing data from a storage device, the method comprising the steps of: providing a write-to-buffer write address for a burst of data, at least a portion of the write address Is discontinuous; sends the burst data from the storage device to the buffer via the bus support communication between the master k, the storage device and the serial device; writes the burst data according to the write address The buffer; and reading data from the buffer in a linear fashion. A preferred embodiment of the method according to the present invention claims the children of the invention as patented. The present invention further provides a string device for stringing data from a storage device, which includes: Supporting a paper standard applicable to Chinese National Standard (CNS) A4 via a bus between the host, the storage device, and the string device Specifications (21 (^ 297 mm) (Please read the precautions on the back before filling out this page) Order --- Line 丨 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs J ^ 85〇4 A7 B7 V. Description of the invention (5) Communication 'a mechanism for receiving burst data from a storage device; a mechanism for providing a write address for the burst data, at least ~ part of the write address is discontinuous; and a buffer' its basis Write the address to store the burst of data, and output the data from there linearly. The fourth aspect of the present invention provides a method for transmitting data, which includes the following steps: Loading at least one pair of bits from a host Address and command; store the data in a buffer; read the data from the buffer according to the read index; if it is detected that the address matches the address specified by the read index ' Nori The command is executed; and the data is read from the buffer after the execution of the command. The present invention further provides a device for transmitting data, which includes: a command block for storing a pair of addresses and commands loaded from the host And detect a match between the address and the address specified by the read index of the buffer that temporarily stores the data; a mechanism that, when a match is detected, the mechanism cooperates with the command block to execute the command; And a mechanism for transmitting data read from the buffer after the execution of the command. A fifth aspect of the present invention provides a method for transmitting data, which includes the following steps: receiving data from the network; Zhang scale is applicable to China National Standard (CNS) A4 (210 X 297 mm)

Ilt (Please read the notes on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs ----------- Line 丨 —— -8-508504 A7 ________________________ B7 V. Description of Invention (6) When the received data is transmitted to the storage device, at least one preset bit pattern in the data is detected; when the preset bit pattern is detected, it will correspond to the pre-set bit pattern in the data. Add the location information of the location of the bit pattern to a list; store the data in the storage device; and control the information from the storage device to the network based on the location information in the list Data transfer. A preferred embodiment of this method is described in the scope of the attached sub-application patent. The present invention further provides a device for transmitting data, which includes: a receiving mechanism for receiving data from the network; a pattern detector, when the data is from When the receiving mechanism sends to the storage device storing the data, it is used to detect at least one preset bit pattern in the data; a list, when the te pile detector detects the preset bit pattern 'Style time' is used to store the position information corresponding to the preset bit pattern in the data in the list; and-the mechanism, which controls the storage device from the storage device according to the position information in the list Transfer of data to the network. A sixth aspect of the present invention provides a traffic shaping method, which includes the following steps: classifying one or more first strings into one or more types, each type including one or more strings having a same bit rate characteristic; Set a set of parameters to control the bit rate of each type; and this paper size applies the Chinese National Standard (CNS) A4 specification (210 x 297 mm) (Please read the precautions on the back before filling this page) Φ 丨 丨Order --------- line * Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 9- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 508504 A7 ______ B7 V. Description of the invention (7) According to the parameters of this group To perform each type of pace. A preferred embodiment of this method is described in the attached sub-application patent scope. The present invention further provides a traffic shaper, which includes: a device that classifies one or more first strings into one or more types, each type including One or more strings with the same bit rate characteristics; a storage device for storing a set of parameters to control the bit rate of each type; and a mechanism for performing the pace of each type according to the set of parameters. Brief description of the drawings: When reading the following description with reference to the accompanying drawings, the advantages, features and details of the present invention will become clear. FIG. 1 shows a general system architecture of an interactive traffic system; FIG. 2 shows a detailed block diagram of an embodiment of the device of the present invention; FIG. 3 shows a block diagram of a Tx address converter in FIG. 2; FIG. 4 shows a diagram Examples of the use of the address converter in Figure 3; Figures 5 A, 5 B, and 5 C show individual examples of address translation for the transmission control protocol Internet Protocol (TCPIP) packetization; Figure 6 shows Figure 2 An example of the use of a Tx rate block; Figure 7 shows the bit rate achieved by the traffic shaper in Figure 2; Figure 8 shows the graph used to illustrate the sending of strings during a single unit; Figure 9 shows the different Proposal of types of units; This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page)

-10- 508504 Printed by the Consumer Property Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (8) Figure 1 0 is a block diagram of the structure used for reshaping benefits in Figure 2 Figure 1 1 Shows Figure 2 A block diagram of the command block; Figure 12 is a diagram for explaining the operation of the byte switch in Figure 2. Figure 13 shows the format of the AT MU unit used in the user network interface (UN I); 1 4 shows a block diagram of the VP I / VCI converter in FIG. 2. FIG. 15 shows a block diagram of the pattern detector in FIG. 2. FIG. 16 shows an example of the address converter in FIG. 2. DESCRIPTION OF SYMBOLS 10 Server 1 2 Storage unit 14 Local ATM converter 16 Public network 18 Set-top box 20 Storage device 22 Storage device controller 2 4 Peripheral component interconnection 2 6 PCI bridge 2 8 Host 3 0 Main CPU 'This paper Standards are applicable to China National Standard (CNS) A4 (210 X 297 mm) ni IK 1 MmmmmmMm m f > — tmmmmm i SI IB mmmmmm in amM§ mmm§ emm§ ^ ^ a * ih ··· μμμ Μημβ ι · > μη m ···· § I 9 nn ·· an 1 · Hi · Mmmaw tmt n 1 n · 1 · emmam i MmmB emmmmm tmmmme Mmmmmm mmm§ mmmmmmm mmmmmmm Mmmmi (Please read the precautions on the back before filling this page) -η-508504 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7_V. Invention Description (9) 3 2 Main Memory 3 6 Serial Processor 3 8 PCI Interface 4 0 Interface 4 2 External RA Μ 4 4 String Buffer 4 6 External RA M 4 8 String buffer 50 Transmission path 5 4 TX address converter 5 6 Checksum block 5 7 Checksum register 5 8 RA Μ interface 60 string data integrity (SDI) block 62 Communication i Shaper 64 Byte Converter 6 6 Command Block 68 Rate change indicator generator 7 0 Segmented block 8 0 Receive path 8 4 VPI / VCI filter block 8 6 Reassembly block 8 8 TCP check and check block 90 RX RAID or SDI block (please read the notes on the back before filling (This page) -tii! I — — — — — — — — — — — IIIIIII — — — This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) -12- Consumption by Employees of Intellectual Property Bureau, Ministry of Economic Affairs Printed by the cooperative 508504 A7 B7_ V. Description of the invention (10) 92 type detector 9 4 RA Μ interface 9 6 RX address converter 102 temporary register 104 incremental controller 106 counter 13 0 D Μ Α 丛 发 13 2 TCP header 13 4 IP header 14 2 Sequence 200 High priority block 2 0 2 Low priority block 203 Memory 204 Update logic 2 0 6 Note # Body 208 Traffic logic 2 10 Reference clock 2 12 Register 2 16 High priority sending treatment queue 2 18 Memory 220 Traffic logic 222 Low priority sending queue 300 Command generator 3 0 2 Temporary register This paper standard applies to China National Standard (CNS) A4 specification (210 X 297 public) Li) ------------- ------- Order -----— »IAWI (Please read the notes on the back before filling this page) -13- 508504 Printed by the Consumers’ Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7_V. Description of the invention (11) 304 comparator 306 surround counter 308 comparator 310 comparator 3 12 and gate 3 14 queue 316 command register 3 5 0 character 3 5 2 character 400 messy function 4 0 2 VPI / VCI table 420 search Processor 500 Alignment circuit 502 Matching circuit 5 0 4 Standby 506 Pattern detection controller 600 Burst data 3 10 Address 3 12 Address 3 0 0 Address 3 0 1 Address 3 0 2 Address 3 0 5 address 3 0 6 address This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling this page) --------- Order * ------- · 丨 -14- 508504 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (12) 3 0 7 Address 1 7 0 ~ 2 0 0 Address 2 0 4 Detailed description of the preferred embodiment of the address: FIG. 1 shows the general system architecture of the preferred embodiment of an interactive communication system, which supports virtually any type of interactive multimedia Applications of broadband systems. Please pay special attention to the application of instant multimedia delivery mode. A server 10 is used as a V 0 D (on-demand video) server, a KOD (on-demand accompaniment) server, and / or an Internet server, etc., and is used as STBs (set-top boxes) as customers. 18 communication on the public network 16. The server 10 includes a local asynchronous transfer mode (ATM) converter 14 and a plurality of SMUs (storage media units) 12 connected to each other through the local ATM converter 14. The main purpose of the local ATM converter 14 is to schedule the data route between SMU s 12 (such as copying a movie compressed according to the .MPEG standard from one SMU to another SMU), established in the server 10 to ATM-based LAN 'and interface with public network] _ 6. Each SMU 1 2 communicates with a local ATM converter 14 at a high speed with current technology such as 6 2 2 M bps. The public network 16 is selective, and the server 10 can directly communicate with STB s 1 8 通信。 8 communications. Figure 2 shows a detailed block diagram of the SMU 12. The SMU 12 has a storage device 20, a host 28, and a serial processor 36 as the main units. These units are converged through a peripheral component interconnect (PCI). Row (Please read the precautions on the back before filling this page) t Order ·· -line 丨 ·! This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 508504 A7 B7 V. Description of the invention ( 13) 2 4 and connected to each other. A host computer 30 and a main memory 32 in the host 28 are connected through a M IPS bus 34 in a conventional configuration; in this embodiment, the M IPS bus 34 is connected through a pc I The bridge 26 is connected to the PCI bus 24, and the host 2 8 is mainly designed to interact with users or STBs, such as VOD, KOD, and daily applications of Internet servers. The storage device 20 includes one or more rows of hard disks, which are connected via SCSI or fiber channels, and store real-time sensitive data (such as MP EG-2 encoded video strings) and the contents of data packets (such as Untitled TC P / IP (Transmission Control Protocol / Internet Protocol packet body). The serial processor 3 6 is best constructed to form a single AS IC (Special Application Integrated Circuit). The serial processor 3 6 Make real-time sensitive data and data packets into a string. The string processor 36 has a sending path 50 and a receiving path 80 (as part of k), and a PCI interface 38 and an interface 40. The sending path 50 processes the output data string from the storage device 20 and the host 28 to the local ATM converter 14. The receiving path 80 processes the input data string from the local ATM converter 14 to the storage device 20 and the host 28. The high-speed connection and independence of the transmission path and the reception path make it simultaneously 6 2 2Mpb s in both directions. The PC I interface 38 enables the PC I bus 24 to interface with the transmission path 50 and the reception path 80. The PCI interface 38 is in the transmission path. 5 0 will output data string from PCI The bus 2 4 is sent to PCI FI F052 'and the input data string is received on the receiving path. The paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling this page) t Order --------- line 丨 · Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs-16- View 504 A7 V. Description of Invention (14) Transfer from pc 1 FIF〇 9 8 to P c I Confluence Row 2 4. Interface 40 enables the sending path 50 and receiving path 80 to interface with an external physical layer device (not shown) connected to the local AT M converter 14. The interface 40 may include an interface according to UTOPI Α (Global testing and operation of the PTM Y interface for ATM) Two AT Μ interfaces of the second-level standard 'one of which is the U TOP I 8-bit wide data path mode Α interface' the other is 1 UTOP IA interface with 6-bit wide data path mode. The transmission path 50 is composed of several functional blocks that work together to implement high-speed transmission and transmission. The first block in the transmission path 50 is Tx address conversion. Device 5 4 'It puts the output data string from the PC IFIF〇52 into the configuration The host of the string buffer 4 4 in the external RAM (random access memory) 4 2 refers to the memory location. This allows the data to be “spread” into discontinuous memory in a controlled manner. The operation of RAID (Redundant Array of Affordable Disks) operation is very effective. This RAID operation ensures the integrity of the data string and TCP / IP packetization. The TC P / IP checksum block 5 6 provides hardware support to calculate the T C P / IP checksum. Its function is to calculate and maintain part of the checksum for each packet until all the data has been transmitted. The T C P / IP checksum block 5 6 and the TX address converter 5 4 work together to establish a 0? / 1? Packet directly in the string buffer 44. The D0 / IP header and the payload of the packet are placed in the string buffer 44 respectively, and the checksum of the holding part and the box 56 are passed. Once all the information, this paper size applies the Chinese National Standard (CNS) A4 specification (210 x 297 mm) !! —— it (Please read the precautions on the back before filling this page)

I! III line 丨 · Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 508504 Α7-Β7 V. Description of the invention (15) are in the string buffer 44, then the checksum is placed in the correct position of the TCP / IP header Within, and the packet is ready to be sent. The RA Μ interface 5 8 constitutes an interface between the external RA Μ 4 2 and the transmission path 50. The external RAM 4 2 may include dual-port SDRAM (Synchronous Dynamic Random Access Memory). The external RA Μ 4 2 includes several strings. The buffer 44 is used to separate the burst data communication from the magnetic disk of the storage device 20 and provide the required fixed bit rate data string to the ATM network 16. Each string buffer processes an output data string. In comparison with the input direction, since the data flow characteristics in the output direction are completely predictable (controlled), the buffer requirements can be estimated in advance. Therefore, the string buffer 4 4 is statically arranged in the external RAM 4 2 0 TX RAID or SDI (string data overall) block 60 to provide data redundancy support. The TX address converter 54 places the required data in the string buffer 4, and then when the data is output from the string buffer 44, if one of the disks in the storage device 20 is damaged, (J T XRAID block 60 0 to correct wrong data. The traffic shaper 6 2 controls the output data string from the string buffer 44 to A TM network 16 and it is designed for very accurate speed and low CDV (Unit delay variation). The traffic shaper 62 is composed of two main segments, one of which processes high-priority data (such as video traffic) and the other segment processes low-priority general data. The amount of communication. Command box 6 6 Want to remove the load of the host 2 8 which is sensitive in real time, and execute the content of the accurately known position in the outgoing data string. · -------- t (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs --------- line 丨 ----- 5 〇85〇4 A7 B7 V. Description of the invention (16) Action triggered by transmission. Segmented block 70 will The string buffer 44 provides segmentation of the output data string entering the AAL-5 PDUs (ATM Adaptation Layer-5 Protocol Data Unit), and maps the AAL-5 PDU s to the AT unit. If the output data string is MPEG —2 SPTS (Single Program Transport String), segmentation block 70 can segment two ts packets of mpeg-2 spts into one AAL-5 PDU, unless there are less than two TS packets left in MPEG-2 SPTS In the latter case, 'AAL-5 PDU corresponds to eight ATM units. In general, AAL-5 segmentation is controlled by PDU size' and the PDU size in each string is programmable The receiving path 80 has several blocks corresponding to the reverse operation of the blocks of the transmitting path 50. —V P I / \ c I (virtual path identifier / virtual channel identifier) filtering block 8 4 pairs of input A T The MU unit implements fast and efficient VP1 / VCI filtering, which is accomplished by combining clutter and linear search functions on the input in the VPι / vcI table. A reorganization block 8 6 basically implements a segmented block 7 0 Opposite Function 'Reorganize Block 8 6 Using ATM. Payload of Unit Reconstruct AAL-5 PDUs, and then map AAL-5 PDUs to the upper layer data (such as M PEG-2 SPTS, TCP / IP packets). If the input data string is sent through TCP, a TCP check that the paper size is applicable China National Standard (CNS) A4 Specification (210 x 297 mm) t (Please read the notes on the back before filling out this page) Order --------- line 丨 · Member of the Intellectual Property Bureau of the Ministry of Economic AffairsΗConsumer Cooperative Printed 508504 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (17) and check box 8 8 Check the TCP checksum in the TCP header. A pattern detector 92 allows a limited number of bit patterns to be detected in the input data string. A list is created that accurately indicates where the specified bit pattern is generated in the string. This supports certain processing tasks that can be performed quickly, otherwise they must be processed later to complete. —R X RA I D or SD I box 9 0 adds redundancy to the input data string. If a sequence of N characters is written into a buffer (not shown), the parity of the N characters is then written, and this function can be turned on / off. If the input data string will be stored in the storage device 20 'and later sent as a T C P / IP packet through the transmission path 50, then this function is turned off. The RAM interface 9 4 is an interface between the receiving path 80 and an external RAM 4 6. The external RAM 4 6 may include a dual-port SD RAM. The external RAM 4 6 is used as a string buffer for storing input data strings. ; Device 48, each string buffer 48 processing an input data string, the input data string can have unpredictable properties, for example, some data packets can be very bursty, which means that the required buffer capacity varies with Change from time to time and from time to time. Therefore, in the external RAM 46, it is best to use a dynamic buffer configuration. An R X address converter 9 6 provides the appropriate read address to the string buffer 4 8. The main blocks in the serial processor will be described in detail below. 〔TX Address Converter〕 (Please read the precautions on the back before filling this page) t Order-丨 • Line 丨-This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) -20 -508504 Α7 Β7 V. Description of the invention (18) The output data string is sent from the storage device 2 to the serial processor 3 6 on the pc 1 bus 2 4 in a burst transmission mode, and the TX address converter 5 4 of The purpose is to spread a continuous DMA cluster in the appropriate area of the string buffer 4 4. Figure 3 shows a block diagram of the TX address converter 54. Before a serial D M A burst from the storage device 20 arrives, the correct start address is written into the register 102 through the storage device controller 2 2. The contents of the register 102 are used as the write address of the string buffer 44. A counter 106 calculates the number of bits in the output data string from PC I F I F52. Each time a 32-bit data character passes the counter 106, which informs the incremental controller 104 that characters have been transferred to the string buffer 44. With each new character, the increment controller 104 adds the content of the register 102 with address-increment (ADDRESS-INCREMENT), and the address_increment is a programmable one. . If the output data string is R ID processing data, then the address-increment range is basically set according to the number of disks used in the R ID system. If the output data string is the payload of a TCP / IP packet, the address_incremental 値 is basically set according to the packetization parameters. Referring now to FIG. 4, description will be given of address conversion when the output data string is processed by R A ID. In this example, the R A I D or S D I system is composed of four disks, namely disk 0, disk 1, disk 2 and disk 3. Disk 0 contains characters 1, 4, 7, ... which will be sent to the local AT / M converter 14. Disk 1 also contains the characters 2, 5, 8 ... to be sent to the local ATM converter 1 4. Disk 2 also contains the paper size to be issued. The Chinese standard is applicable. (CNS) A4 specification (210 X 297 mm) 丨 丨 -------- 1 (Please read the precautions on the back before filling out this page) Order --- Line _ · Staff Consumption of Intellectual Property Bureau, Ministry of Economic Affairs Printed by the cooperative -21-508504 Printed by the consumer property cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (19) Send to the local AT Μ converter 1 zigzag 3, 6 '9 ... ·' magnetic disk 3 contains the parity characters 0, 1, 2 ......... for error correction. Each parity character (for example, parity 0) has been generated in the RX RAID block 90 by three characters (for example, characters 1, 2, and 3). These three characters and the parity character together form a so-called Stripe unit of the RAID. If one of the disks (for example, disk 2) is damaged, a continuous DMA burst containing parity characters is transmitted to the TX address converter 5 4. For the sake of explanation, it is assumed that the size of a continuous DMA burst is 9 6 bytes (24 characters), although the actual size can be larger than 100K bytes (depending on the hardware and / or the speed of the hardware). In this case, 'continuous DAM bursts 12 6 include characters 1, 4' 7, 10, 1 3, 1 6 from disk 0, characters 2, 5, 8, 1 1 from disk 1 , 1, 4, 17, 7, characters 3, 6, 9, 1, 12, 15, 18 from disk 2 and ~, and parity characters 0, 1, 2, 3 ', 4, 5 from disk 3 The TX address converter 54 generates the following sequence of addresses: 178, 182, 186, 190, 194, 198 (data from disk 0) 179, 183, 187, 191, 195, 199 (from disk 1) Information) 180, 184, 188, 192, 196, 200 (data from disk 2). 181, 185, 189, 193, '197, 204 (data from disk 3) Paper size Applicable to China National Standard (CNS) A4 specification (210 X 297 mm) --11 .-- I ---- I · 111 ---- Order ------- I-- 丨 (Please read first Note on the back, please fill out this page again) -22-508504 A7 B7 V. Description of the invention (20) More specifically, before the continuous BM bursts 1 2 0 reach the string buffer 4 4, a number of 1 7 8 It is stored in register 102 as the starting address. After that, the character 1 from the disk 0 is written into the address 1 78 of the string buffer 4 4. When the character 1 passes the counter 1 0 6, the increment controller 10 4 has a number corresponding to the number of disks. The number of addresses is incremented to increase the number 1 7 8 in the register 102. After that, the character 4 from the magnetic disk 0 is written into the address 1 8 2 of the string buffer 4 4. When the character 4 passes the counter 10 6, the increment controller 10 4 uses the address 4 as the address. _Zeng Tong increases the register 1 2 2 1 8 2. After that, the character 7 from the magnetic disk 0 is written to the address 1 186 of the string buffer 44. Similarly, the remaining characters 10, 13 and 16 from the disk 0 are written in the addresses 19, 19, 19 and 19 of the number of separated disks in the string buffer 44. When the character 16 from the disk 0 passes the counter 106, the increment controller 10 4 increments the address _19 of the register 1 102 by incrementing the address_increment of 値. After that, the character 2 from the magnetic disk 1 is written into the address 179 of the string buffer 44. When the character 2 passes the counter 106, the increment controller 104 increments the address 179 in register 1 102 by incrementing the address_increment of 4. After that, the character 5 from the magnetic disk 1 is written into the address 1 8 3 of the Omai Chongyi 4 4. When the sub-frame 5 passes through the decimal number 10 6, the increment controller 10 4 increments the address 1 8 3 in the register 1 2 with the address_increment of 4. After that, the character 8 from the disk 1 is written to the address 1 8 7 of the string buffer 44. Similarly, the remaining characters from disk 1 are written to the address of the number of separated disks in the string buffer 4 4 .. This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm)- --------- t (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economy I tmt- fmmmm m I— 'VI emmmmm iiflf I ϋ an am UK ii tmmt an n I nn —in -23- 508504 A7 _______ B7 V. Description of the invention (21) 191, 195, 199. In this way, characters from disks 2 and 3 are written to the appropriate addresses in the string buffer 44. The characters written in the string buffer 44 are read linearly and provided to the TX R A I D block 60 to correct the error. When the output data string from the storage device 20 is a TCP / IP payload, the address converter 54 and the TCP check and calculation block work together to support TCP / IP packet generation. The host 28 pre-programs the Tx address converter 54 so that the data is allocated according to the specified packet size. First, the host 28 needs to know all the packetization parameters. The parameters that are important for this operation are TCP payload size, TCP header size, IP header size, and IP payload size. TCP headers and IP headers are basically useful. Space for selective data, but it is not actually used. Therefore, simplification can be introduced by assuming an internal size for the title: the T C P title size is 5 characters (\ 0 bytes), and the IP title size is 5 characters (20 bytes). This organization is explained below. The host 2 8 performs part of the inspection and calculation of the false title of the T C P / IP header, and then uses this to initialize the T C P inspection and the T C P inspection and register 5 7 in the block 56. The space used for the string buffer 44 will be reserved in the external RAM 42 to match all TCP packets plus the additional bits of the TCP and IP headers. After that, the host 28 will instruct TX address conversion. The paper size of the paper in the printer 5 4 is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -------- t (Please read the precautions on the back before filling this page) Order i Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs -24-508504 A7 B7 V. Description of the invention (22) The quantity controller 104 TCP payload size, TCP header size, IP header size and IP payload size. After that, the TCP payload can be sent out on the PCI bus 2 4 as a continuous DMA burst, and placed in the area in the string buffer 4 4 reserved for him by the TX address converter. And leave space for the title. As he walks from the P C I bus 24 to the string buffer 44, the check and calculation block 5 6 updates the check sum of the part of the T C P check and register 5 7. Please note that with this method, the payload (usually representing a large part of the TCP / IP packet) does not need to be copied from the storage device 20 to the main memory 3 2 for him and then to the string buffer 44. This saves valuable bus bandwidth and additional characters for the main C P U 3 0. After the payload has been written, the header information prepared by the host 28 is sent to the string buffer 44 through the address compiler 54. As is the case with the payload, the TX address converter 5 4 places the title in the previously reserved memory location. This sequence can be retained, so that the header information is written first and then the payload. In any case, when the header and payload have been written, the TCP checksum will be completely and automatically copied to the correct location. . This mechanism can also be used to effectively support the segmentation of a TCP packet into multiple smaller IP packets, in which case space is reserved for each IP packet. The TCP packet information (title + payload) is divided into these packets, and the header of each IP packet is written by the host 28. Except for the last block, all IP packets have the same size. The size of the last block may be different from the size of other blocks. Paper size applies to China National Standard (CNS) A4 (210 X 297 mm) --- ---------- Meal (Please read the notes on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs I nnnnn · ϋ n I nnnnn an It n -ϋ ϋ n Hi If n ϋ t— · ϋ nnnnn _ -25- 508504 A7 B7 V. Description of the invention (23) inch, the address converter 5 4 takes this into consideration. After the complete TCP / IP packet has been formed, the preparation for transmission has been completed. 5A, 5B, and 5C show examples of address translation for TCP / IP packetization. In this case, before the TCP / IP payload sent as a continuous DMA burst 1 30 reaches the string buffer 44 , A number 値 3 1 〇 is stored in the temporary register 1 02 as the initial write address, after that, the first character of the first data is written to the address 3 1 of the string buffer 4 4 0 in. When the first character of the first data passes the counter 106, the increment controller 1 0 increments the address_increment of 1 to 値 3 1 0 in the register 1 Q 2. After that, the second character of the first data is written into the address 3 1 1 of the string buffer 44. When the second character of the first data passes the counter 106, the increment controller 104 increments the address_increment of 値 to 1 to increase 値 3 1 1 in the register 1 02. After that, the third character of the 'first data' is written to the address 3 1 2 of the string buffer 4 4. The increment of address_increment 値 is repeated many times, which corresponds to the IP payload. size. Therefore, the first data of the T C P / IP payload is written into an appropriate area. After that, the increment controller 10 4 値 corresponds to the address of the IP title size_increment to increase the content of the register 102. After that, the second data starts to be written, starting from the address based on the contents of the register 102. Therefore, the address converter 54 generates a write address for the payload, leaving space for the title. The last data size may have a different size from the other data. The size of the last data is calculated in the incremental controller 104 using the following expression: This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) ---------- t (Please read the notes on the back before filling out this page) Order -------- Line 丨-Staff of Intellectual Property Bureau, Ministry of Economic Affairs Printed by Consumer Cooperatives -26- 508504

Description of the invention (24) The last data size. = TCP payload mod IP payload size. Therefore, the control of the number of increments is considered in the last data size A. In this way, the payload sent as a continuous DM A burst is scattered in the shaded area in the string buffer 44 (see Figure 5). Then, when the TCP header 1 3 2 is sent out as a continuous burst on the PCI bus 24, the address converter 5 4 generates a TC p header in the string buffer 4 4 corresponding to the previously reserved one. The write address of the memory location. More specifically, before the TCP header sent as a continuous cluster reaches the string buffer 44, a number 値 3 0 5 is set as the initial write address in the register 1 02. After that, the first character of the TCP header is written to the address 3 05 of the string buffer 44. When the first character of the TC P title passes through the counter 1 0 6, the increment controller 1 0 4 uses 値 as the address _ increment to make 値 3 0 5 in the register 1 0 2 increase. After that, the second character of the TCP header is written to the address 3306 of the string buffer 44. When the second character of the TCP header passes the counter 106, the increment controller 104 increments the address 306 in the register 102 with an address of 1 as increment. After that, the third character of the TCP header is written to the address 3 0 7 of the string buffer 44. The address-increment 値 increment is repeated many times, which corresponds to the TC p header size. Therefore, the TCP / IP title is written in the shaded area of the string buffer 44 shown in Fig. 5B. --------- t (Please read the notes on the back before filling this page) Order i Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Employee Cooperatives This paper is printed in accordance with Chinese national standards (CNaA4 GW X a97) ) -27- 508504 A7 B7 V. Description of the invention (25) Next, when the IP header 1 3 4 is sent as a continuous burst and sent on the PC 1 bus 2 4, the address converter 5 4 is the IP header and An address corresponding to a previously reserved memory location is generated in the string buffer 44. More specifically, before being sent as a continuous burst of 1 3 4. The IP header reaches the string buffer 4 4, a number of 3 0 0 is set as the initial write in the register 1 2 After entering the address, the first character of the first IP header is written into the address 300 of the string buffer 44. When the first character of the first IP header passes the counter 106, the increment controller 104 increments the address_increment of 値 to increase 値 3 0 0 in the register 1 〇2 . After that, the second character of the first IP header is written to the address 3 01 of the string buffer 44. When the second character of the first IP header passes the counter 106, the increment controller 1 0 increments the address _ by 1 to increment 値 3 0 1 in the register 1 0 2 the amount. After that, the three k characters of the first IP header are written into the address 3 0 2 of the string buffer 44, and the increment of address_increment 値 is 1 is repeated multiple times corresponding to the IP header size. After that, the increment controller 104 increments the content of the temporary register 102 by its address_increment, which corresponds to the TCP header size plus the IP payload size. After that, the second IP title is written according to the content address of the register 102. Therefore, the IP title is written in the shaded area of the string buffer 44 shown in Fig. 5C. Then, the TCP checksum completed by the TCP checksum block 56 is copied to the correct location. This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)-------- t (Please read the notes on the back before filling this page) Intellectual Property Bureau, Ministry of Economic Affairs, Consumer Consumption Cooperative Printing and making ------ I -------------- -28-508504 A7 B7 ___ V. Description of the invention (26) In this way, TCP / IP packetization is completed 'and can Read out from the string buffer 44 in a linear manner. In the above embodiment, TCP / IP packetization is mentioned. However, it is also possible to use UDP (User Data Packet Protocol) instead of TCP. In this case, the UDP header is set to 2 characters (8 bytes). ) 〇 In addition, in the above-mentioned embodiment, 'τ CP header and IP header are sent to the τ X address converter 5 4 from the host 28 as different bursts. However, it is possible to send TCP headers and IP headers. Together, it is sent as a continuous burst from the host 2 8 to the TX address converter 54. [TX X RAID or SDI Block] Parity characters can be inserted in the character sequence of the string buffer 44. This redundancy provides a mechanism for correcting errors. T X R A I D or 5 D I block 60 contains a sequence of N + 1 characters whose last character is the parity of the N first characters. Right, it is indicated by hardware and / or software that the character m is wrong. For example, due to a damaged disk, the parity character is retrieved from the storage device 20 and used to reconstruct the character M. For example, in the case of FIG. 4, the characters 3'6, 9, 12, 15, 18 (in the input data 142) from the damaged disk 2 include the error shown in FIG. 6, and the Tx RAID block 60 uses characters 1 '2 and parity character 0 to reconstruct character 3, T XRA .1 D block 60 0 uses character 4, 5 and parity character 1 to reconstruct character 6. Similarly, Tx RAID box 60 rebuilds 3 characters 9, 12'15 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) ------------ Φ (Please read the back first Note: Please fill in this page again.) Tr ------—. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economics -29 , 18. Therefore, the Tx RAID block 60 performs error correction and outputs the sequence 142 of characters 1, 2, 3, 4 without error. The RA I D function can be turned on / off by command box 66. [Traffic Shaper] The traffic shaper 62 is composed of two main blocks, one of which deals with high-priority data, such as video traffic, and the low-priority sector deals with general data traffic. High priority block segments are organized into several traffic types, one of which is a group of one or more strings with the same bit rate characteristics. For example, all strings with a CBR (fixed bit rate) of 2Mpb s belong to the same type. The type of the variable bit rate (V B R) type typically includes only one string, because it is impossible for two variable bit rate strings to have the same bandwidth pattern at all times. Each type has a single set of transmission parameters to control bit rate, provide low unit delay variation (CDV), and precise speed. The number of types is programmable, but limited to a maximum of 1 2 8. There are two main transmission parameters for each type, one is the ideal scheduling time (TS) and one is the delta (Δ) of the scheduling time (TS). The basic mechanism is that when TS is equal to or less than the reference clock, a series of indicators are placed in the transmission queue. At the same time, the 値 TS increases by 値 △ and the transmission queue is a first-in-first-out queue. The string indicated by the string index is presented to ATM fif 7 2. In the high-priority segment, the following organizations achieve high accuracy bit rates and low CDV. This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) • I ί III nnnnn I · nn I— nnnn sip, fl nn an (Please read the precautions on the back before filling this page) Line 丨· -30- 508504 Α7 Β7 V. Description of the invention (28). — Lit (Please read the notes on the back before filling this page) Due to the limited resolution of the reference clock, a single △ 値 usually cannot give the required accuracy . To achieve the required accuracy, two Δ 値 are used alternately, and the two 値 値 produce rates slightly above and slightly below the required bit rate. Each Δ 各个 of a different number of cells is used to compensate for the limited clock resolution and can provide arbitrary accuracy. △ Η and △ L (where △ L = △ Η + 1) substitute two different increments 値. N Η and N L parameters represent the number of units, and their corresponding increments are alternately valid. By this mechanism, the string is modulated, whereby the 'average bit rate approaches the required bit rate within the required accuracy. Figure 7 shows the bit rate achieved by this mechanism. In FIG. 7, the NΗ unit is sent out as ΔΗ, and the NU unit is sent out as / ^. This sequence is repeated periodically. Therefore, the average bit rate indicated by the dotted line is maintained as a long-term bit rate. Printed by the Intellectual Property Bureau's Consumer Cooperatives of the Ministry of Economic Affairs, the achievement of a low CDV is achieved by reducing collisions within a specified period of units from different strings. In many existing traffic shaping mechanisms, the main reason for collisions is that strings with the same bit rate are scheduled at the same time. This problem is particularly serious when the number of strings is large and the number of independent bit rates is small. In the preferred embodiment, the previous problem is emphasized by uniformly spacing the cells belonging to strings of the same type. In other words, if the increment of a string should be △, then the increment of this type is A / η, where η is the number of strings of this type. Every time a certain type is to be served, the data is taken from a continuous string. For example, if the unit of string 0 belonging to type 0 should increase △, each unit belonging to a string of the same type 0 (that is, string 0 to string η — 1) is sent out with an interval of Δ / η 'as shown in Figure 8 As shown. With the combination of the above organizations, the precise bit rate and the paper size can be applied to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -31-Printed by the Intellectual Property Bureau, Ministry of Economic Affairs, Consumer Consumption Cooperative 508504 Α7 _____________ Β7 V. Description of the invention (29) Low CD v. If the transmission queue is not blocked, the transmission mode of these units is as shown in FIG. 9. The high priority sector also handles V B R traffic. The traffic shaper 6 2 supports the smooth update of the transmission parameters. This update can be performed by the host 2 8 or by the command block 6 6. The command block 6 6 is programmed by the host 2 8 and its action is triggered when an exact position is sent from the string buffer 4 4. One such action is to replace the transmission parameters for a specified string in one of the traffic shapers 62. Once the data is sent just before the bit rate is changed, command block 6 6 immediately updates the parameters. Once it is ready, this program is autonomous and does not require any interaction with the host CP30. As a result, the host 2 8 does not need to interact exactly when it should be required to interact. In this way, the real-time characteristics of the string are maintained and the host load is kept to a minimum. Low priority block segments are organized into, for example, fixed 32 traffic types, where one type is a group of one or more strings with the same P CR (Spike Cell Rate). In terms of general data traffic, real-time limits are very insignificant. The main purpose of traffic shaping in the low-priority sector is to limit PCR in order to avoid network consolidation. The traffic shaping of the data packet is implemented by using an ideal schedule time (TS) and an increment (△) of TS, which is similar to the basic flux β-shaping mechanism in the high-priority sector. However, the priority of the data packet scheduling is lower than that of the instant communication. Only when the transmission queue of the high-priority segment is empty, the string of / data packets can be sent to AT M F I F07. This mechanism is implemented with a structure as shown in Figure 10. The paper size for communication is adapted to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) m In nm I— -1 ·· — ϋ al tmaMm emmmmm mmmmmmm Is · nmn ϋ is n an I m fn n * (Please read the precautions on the back before filling out this page) • Wire 丨 ·! -32- 508504 A7 B7 V. Description of the invention (30) Device 6 2 includes the previous The high-priority segment 200 and the low-priority segment 200 are described. In the high-priority sector 2 0 0, a memory 2 0 3 stores a set of new transmission parameters provided by the host 28 for each level. The new transmission parameters of each group include T s 1, △ H i , ΔL i, NH i, NL i, and P t 1 (where si 27). In this embodiment, P t i includes one or more string indicators, which indicate that one or more strings appended to type i 'memory 2 0 6 stores the current transmission parameters. When the host 2 8 or the command block 6 6 indicates a command, an update logic 2 0 4 is triggered by the command, thereby updating the current transmission parameters in the memory 2 6 to the new transmission in the memory 2 3 parameter. The register 2 1 2 stores a parameter Nr_classes showing the number of types of the host 2 8 from its receiving place, and the traffic logic 2 0 8 for each type (from 0 to N ^ classesj) checks whether TS 1 is equal to or less than by reference The current time indicated by the clock 2 10. If yes', the string index attached to the first string after this k-type 1 is inserted into a high priority transmission queue 2 1 6 and the traffic shaper 2 0 8 increases the TSi in the memory 206 by this Type AHi or · This △ η 1 or △ L 1 is rotated in accordance with N η i or NL i. After that, the segmented block 70 receives a string of indicators from the high priority send queue 2 1 6 and will be changed by The ATM cell of the string indicated by the string index is placed in the ATM FIFO 72. In the low priority sector 202, the memory 2 1 8 stores a set of transmission parameters provided from the host 2 8 for each level. In this embodiment, each group of transmission parameters includes TS j, △ j, and P tj (where 0 this paper size applies to the Chinese national standard (CNS> A4 specification (210 X 297 mm)) (please read the note on the back first) Please fill in this page again for the order) Order -------- • Line-Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economics-33- 508504 A7 B7 V. Description of the invention (31) ^ J ^ 3 1). P t 1 includes one or more string indicators, which indicate one or more strings appended to type j, and communication logic 2 2 0 for each level (from 0 to 3 1) to check whether TS j is equal to or less than the reference clock Indicates the current time 'and monitors whether the high priority sending queue 2 1 6 is empty. If so, the string index attached to the first string after this type j is inserted into the low priority sending queue 2 2 2 Among them, and the traffic logic 2 2 0 increases the TS j of the memory 2 1 8 by △ j of this type j. After that, the segmented block 7 0 receives the low-priority send queue 2 2 2 string index, and The ATM unit belonging to the stream indicated by the string indicator is placed in the ATM FIF 〇2. In the above embodiment, the A traffic shaping mechanism similar to the mechanism of the high priority sector 2 0 0 is applied to the low priority sector 2 0. However, the traditional leaky bucket mechanism is applied to the low priority sector 2 0 The traffic shaping mechanism of 2. [Order Box] This paper size applies to the Chinese national standard Gui Na m 0χ π public guide (please read the note on the back? Matters before filling out this page) a. Δ, ν * nnn Is nm I fnn 1_ I nnmn HB flu I n an n HI If mnn is determined by the number of fingers in the number ... Refer to, Xu Neutral Mobility has a string of mutual responsibility and a bit of material. At the time of the investment, the 6 complete match list is listed and the 6 modulating table loses the certificate holders to be taken quietly. The insurer needs to be procured. It will take 6 orders to be issued forever. It is enough to describe the middle block and the energy resources involved in the bidding party are not mutually exclusive if the order can be ordered. Some of the losers will be sent to the party. The losers must be accounted for. 4 and It is expected that 8 punches and 4 ticks will be required to make more promises. 2 slow-moving middle-machine strings will be rushed immediately. 8 cases will be slow and timely. 8 Set the main good, shown by 2 is located in the original. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economics and Economics 508504 A7 B7 V. Description of the invention (32) Instructions are loaded. The appropriate time is to load the output data string into the string buffer The time between the time of 4 4 and the time when the output data string is sent from the string buffer 44. Command block 6 6 scans the read indicator of string buffer 4 4. If it finds a match with a specified address, the command linked to that address will be executed, and the command will be executed from command block 6 6. except. The command block 66 triggers the address of the data leaving the string buffer 44. When a string buffer 4 4 is read, the read index is gradually increased in a wraparound process. Each string has a 'link list' which includes (address, command) pairs to be stored according to the address', and a bit is a pair (L'M) representing the address in the file, and has nothing to do with the physical address . L is the number of blocks, the block size of which is equal to the size of the string buffer 44, and M is the sequence number of the last block. Each string holds a W AC (wrapping counter), which counts the number of times the read indicator has been wrapped. If the following relationship holds, then an address match is found:

It (Please read the notes on the back before filling this page)

Μ and C AW II L deflector offset buffer I Marking line 丨 · Printed by the Consumer Consumption Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. Count the number of block formulas that include 6 and 6 to order this command. Figure ο 6 blocks of order and order 6 each suitable ο 8 3 2 machines to produce the main production, order each order of command and order Each column of the order of the material load order will lose ο ο ο ο ο ο ο ο ο ο 3 engraving time when the production time is stored in the storage 6 6 serial buffers and slow storage partial storage 2 red ο 3 -The device stores 2 temporary ο, 3 medium ο ο stored ο temp 3 will produce 4 orders ο produce 3 orders to make life less than the order of life, China Mobile's paper standards apply Chinese National Standard (CNS) A4 specifications (210 X 297 mm) -35- ⑽504. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the Invention (33) The reading index in the punch 4 4 is compared. When a wraparound occurs, the read pointer gets the buffer offset. Therefore, when the comparator 3 0 4 detects a match, the 'W A C (surround counter) 3 0 6 is incremented. Comparator 3 0 8 compares the count of Wa C 3 0 6 with the current L 値 provided from command register 3 1 6 and comparator 3 1 0 will provide the current value from command register 3 1 6 Μ 値 is compared with the read index-buffer offset. When the comparators 308 and 3 1 0 detect a match, the AND gate 3 1 2 dequeues the current command stored by a queue 3 1 4. Each time a current command corresponding to a current address (L, M) is output from the queue 3 1 4 and a command corresponding to the next address is queued into the queue 3 1 6 4 in. Therefore, each command generator 300 instructs the command according to the read index of the string buffer 44. The commands that will not be referred to from command block 6 6 are: Change the bit rate: This command will allow the string bandwidth to be changed. When this port password is instructed to keep watch, the traffic shaper 6 2 will remove a string from its destination. In the type, Δ 値 of the current type is updated, the string is appended to the new type, and Δ 値 of the link of the new type is updated. Therefore, the bit rate of an individual string is changed at a specified string position, which is useful, for example, for a MPEG bit string at V B R (variable bit rate). Insert RC I: This command allows an RCI (Rate Change Indicator) to be inserted at the specified position in the string. The RCI can notify remote terminals (such as S T B 1 8) that the rate has changed at that time and help the clock of the MPEG decoder. recovery. In European Patent Application No. 'EP 0 712 250 Α2, the details of the RCI are that the paper size applies to the Chinese National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling out this page ) '· Mmmme · ϋ 1 * ϋ— ί MmaMmm ί. * I «Β1 ·« n Mmmmmmm 0 -30-508504 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (34) The statement is described as , 'Data rate data'. When this command is instructed, 'R c I. Generator 6 8 generates RC I' and segmentation block 7 0 ends the current segmentation, and generates a separate AAL for RC 1-5 p D u (one atm unit) 'This is useful for VBR2MPEG bit strings. Enable R A I D: This command sets the appropriate parameters in the T X ra I D block 6 for error correction. Disable r A I D: This function is the opposite function of enabling R A I D above. Perform byte exchange: This command allows to deal with small endian / large endian problems between server 10 and ST B 18. When this command is instructed, the byte swapper 64 rearranges the bytes within one character 3 50 in the output string in the order of one character 3 5 2 'as shown in FIG. 12. Enable different > D U size: TCP can require segmentation, a TCP packet is divided into different IP packets. The last IP packet usually requires an AAL-5 PDU size that is different from the previous one. When this command is instructed, the segmentation block 70 changes the A A L-5 PDU size. Interrupt C P U: This is the most common function. When a certain position in the string is detected, it requires the main C P U 30 to interact. [VPI / VCI filter block] Figure 1 3 shows that the paper size used in UNI (User Network Interface) applies to China National Standard (CNS) A4 (210 X 297 mm) ~ -37-- ------ ti — (Please read the notes on the back before filling out this page) Order --------- line 丨 508508 Α7 Β7 V. Description of the invention (35) Format of an AT Μ unit . A A τ M unit is composed of 53 bytes. The first 5 bytes form the A τ M title, while the remaining 48 bytes carry the meter, the first four of the a T Μ title. The bits are called GFC (Total Flow Control). The next 24 bits in the ATM header are called VP I / VC I. In fact, 'VP i / vc I includes 8-bit VP I and 16-bit VC I. The last three bits in the ATM header are called PT (payload type), and the latter are in the A TM header. 1 bit is called CL P (Unit Loss Priority), the last 8 bits in a TM title are called Η EC (Title Error Control), VP I / VC I filter block 84 from ATM FIF 〇82 retrieves this AT unit. The V P I / VCI filter block 8 4 determines whether the VP I / VC I of the received A TM unit is a member of the group νρ 1 / VC IS that should be accepted, determines which string the ATM unit should belong to, and filters. AM (operation, management, and maintenance) f 5 units. To achieve this filtering procedure, a VPI / VC I conversion from V ρ I / V C I to the internal string I d is implemented in the VP I / V C I converter 85 of the VP I / VC I filtering block 84. The purpose of the V Pl / V C I conversion mechanism is to make the range of legal V Pl / V C I as wide as possible 'while assisting in rapid conversion. Preferably, all V P I / V c I should be recognized. ν Ρ I / V C I conversion can be accomplished using traditional two-bit search techniques. However, due to time constraints, the maximum acceptable search is a level of 512 binary search. On the other hand, the most important paper size of the functioning VP Ⅰ / VC I is applicable to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) Φ Intellectual Property Printed by the Bureau's Consumer Cooperatives -M nimm K · — mmmmmmm i I n- mn -nn 1 «ϋ m -38-508504 A7 _— B7 V. Description of the invention (36) The large number should be greater than 5 1 2 for support A large number of users communicate at the same time. To meet this purpose, the V P I / V C I table is divided into 5 1 2 entry sections. Each entry represents a relationship between V P I / V C I, and an internal string ID is entered into a section as a distribution mechanism ID, and in each section, the entries are arranged. When an A T MU unit is received, once a correct segment has been found, a binary search can be performed on the segment to find the correct entry. Therefore, the distribution mechanism that allocates V Pl / V C I s must allow immediate indexing into a sector based on V P I / V C I. Moreover, in order to use the V Pl / V C I table efficiently, this mechanism must allow a wide distribution of V Pl / V C I s. In other words, this mechanism must make all entries as randomly distributed as possible across the entire V P I / V C I table. If a V Pl / VCI corresponds to a section of the V Pl / VCI table that is completely full, he must reject it, even though there may be room in other sections. A distribution mechanism that meets these requirements consists in simply using ν The lower X bit of c I (where X is an integer; for example, 3) 'is used as a hash key for indexing into the VP I / VCI table. When there is a large number of ν ρ / V C s, the lower bits will be the most random ′ in the field of ν Pl / V C I and it allows for uniform distribution. This is reasonable. The organization using this model 'can meet the requirements of quick reference and no illegal or unacceptable V Pl / ν c 1' The implementation of this organization is as follows: · Circle 14 display ^? 1 / ^ (: 1 converter 8 5 Block diagram. When a new virtual path / virtual channel 7 P / VC becomes effective, _ this paper size applies + National National Standard (CNS) A4 specification (MO X 297 public love)----- ---- t (Please read the precautions on the back before filling this page)! i I 1 line 丨 · Printed by the Employee Consumption Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs-39- Printed by the Employee Consumption Cooperative of the Intellectual Property Bureau of the Ministry of Economy 508504 A7 B7 V. Description of the invention (37) The new entry of the new vp / vc VP i / VC 1 and the internal string ID corresponding to the VPI / VCI is entered through a messy function 4 0 0 The segment of the lower three bits (ie, the 7th, 6'-5th bits of the 4th byte in Figure 13). More specifically, if the lower 3 bits of VC I are 〇〇〇 'then the entry is stored in the VPI / VCI table 402 in section 1. If the lower 3 bits of the VCI is 〇01, then the entry is stored in the VP I / VC I table In section 2 in 4 0 .. If the lower 3 bits of VC I are 0 1 0, the entry is stored in section 3 in VP I / VC I table 4 02. Similarly All new entries are stored in the appropriate sector according to the lower 3 bits of VC I. So 'for example VP I / VC I table with 4 0 9 6 entries 40 2 is divided into for example 5 1 of the 8 sections of the 2 entrances (Section 1 to Section 8) 'In each section, the entrances are rearranged in ascending or descending order in order to perform a binary search. At the reception of the AT MU unit, all The received V Pl / VCI of the AT Μ unit is provided to a search processor 4 2 0 and a scramble function 400. The scramble function 400 provides a sector index to the lower 3 bits of the VP I / VC I The search processor 4 2 0. After that, the search processor 4 2 0 performs a binary search on the section corresponding to the section index in order to find the correct entry. For example, if the VC of the received ATM unit is The lower three bits of I are 〇〇 〇, the chaotic function 4 00 provides 3 as the sector index for the search processor 4 2 0. After that, the search processor 4 2 0 for sector 3 Perform a two-digit search to find the correct entry 'and output the internal string ID of the found entry. If the paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (please read the back first) Please note this page before filling in this page) «· 1 n 11 l_i nni J ， a an aKm lm & ii 1 1— e I nn--40-508504 Α7 Β7 V. Description of the invention (38) of the AT Μ unit received The lower 3 bits of the VCI are 1 1 1 and the scramble function 4 0 0 provides 8 as the sector index for the search processor 4 2 0. After that, the search processor 420 performs a two-bit search on section 8 in order to find the correct entry, and outputs the internal string 1 D of the found entry, and the output internal string I D is used by the filtering program. In the above embodiment, the lower three bits of the V P I / V C I column are simply used as the sector index. However, more complex messy functions can be used for the V P I / V C I columns to generate sector indexes. In the above embodiment, when a new V P / V C becomes effective, the new entry enters the appropriate section through the mess function 4 0 0. However, it is possible to create a new VP i / v CI table including a new entry in the host 28 having the same chaotic function as the mechanism of the chaotic function 4 0 0, and transfer the new V P I / VCI table to v The p I / VCI converter 85 is updated with the new VP I / VC I table VP I / VC I table 4 02. '[Pattern Detector] The host 2 8 knows what kind of data is coming in the specified V C' The host 2 8 indicates to each V C what type the pattern detector 9 2 will scan. The purpose of the pattern detector 92 is to detect a preset bit pattern in the input data string. Each time a match is detected, the pattern detector 92 notifies the host 2 8 and the data is detected. When the host 28 receives the detected information, he adds the address of its occurrence to a list in the main body 302. Since the detection itself is done automatically, the host 2 8 can apply the Chinese National Standard (CNS) A4 specification (210 X 297 mm) at this time. --------- 1 (Please read first Note on the back, please fill out this page again) Order --- LINE 丨 Φ Printed by the Consumers' Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs-41-508504 A7 B7 V. Description of Invention (39) Perform other work. If the preset bit pattern is detected, only the host 2 8 needs to be interrupted and actions can be taken. Figure 15 shows a block diagram of the pattern detector 92. Before the input data string is transmitted via the receiving path 80, the host 2 8 indicates to each V C the pattern detection controller 5 6 to scan the pattern. The pattern detection controller 506 can set a pre-programmed bit pattern of 4 32 bits wide in the register 504 for each string. The alignment circuit 5 0 0 performs byte alignment of the input data. The matching circuit 502 performs byte-alignment matching on each string with 4 pre-programmed bit patterns. Each time a match is detected, the matching circuit 50 2 notifies the controller 5 0 6 of the detection result. An example of the purpose of the pattern detector 92 is to find the position of the I-picture in the video bit string compressed according to the MPEG standard. In the MPEG bit string, the position immediately following the GOP header Images are always I-images. Therefore, it is possible to detect the group-start-code (32 bits ^) of the beginning of the G 0 P title and the image-start-code (32 bits) to confirm the beginning of the image title. Find I — the location of the image. For example, when the MP EG bit string of a movie is transmitted from another SMU 12 to copy the movie, the group-start-one code and the picture-start-code system are set in the register 504 as the pre- Set the bit pattern. The pattern detector 92 detects the group-start-code and the image-start-one-code in the received MPG bit string. Every time when the group-start-code is detected in the matching circuit 5 02, the image-start-code is detected immediately, and the pattern detection controller 5 0 6 notifies the master of the detection status. CPU30. The main CPU 30 will store the storage device 20 (I — the image storage rate is in accordance with the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (please read the precautions on the back before filling in this page) • t order ---- economy Printed by the Ministry of Intellectual Property Bureau's Consumer Cooperatives-42-508504 A7 B7 5. The address of the invention description (40) is added to the ~~ list of the main memory 32. Therefore, during the MPEE bit stream into the receiving path 80, a table showing the position of the I-picture is created. When the stored M PEG bit string is transmitted to S T B 1 8, this list is used for VCR operation 'If S T B 1 8 requests VCR operation (eg fast forward, fast rewind)' then host 2 8 Referring to this list, and instructing the storage device controller 22 to access and retrieve the image. With this feature, the data stored in the storage device 20 is, original, or is not specified as an application and is formatted as' This increases the `` application independence '' of the server system 10 (Figure 1) and Ability to interact. [RX address converter] The purpose of RX address converter 9 6 is to gather the same (non-connected) characters from a series of buffers 4 6 and to create a burst of data to PCI bus 2 4, which ~ Basically, it is the opposite function of the TX address converter 54 address conversion function. The difference is that in this case, the dynamic buffer structure must be considered. The burst data is transmitted to the storage device 20 through the PCI bus. Host 2 8. FIG. 16 shows an example of address conversion applied to the input data string to be stored in the storage device 20 of the disk 0, 1, 2, 3. In this example, the following is used for the string buffer 4 8 The sequence of the read address is generated by the RX address converter 96, in order to create a batch of data 6 00 178, 182, 13, 17, 1099, 1103. This paper standard applies Chinese National Standard (CNS) A4 size (210 X 297 mm) * -43- ---------- t (Please read the notes on the back before filling out this page) The Intellectual Property Bureau of the Ministry of Economic Affairs ’s Consumer Cooperative Cooperative Office d ^ -r ^ JI nn ι ϋ n I ϋ I dnn ϋ ninnn I ϋ nn I nn

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Claims (1)

508504 A8 B8 C8 D8 6. Scope of patent application (please read the notes on the back before filling this page) 1 · A virtual path identification code / virtual channel identification code (VPI) for an asynchronous transfer mode (ATM) unit / VCI) method for converting to an internal identification code (ID), which includes the following steps: According to each virtual path identification code / virtual channel identification code, enter 1 = 3 @ > The entry is assigned to > and the section in the column; receives an asynchronous transmission mode unit; selects an area to be searched based on the received virtual path identifier / virtual channel identifier of the asynchronous transmission mode unit Segment; performing a search on the selected segment to find a virtual path ID / virtual channel ID entry corresponding to the received asynchronous transmission mode unit; and outputting an internal ID corresponding to the found entry. 2. The method according to item 1 of the patent application range, wherein the part includes the lower X bits of the virtual channel identification code '. 3. The method according to item 1 of the scope of patent application, wherein the entries are sequentially stored in each section, and the search is a two-digit search. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 4 · A device for converting a virtual path ID / virtual channel ID of an asynchronous transmission mode unit into an internal identification, including: a table storing a virtual path ID / Virtual channel ID entry and is divided into sections; a mechanism that assigns the virtual path ID / virtual channel ID entry to a section in the table according to a portion of each virtual path ID / virtual channel ID entry ^ -45- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 508504 Printed by the Intellectual Property Bureau Employee Consumer Cooperative of the Ministry of Economic Affairs Α8 Β8 C8 D8 The device of the virtual path ID / virtual channel ID of the transmission mode unit to select a section to be searched; and performing a search on the selected section to find a non-M-step transmission mode unit corresponding to the received The entry and output of the virtual path ID / virtual channel ID correspond to the entry found Identification code means. 5. The device according to item 4 of the patent application scope, wherein the part includes the lower X bits of the virtual channel identification code. 6. The device according to item 4 of the scope of patent application, wherein the entries are sequentially stored in each section, and the search is a two-digit search. 7-A device for sending data to and receiving data from an asynchronous transfer mode network, including (a)-a bus interface for communicating with a host, a storage A bus between the device and the device supports communication interface; (b) —Asynchronous transmission mode interface 'used to interface with asynchronous transmission mode network; (c) A sending unit'used to output data from The bus interface is transmitted to the asynchronous transmission mode interface, and the sending unit includes: (1) a first read-only memory (RAM) interface, which is used to interface with the RA M, which is used to temporarily store the data from the bus interface; Buffer for output data; (2) a mechanism for segmenting the output data from the buffer into an output asynchronous transmission mode unit; and (3)-the traffic shaper 'cooperates with the segmentation mechanism' Laikong (Please read the notes on the back before filling this page) # Order --------- line 丨 A paper size applies to China National Standard (CNS) A4 (210 X 297 mm) -46 -508504 A8 B8 C8 D8 The output of the asynchronous transmission mode from the system to the asynchronous transmission interface; and (d) — a receiving unit for transmitting input data from the asynchronous transmission mode interface to the bus interface. The receiving unit includes: ( 1) a mechanism for filtering the virtual path identifier / virtual channel identifier of the input asynchronous transmission mode unit, (2) a mechanism for reorganizing the input data by using the payload of the input asynchronous transmission mode unit; and (3) ) — A second RAM interface for interfacing with the ram, which is used to temporarily store the input data buffer of the reorganization mechanism. 8 · The device according to item 7 of the scope of patent application, wherein the sending unit includes a command block for storing at least a pair of addresses and commands, and the addresses and the commands are loaded from the host and detected between The address specified by the readout index of the address buffer is a match. When a match is detected, the command is executed. ~ 9. The device according to item 8 of the patent application range, wherein the traffic regulator changes the beam bandwidth of the asynchronous transmission mode unit output according to the command. 1 0. The device as claimed in claim 8 wherein the sending unit includes inserting a rate change indicator into the output data read from the buffer according to the command. 11. The device according to item 8 of the scope of patent application, wherein the four commands cause the host to be interrupted. 1 2 · If the paper size of the item in the scope of the patent application is 8, 9, 10, or 11 is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 public love) -47- " " " " (Please read the precautions on the back before filling out this page)-# -----—— tr --------- hand ▲ Printed by the Employee Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 508504 A8 B8 C8 D8 2. The scope of the patent application is set in which the sending unit includes a mechanism for exchanging the byte of the output data read from the buffer according to the command. 13. The device according to item 8 of the scope of patent application, wherein the segmentation mechanism applies the asynchronous transmission mode application layer (AA L) together with the protocol data unit (PDU s) to the output data read from the buffer, and according to This command changes the PDU size. 1 4 · The device according to item 7 of the scope of patent application, wherein the sending unit includes a bit converter to provide a write address to the burst data from the storage device. 'At least a part of the write address is discontinuous. , And the buffer stores the burst data according to the write address and outputs the data from there in a linear manner. 15 · The device according to item 14 of the patent application range, wherein the burst data includes a payload for a predetermined agreement, and the address converter receives the packetization parameters and generates the write address, and the packet The parameterization includes at least the size of the remuneration from the host, so that according to the packetization parameter, a space is reserved in the buffer for the protocol title of the predetermined agreement, and the buffer receives the agreement from the host through the bus. Title, and store the agreement title in this reserved space. 16 · The device according to item 15 of the patent application scope, wherein the packetization parameter includes the size of the agreement header. 17 • The device according to item 15 of the scope of patent application, wherein the predetermined protocol is a transmission control protocol (or a user data packet protocol) and / or an Internet protocol. i 8 · If the device of the scope of patent application No. 15 is used, the paper size of this paper is applicable to China National Standard (CNS) A4 (210 X 297 mm) -48-(Please read the precautions on the back before filling (This page)-· mmmmmmm i ϋ— mn I— K— ^ ^ · tmmmmm Mmam§ Mmm§ In n 1 tmmmmm I mmm 1 Printed by the Consumer Consumption Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 508504 A8 B8 C8 D8 Includes a mechanism to receive a partial checksum calculated by the host, update the partial checksum to obtain a complete checksum, and to complete the checksum when the agreement title and payload have been written into the buffer Buffer agreement header. 1 9 · The device according to item 7 of the scope of patent application, wherein the traffic shaper comprises: a mechanism for classifying one or more strings of asynchronous transmission mode units into one or more types, each type including a device having the same Bit rate characteristics--or strings; a storage mechanism for storing a set of parameters to control each type of bit rate; and performing each type of speed regulation according to the set of parameters in the storage mechanism mechanism. 2 0. The device according to item 19 of the scope of patent application, wherein the parameters include an ideal scheduled time and an ideal scheduled time increment, and a mechanism that is a type of asynchronous transmission mode unit of the current string When placed in the send queue, the mechanism executes to make the ideal schedule time increase with the increment, and compares the ideal schedule time after the increase with the reference clock, and when the ideal time after the increment When the scheduled time is equal to or less than the reference clock, the next series of asynchronous transmission mode units in the type are placed in the transmission queue. 2 1 · For the device in the scope of patent application No. 20, in which the increment of each type uses two alternating, one of which represents a bit rate higher than the required bit rate, and the other represents the ratio The required bit rate is still low, and the actuator alternates the increments. 2 2 · If you apply for the item No. 19 in the scope of patent application, the increment of this paper size applies to the Chinese National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) ——Order ------------ Line 丨 Printed clothing by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs-49- 508504 Α8 Β8 C8 D8 The strings of cells are evenly spaced. 2 3 · The device according to item 19 of the patent application, wherein the first string has a high priority, and the traffic shaper includes one or Multiple second-string traffic mechanism. 2 4. The device according to item 19 of the patent application scope, wherein the first string includes a variable bit rate (VBR) string, and when the bit rate characteristics of the variable bit rate string are changed, the classification mechanism The variable bit rate string is separated from the current type and the variable bit rate string is attached to a new type, and the parameters of the current type and the new type are updated. 25. The device according to item 7 of the scope of patent application, wherein the mechanism for filtering the virtual path identifier / virtual channel identifier includes: a table for storing the virtual path identifier / virtual channel identifier entry, and is divided into areas Segment;… a mechanism for allocating virtual path identifiers / virtual channel identifier entries to the sections of the table based on a portion of each virtual path identifier / virtual channel identifier entry; a mechanism for using This part of the MU unit's virtual path ID / virtual channel ID selects the section to be searched; and performs a search in the selected section to find the virtual path ID / virtual corresponding to the received AT MU unit A channel ID entry and a mechanism that outputs an internal ID corresponding to the found entry. 2 6 · The device according to item 25 of the scope of patent application, wherein the part includes the lower χ bits of the virtual channel identification code. This paper size applies to China National Standard (CNS) A4 (210 χ 297 cm) ----------------- 0 (Please read the precautions on the back before filling this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 508504 A8 B8 C8 D8 夂, patent application scope 27. For the device with patent application scope item 25, the entry is stored in each section in sequence, and the search is a two-digit search. (Please read the precautions on the back before filling out this page) 2 8 · If the device in the scope of patent application is No. 7, the receiving unit includes the mechanism for checking the checksum in the title of the input data agreement. 29. The device according to item 7 of the scope of patent application, wherein the receiving unit includes a bit address converter for aggregating non-connected words from the buffer to establish burst data for the bus interface. 3 0 · —A system including a device such as the item 7 of the scope of patent application 'a host for implementing application and management data transmission, a storage device for storing input data and retrieving stored input data as output data , And the bus. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 31. For example, the system of item 30 in the scope of patent application, wherein the storage device includes a redundant array of parity disks or an integrated system of string data, and the sending device includes an independent magnetic Disk, redundant array of drives (RAID) or remote defect identification / indication (RDI), and the sending unit includes the use of redundant arrays of independent disks / drives to correct errors in the output data ' It also changes whether the redundant array functions of independent disks / drives for error correction are executed according to commands. 3 2 · The system according to item 30 of the patent application scope, wherein the storage device includes a redundant array of independent disks / drives or a remote defect identification / indication system 'and the adjacent characters in the cluster data belong to Different purlins. 3 3. If the system of the 30th scope of the patent application, the receiving unit includes: — -51-This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 508504 Employees of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the consumer cooperative A8 Β8 C8 D8 VI. Patent application scope a type detector 'When the input data is sent from the asynchronous transmission mode interface to the bus interface, it is used to detect at least one of the preset data Bit patterns; and a list of 'location information corresponding to the positions of the preset bit patterns in the data when the pattern detector detects the preset bit patterns; the host Controls the transfer of data from the storage device to the network based on the location information in the table. 34. The system according to item 33 of the scope of patent application, wherein the input data includes video data compressed according to the MPEG standard and the position information represents the position of at least one I-image, and the host controls the storage device such that I -Images are accessed based on location information. 35. The device of claim 30, wherein the storage device includes a redundant array of independent disks / drives or a remote defect identification / indication system, and the receiving device is used to convert the independent disks / Redundant array of disk drives' redundant data input and output mechanism. 3 6. — A method for sending data to or receiving data from an asynchronous transfer mode network, using a device such as any one of claims 7 to 29 and / Or systems such as those applying for patents ranging from 30 to 35. 37. A method for stringing data from a storage device, including the following steps: providing a write address for burst data to a buffer 'at least a portion of the write address is Discontinuous; Pass the data through a host, the storage device, and a series of devices (please read the precautions on the back before filling out this page) Order --------- line "This paper size applies China National Standard (CNS) A4 Specification (210 X 297 mm) -52- 508504 Printed by A8, B8, C8, D8, Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, a bus supporting communications between the patent application scope and the transmission from the storage device to The storage device; writing the burst data into the buffer according to the write address; and reading data from the buffer in a linear manner. 38. The method according to item 37 of the scope of patent application, wherein the burst data includes a payload for a predetermined agreement, and further includes: receiving from the host a packetization parameter including at least the size of the payload; generating the Write the address so that a space is reserved in the buffer for the protocol title of the predetermined agreement according to the packetization parameter; transmit the protocol title in the cluster from the host to the buffer through the bus; and The contract header is written into the reserved space in the buffer. 39. The method of claim 38, wherein the packetization parameter includes the size of the agreement header. 40. The method of item 38 in the scope of the patent, wherein the predetermined agreement is a transmission control protocol (TCP) (or a user data packet agreement (UDP)) and / or an Internet protocol (IP). 4 1 · The method according to item 38 of the scope of patent application, further comprising: receiving a part of the checksum calculated by the host; updating the part of the checksum to obtain a complete checksum; and when the agreement title and payload have been written into the buffer In the device, the complete checksum is inserted into the agreement header of the buffer. 4 2 · The method according to item 37 of the scope of patent application, wherein the storage device includes a redundant array of independent disks / drives or remote defect identification. This paper applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -53- (Please read the notes on the back before filling this page) Order --------- line! 508504 A8 B8 C8 D8 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, applied for a patent scope / instruction system, and the adjacent characters in the clustered data belong to different bars CJ mouth-early. 4 3 · A string device for stringing data from a storage device, comprising: a device for supporting communication reception from a storage device through a bus between the host, the storage device and the string device A mechanism for bursting data; a mechanism for providing a write address for bursting data, at least a part of the write address being discontinuous; and a buffer for storing the burst according to the write address Send data and output data in a linear manner. 4 4 · The string device according to item 43 of the patent application scope, wherein the burst data includes a payload for a predetermined agreement, and the provider receives a packetization parameter including at least the size of the payload from the host Moreover, a write address is generated, so that the buffer is reserved in the buffer according to the packetization parameters—the protocol header of the predetermined f agreement is received, and the buffer receives the protocol header in the cluster from the host through the bus, and The agreement title is stored in the reserved space. 4 5 · The device according to item 44 of the patent application scope, wherein the packetization parameter includes the size of the agreement header. 4 6 · The device according to item 4 of the patent application scope, wherein the predetermined agreement is a transmission control agreement (or a user data packet agreement) and / or an Internet protocol. 47. If the device in the scope of patent application No. 44, further includes a mechanism to receive the inspection and update of the part calculated by the host, the paper size of this paper applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -54-(Please read the precautions on the back before filling this page) 0 'ι · ϋ nnin ον II— tmmm n line "508504 A8 B8 C8 D8 The checksum, and when the agreement title and payload have been written into the buffer, the complete checksum is entered into the agreement title of the buffer. 4 8 · The device according to item 43 of the scope of patent application, wherein the storage device includes a redundant array of independent disks / drives or a remote defect identification / indication system, and the adjacent characters in the batch data belong to Different bar units. 49. A method for transmitting data, comprising the steps of: loading at least a pair of addresses and commands from a host; storing the data in a buffer; and removing the data from the host according to a read indicator Read from the buffer; execute the command if a match between the address and the address specified by the read indicator is detected; and after the command is executed, transfer the data read from the buffer . 50. If the method of item 49 of the patent scope is requested, the command causes the string bandwidth of the data read from the buffer to be changed. 5 1 · The method according to item 49 of the patent application range, wherein the command causes a rate change indicator to be inserted into the data read from the buffer for a long time. 5 2 · The method according to item 49 of the scope of patent application, wherein the order causes the host to be interrupted. 53. The method according to item 49 of the scope of patent application, wherein the data is read from a redundant array of independent disks / drives or a remote defect identification / indication system, and provided to the buffer, and This command enables and disables a redundant array function of an independent disk / disk for correcting errors. This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) -55-(Please read the notes on the back before filling out this page) 0 Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 508504 Α8 Β8 C8 D8 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 6. Scope of patent application ΰ 4: If the method of the scope of patent application No. 49 is applied, the order causes the exchange of bytes of data read from the buffer. 5 5 · The method according to item 49 of the scope of patent application, wherein the command causes a change in the size of the agreed data unit in the application layer segment of the asynchronous transfer mode applied to the data read from the buffer. 56. A device for transmitting data, comprising: a command block for storing a pair of addresses and commands loaded from a host, and detecting a buffer between the address and temporarily storing the data A match between a bit address specified by the reading index of the device; a mechanism 'when a match is detected'; the mechanism cooperates with the command block to execute the command; and a mechanism, after the execution of the command, transmits Read data from the buffer. 57. The device according to item 56 of the scope of patent application, wherein the executing agency changes the string bandwidth of the data from the buffer according to the order 1. 58. The device according to item 56 of the patent application range, wherein the actuator inserts a rate change indicator into the data read from the buffer according to the order. 5 9 · If the device in the scope of patent application No. 56, the order causes the host to be interrupted. 60. The device according to item 56 of the patent application, wherein the data is read from a redundant array of independent disks / drives or a remote defect identification / indication system, and is provided to a buffer, and the According to the order, the executing agency changes whether to implement error correction. (Please read the precautions on the back before filling this page) 0 Orders 丨-• Thread 'This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) -56-508504 Αδ Β8 C8 D8 t Scope of application for patent 6 1 · For the device of scope 56 for patent application, in which the executing agency exchanges the bytes of the data read from the buffer according to the order. 6 2 · If applying § 靑 56, the device of the patent scope, in which the executing agency applies the asynchronous transmission mode applicable layer segment with the agreed data unit to the data read from the buffer according to the order, and changes The size of the contract data. 6 3-A method for transmitting data, including the following steps: receiving data from a network; when the received data is transmitted to a storage device, detecting at least a predetermined bit pattern in the data; When the predetermined bit pattern is detected, position information corresponding to the position of the predetermined bit pattern in the data is added to a table; the data is stored in the storage device; and according to The position information in the list controls the transmission of data from the storage device to the network '6 4 · The method according to item 63 of the patent application scope, wherein the data includes video data compressed according to the MPEG standard and The position information represents the position of at least I images, and the control step includes: accessing the data I images stored in the storage device according to the position information. 65 · —A device for transmitting data, comprising: a receiving mechanism for receiving data from a network; a pattern detector, when the data is transmitted from the receiving mechanism to a storage device storing the data, the type The sample detector detects that at least one of the paper sizes in the data is in accordance with the Chinese National Standard (CNS) A4 specification (21〇 297 public hairpin: 57-" (Please read the precautions on the back before filling this page) 0 Order --------- Line "Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 508504 A8 B8 C8 D8 VI. Bit patterns predetermined for the scope of patent application; When the detector detects the predetermined bit pattern, 'is used to store the position information corresponding to the position of the predetermined bit pattern in the data; and-the organization' controls the slave based on the position information in the list. Transmission of data from the storage device to the network. 6 6 · The device according to item 6 of the patent application scope, wherein the data includes video data compressed according to the MPEG standard, and the location information represents at least one I image Location and the controls Control the storage device according to the location information so that the I image can be accessed. 6 7-A traffic shaping method, which includes the following steps: Classify one or more first strings into one or more types, each Types include one or more strings with the same bit rate characteristics; setting a set of parameters to control the bit rate of each type; and performing the pace of each type according to the set of parameters. 6 8 · If you apply The traffic shaping method according to item 67 of the patent, wherein the parameter includes an ideal scheduled time and an ideal scheduled time increment, and the execution steps include: when a unit of a current string in a type is placed When entering a transmission queue, increase by an ideal schedule time; compare a reference clock with the ideal schedule time after the increase; and when the ideal schedule time after the increase is equal to or less than the reference clock The unit of the next string in the type is placed in the sending queue. This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) -58-(please first Read the notes on the back and fill in this page) 0 Order -------- Line · Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 508504 A8 B8 C8 D8, patent application scope 6 9 · If the patent application scope No. 6 8-item traffic adjustment method 'In which each type of increment uses two alternating frames, one of which is a bit rate higher than the required bit rate, and the other of which is a bit rate higher than the required The bit rate is still low, and the execution steps include: cyclically alternately increasing the amount of 値. 7 0 · The method for adjusting the amount of traffic in the scope of the patent application No. 68, wherein the increment uses a 値 to make it belong to the same type The strings of cells are evenly spaced. 7 1 · The method for adjusting traffic according to item 67 of the scope of patent application, wherein the first string has high priority, and further includes: using a slot mechanism to shape one or more second strings with low priority Traffic. 7 2. The traffic shaping method according to item 67 of the scope of patent application, wherein the first string includes a variable bit rate string, and further includes: when the bit rate characteristics of the variable bit and rate string are changed, The variable bit rate string is separated from the current type; the parameter of the current type is updated; the variable bit rate string is attached to the new type; and the parameter of the new type is updated. 7 3. A traffic shaper comprising: a mechanism for classifying one or more first strings into one or more types, each type including one or more strings having the same bit rate characteristics; a storage device, It stores a set of parameters to control the bit rate of each type; and this paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling this page) f- ----- Order --------- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs-59- 508504 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A8 B8 C8 D8 This set of parameters is used to perform each type of speed regulation mechanism. 7 4 · The traffic shaper according to item 73 of the patent application scope, wherein the parameter includes an ideal scheduled time and an ideal scheduled time increment 'and the actuator is a unit of the current string of a type When placed in the sending list, the ideal scheduled time increment is increased in increments, and the ideal scheduled time after the increment is compared with the reference clock, and the ideal scheduled time after the increment When the time is equal to or less than the reference clock, the next string in the type is placed in the transmission column. 7 5 · If the traffic shaper of item 74 of the scope of patent application, each type of increment uses two alternating frames, one of which is a bit rate higher than the required bit rate, and the other The bit rate is lower than the required bit rate, and the actuator alternates the increments cyclically. 7 6 · If the traffic shaper for item 74 of the scope of patent application, its increment is adopted so that the cells belonging to the same type of string are evenly separated. 7 7 · If the traffic shaper of item 73 of the scope of patent application 'wherein the first string has a high priority, and also includes a slot mechanism to shape the communication of one or more second strings with low priority Volume of institutions. 78. The traffic shaper according to item 73 of the scope of patent application, wherein the first string includes a variable bit rate string, and when the bit rate characteristic of the variable bit rate string changes, the classification mechanism The variable bit rate string is separated from the type of the rule, and the variable bit rate string is attached to a new type, and the parameters of the current type and the new type are updated. This paper size applies to China National Standard (CNS) A4 (210 X 297 male H) -60- (Please read the precautions on the back before filling this page)