TW506190B - A simulated circuit layout for low voltage, low power and high performance type II current conveyor - Google Patents

A simulated circuit layout for low voltage, low power and high performance type II current conveyor Download PDF

Info

Publication number
TW506190B
TW506190B TW90107434A TW90107434A TW506190B TW 506190 B TW506190 B TW 506190B TW 90107434 A TW90107434 A TW 90107434A TW 90107434 A TW90107434 A TW 90107434A TW 506190 B TW506190 B TW 506190B
Authority
TW
Taiwan
Prior art keywords
current
circuit
patent application
item
scope
Prior art date
Application number
TW90107434A
Other languages
Chinese (zh)
Inventor
Sher Singh Rajput
Sudhanshu Shekhar Jamuar
Original Assignee
Council Scient Ind Res
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Council Scient Ind Res filed Critical Council Scient Ind Res
Application granted granted Critical
Publication of TW506190B publication Critical patent/TW506190B/en

Links

Landscapes

  • Amplifiers (AREA)

Abstract

A current conveyor circuit capable of operating at very low voltages, said circuit comprising: three LVCM's and four MOSFETS, wherein LVCM1 provides a constant bias current to flow through M3, if port X is kept open and the difference between the bias current and the injected current flows through M3 if a current is injected into port X, which gets reflected at port Z due to the action of LVCM1, M3 and M4, LVCM2 maintains the drain currents of M1 and M2 constant, and LVCM3 maintains a constant tail current in the circuit.

Description

506190 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明(f ) 發明之頜域 本發明係關於一種用於低電壓、低功率與高效能之類 型II的電流傳送器之模擬的電路布局。 太發明之背景 類比的世界是一個具有很大潛力於商業的開發之令人 興奮的領域。大部分的事物在本質上確實以類比的方式發 生,並且在類比領域中處理信號是信號處理之自然的方式 。此處理並不需要轉換至任何其它的領域,並且因此是自 然並且快速的。相反於此的是,信號在數位領域中的處理 係需要信號從類比領域轉換成爲數位領域,並且在處理之 後接著反向轉換回到類比模式。在數位領域的處理可能已 經夠快速,但是其處理時間實際上是由用於i比至數位以 及數位至類比的轉換裝置所控制。由該處理器所利用到的 時間實際上是過低。此也增加了用於該信號處理之硬體數 目,並且因而此種系統(數位信號處理)係更複雜,此於是 回到緩慢的信號處理。 然而,類比信號處理是一種高頻的動作,其係藉由電 流模式的信號處理元件的使用而更被增強。對於在此領域 有持續不斷的發展並且長期不斷的努力來開發其完全的潛 能是有必要的。電流傳送器(current conveyors,CC)係爲最 強大的電流模式信號處理區塊,其在作爲一個用於未來的 類比信號處理之應用上實際並且高效能的電路結構有其重 要性。早期版本的CC係利用習知的運算放大器以供建構 3 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ϋ tmmmm n ϋ n ϋ ϋ n I n · n n n n n ϋ n 一.eJ n n 1 n ϋ n n I (請先閱讀背面之注意事項再填寫本頁) 506190 A7 ____— _ B7 五、發明說明(&gt;) (請先閱讀背面之注意事項再填寫本頁) 之用。然而,今日以單體形式的CCs係爲可得的。許多工 作者已經努力朝向此目的,並且提出雙載子/CMOS做法的 CCII結構。即使BiCMOS的做法也被提出。幾乎所有的那 些做法都運作在±3·〇ν或是更高之下。就吾人所知,只有 一種CC係被提出能夠運作在±ι·〇ν之下,但其也具有較低 的頻寬(&lt;30ΜΗζ)。再者,該電路結構係太複雜。所使用的 輸入電壓緩衝器係太過複雜,因爲其係利用許多CMs以及 許多電流相加節點。 經濟部智慧財產局員工消費合作社印製 電流傳送器(CC)係代表在電路設計中根據電流模式的 方法之新興的類別之高效能的類比電路結構。在一種電流 模式的方法中’一位類比設計者係考量電流作爲輸入與輸 出的變數。因此,一個電流模式的元件係被定義爲其所有 功能都能夠完全地透過流入其各種子電路的電流加以解釋 並且理解,而完全不必考量輸入與輸出電壓的電路結構。 然而,適當的偏壓電壓必須建立在電路結構中適當的運作 條件。電流模式電路的優點係包含可用之寬的頻寬、其運 作在低電壓下的能力以及簡單的電路結構。低電壓動作係 爲一種用於獲得低功率電路結構之最有利的設計技術,然 而其可能無法轉變成爲低功率電路。 美國Μ/S類比元件公司已經提供幾種以電流回授放大 器的形式之電流傳送器Η的架構。AD 844是最受歡迎的 電流傳送器,其需要最少±3·〇ν的電源電壓並且具有10 MHz的頻寬。再者’該元件已經利用雙載子技術來加以作 成。數種其它的晶片也已經被製造出’並且係爲市售的。 4 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公爱) 506190 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明(7 ) 雖然這些市售的晶片提供了高頻寬,但是它們仍然因爲高 功率消耗並且需要較高的偏壓電壓而變差。它們幾乎全部 都是以雙載子技術加以作成。 類比設計者現在係專注於低功率並且必需爲低電壓的 電路設計,以解決可攜式設備以及行動通訊器具之需求。 低功率電路在非可攜式設備上也是較佳的。電流傳送器的 優點是激勵人們使用其在功率節省、低電壓以及高效能的 電流模式電路上。它們正成爲用於高頻應用的工業標準。 所提出的cc結構係爲此方向上前進了另一主要的階段。 電流傳送器係爲非常多功能的類比信號處理區塊,並 且在大部分的信號處理應用中現在正取代習知的運算放大 器。CCs的某些應用係爲: •類比主動濾波器 這是CCs之一種重要類型的應用。類比濾波器係有許 多種用途,其係包含 i. 娛樂性電子電路 ii. 用於高度充滿雜訊的工業的環境之控制電路。此類 型的環境也出現在太空船之發射期間,因而該等電路必須 執行在到達其該標記値之下。 iii. 在手持可攜式設備以及通訊器具中。' •太空應用 當設計者欲設計用於太空探險的設備,其係面對到在 5 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -------------------訂-!------線 〈請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 506190 A7 B7 五、發明說明(Ur ) 四個同等重要的方面上之挑戰,亦即功率消耗、大小、重 量以及可靠度。因此對於擁有可靠的低功率高效能的電路 產生了需求。因此該CCII可以證明是此種用於太空探險以 及戰略上的軍事應用之低電壓低功率之科學的設備之設計 上的優點。 •醫瘠雷子雷路 乂 醫療設備係漸增地被利用作爲救生設備。尤其,像是 心律調整器與助聽器的設備係漸增地被利用。醫療設備的 要件係爲小尺寸以及低功率消耗。CCII能夠順利地被使用 在這些醫療設備的結構。 •一般的設備 一般用途的運作在較高電壓並且消耗高功率之設備係 需要一個風扇或是一個水冷卻的配置型式之冷卻系統。此 係增加設備的重量並且降低可攜性以及因而該設備之最佳 的利用。該低電壓低功率CCII能夠被用於此種量測設備的 設計來增進可攜性。 可以注意的是ceils之潛在的應用係位於像是高頻寬 以及低功率消耗(低電壓動作)之高效能。 一個如在圖1所示的CC係爲三個(或是更多)埠的網路 ,其係被命名爲埠X、埠Y以及埠Z。埠X係一個適合用 於輸入以及輸出信號的雙重埠。對於電流信號,其係作用 爲一個具有非常低輸入阻抗的輸入埠,但也是一個用於電 6 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 1----------1--------tr--------•線· (請先閱讀背面之注意事項再填寫本頁) h 0^0 Vy Vx 1 0 0 ix ⑴ h « Ο 5 0一 Λ. 506190 A7 B7 五、發明說明(&lt;) 壓信號的輸出埠。埠γ只是具有高輸入阻抗哮電壓輸入填 。埠Z是一個電流輸出埠。對於注入到埠X中的電流,該 輸出埠Z可以汲取或是提供該電流。進一步對於CCs的硏 究係導引至幾種新電路架構的出現。因此有兩種類型的 CCs的分類,其中之一係根據該輸入埠Y的特性,並且另 一種係根據該埠z的特性。根據該輸入埠Y特性,CCs已 經被分類成CC類型I(CCI)、CC類型II(CCII)、以及CC 類型III(CCIII)。當分類係根據璋Z時,該CCs係被分類 成CC+以及ccr。一般CC結構之埠的性質係申以下所得: 對於CCI,A=1並且一個電壓VY將被連接在埠Y並 且電壓將被連接在璋X,(νχ)係依循VY,而與注入埠X的 電流無關。在璋Ζ所產生的電壓Vz係任意的。在CCII中 ,Α=0並且進入埠Υ的電流係爲零,此係提供非常高的輸 入阻抗在埠Υ。對於CCIII,A=-l,此係意涵ΙΥ=-ΙΧ。此性 質係被利用在監視電路路徑中的電流。對於&lt; CC+結構, B=1,而對於CCT結構,B=-l。因此CCs係構成九種子類 另ϋ。這些係爲CCI+、ccr、CCI合成輸出、CCII+、ccir 、具有合成輸出的CCII、CCIII+、CCIir、以及具有合成 輸出的CCIII。 一個電流傳送器之元件 電流鏡(CM)幾乎是全類比的電路架構之一個不可缺的 7 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ---------------------β—------ (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 506190 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明(k) 部件。因此當吾人論及低電壓電路時,則使得其子電路能 夠運作在低電壓下是必要的。爲了符合此項挑戰,有必要 來設計高效能的CMs,其係能夠運作在低電壓之下。這些 低電壓的電流鏡(LVCMs)係被利用在所推薦的‘CCII結構之 設計中。該LVCM係被描繪在圖2中。 一個其上CM的效能能夠被評估之LVCM的效能指標 係爲· i.理想上爲零的低輸入阻抗, Π.理想上爲無限大的高輸出阻抗 iii. 理想上爲無限大的高電流轉移頻寬 iv. 理想上爲無限大的高直流電流轉移範圍 v. 軌至軌的輸入並且輸出電壓擺幅能力。‘ 大部分的類比電路結構在本質上係混合而成的,其係 利用電流與電壓兩種模式的信號處理元件。運算放大器係 一個此種例子,其係利用兩者,例如是電流鏡的電流模式 電路、以及一個根據電壓模式槪念的差動對。因此,爲了 一個任意的電流模式電路之完整性,檢查幾種也適合用於 電流模式的元件之低電壓、類比電壓的模式之電路是必要 的。它們進入到低電壓信號處理類比單元中的應用係需要 新的看法。 乂 電壓緩衝器是功能極強大的電路中之一並且最普遍被 使用來轉移輸入電壓(被施加在一個通常以輸入埠著稱之場 )至該其它的埠(通常被稱之爲輸出埠),其係具有高電流的 提供/汲取能力。這些類比電路的性質係包含: 8 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閲讀背面之注意事項再填寫本頁) --------訂---------線‘ 經濟部智慧財產局員工消費合作社印製 506190 A7 B7 五、發明說明(q ) •精確的電壓追蹤,在沒有任何的錯誤之下獲得精確 的電壓轉移所必需的。 •低輸出阻抗,增加這些電路之電流汲取/提供的能力 所必要的。 •高輸入阻抗係降低輸入信號的負載。 •高動態範圍係提供較大的信號範圍給輸入電壓信號 〇 •低功率消耗係帶來高的電池壽命以及較小的尺寸。 這些性質有助於類比設計者來利用這些區塊於輸入埠 與輸出埠之間的隔離。高輸入阻抗係避免輸入信號的負載 所必需的。其也提供高電流的驅動能力至該輸出埠。因此 其也可以被稱作爲電壓緩衝器。這些區塊有著廣範圍的用 途。在這些適合用於電流模式的信號處理類比單元之用途 中最普遍的是它們在電流傳送器、電流回授放大器、運算 浮動放大器等等上的用途。它們係被利用在一個電流傳送 器的輸入埠,用於傳送在該電流輸入埠的電壓。當其被利 用在一個CCII的輸出埠時,結果該電路結構係作用爲一個 電流回授放大器,大致爲一個高效能元件。四個端子浮動 調零器(FTFNs)係最普遍的電流模式電路,其係適合被用作 爲一個一般用途的電流模式區塊。此區塊係被利用在 FTFNs以形成其電壓輸入的埠。甚至於該電壓模式電路係 非常順利地利用此區塊在運算放大器中。其係被置放在運 算放大器的輸入端。 電壓轉移區塊係利用數個電路結構加以做成。幾乎所 9 7¾尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 一 ----I-----I ---------訂------丨丨-線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 506190 A7 B7 五、發明說明(孓) 有的做法都利用一個差動對。差動對是非常重要的類比單 元中之一種,其係被利用在源自於真實世界問題之許多電 路應用中。低電壓的軌至軌電壓轉移單元之設計係爲非常 重要的,因爲它們需要進一步對於各種新的電路結構之硏 究。它們也被稱爲運算跨導體。它們係被利用來從一個埠 轉移輸入電壓信號至另一低阻抗埠。 在文獻中係可得數種電路槪要,其係被用作爲電壓轉 移區塊。然而,所有這些區塊係被運作在相當高的供應電 壓之下。它們的輸入與輸出電壓擺幅也是有的。爲了克 服這些缺點,數種電路結構係被提出,其係能夠提供軌至 軌的電壓轉移。然而,爲數不多的結構適合於運作在低電 壓位準之下。因此調查新的電路結構是否能夠運作在低電 壓之下並且提供軌至軌的電壓轉移能力係爲一項極重要的 工作。 源極锅合對是最常用來形成一個差動輸入級。其係最 普遍爲兩個MOSFET子電路在單體的類比電路結構中。此 電路之有用性係起源於此源極耦合的MOSFE'Ts之串聯係 直接地彼此耦接而無中間級的耦合電容器,並且差動輸入 特性是許多類型的類比電路中所必需的事實。 差動放大器設計之一項重要的目標是流入該電路的輸 入引線之直流偏壓電流的最小化以及差動輸入電阻之最大 化。MOSFETs係用於此種配置能夠具有低的輸入偏壓電流 之較佳的元件。 10 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ------------訂---------線· (請先閱讀背面之注意事項再填寫本頁) 506190 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明(q) 軟體放說甩 , 該電路以半導體施行係需要先驗證該電路結構,以節 省時間、材料以及金錢。而該電路設計之預先驗證可以用 某些精確的方法來加以完成,例如是: ♦藉由在一個晶片之上的電路施行 ♦藉由透過電腦的模擬。 早期的電路驗證方法係包含所提出的電路結構在一個 矽晶片之上的施行。由於現代的積體電路之龐大的複雜度 ,因此原型的施行牽涉到龐大的成本。該所提出的電路結 構可能會失效而無法傳送所要的輸出。然而,現代的電腦 輔助的電路分析係提供便宜並且快速的替代方式。因此, 電腦輔助的電路分析是擁有所必要的,以實驗室原型的量 測來獲得事先的電路效能係幾乎不可能的。電腦輔助的電 路分析能夠提供 ♦用於信心的建立之事先的設計驗證。 ♦事先的效能分析,其係降低完成的時間以及在最終 產品的開發中所涉及的成本。 4 被使用於此種評估並且被用作爲在類比積體電路的發 展中之一種非常必要的工具之最普遍的軟體係爲SPICE電 路模擬器。在電路模擬的領域中,SPICE係被認爲是工業 標準。該首字母縮略字SPICE係代表著重於積體電路的模 擬程式。SPICE係爲一般用途的電路模擬程式,其係可以 模擬電子電路的效能,而不必真正地組合其成爲一個晶片 或是在一電路板之上。SPICE能夠執行電子電路之各種分 11 ^ 本紙張尺度適用中國國家標準(CNS)A4規格(21〇 X 297公釐) -----------------—訂---------線 (請先閱讀背面之注意事項再填寫本頁) 506190 經濟部智慧財產局員工消費合作社印製 A7 B7_____ 五、發明說明(、〇 ) 析:運作點、時間領域響應、以及小信號的頻率響應。其 係爲一個非常多功能的程式,被廣泛地使用在工業以及大 學中。最初SPICE曾經只有被設計在大型電腦之上。之後 ,一種以PC爲基礎的版本係被發展出來,其係被稱作爲 PSPICE。PSPICE可以執行在IBM相容的PC之上。美國 的M/S· Miorosim公司係爲設計並且升級PSPICE的公司中 之一。 PSPICE係利用相同於SPICE的演算法。其係同等有 用於在廣範圍的應用中模擬所有類型的類比與數位電路, 其都是藉由分離的組件用於在一個麵包板之上或是來設計 一個單體晶片。必要的控制陳述語句係儲存在一個檔案, 其係被稱作爲該電路檔案。這些陳述語句完全地描述該電 路。該SPICE模擬器係讀取該電路檔案。每個陳述語句係 自給自足並且獨立的;該陳述語句並不彼此互動。SPICE( 或是PSPICE)是容易學習以及使用的。 本發明之目的 本發明之主要目的係爲提供一種用於低電壓、低功率 並且高效能的傳送器供類比信號處理應用使用之模擬的電 路布局設計。 本發明之另一目的係爲提供布局設計在半導體之上的 一個原型1C晶片之開發的利用。 仍是本發明之另一目的係爲提供一種替代的電壓緩衝 器,其係可以非常便利地用作爲一個電流回授放大器或是 12 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) '&quot; ' &quot;一 ----------------1---訂---------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 506190 A7 B7 五、發明說明(α) 一個運算浮動電流傳送器之輸入區塊。 本發明之槪要 本發明係關於一種能夠運作在非常低的電壓之下的電 流傳送器電路,該電路係包括:三個LVCM’s以及四個 MOSFETS,其中若璋X係被保持開路時,LVCM1係提供 一個固定的偏壓電流來流動通過M3,並且若一電流係被 注入到埠X中時,在該偏壓電流與注入的電流之間的差値 係流動通過M3,其係由於LVCM1、M3以及M4的動作而 在璋Z獲得映射,LVCM2係維持Ml與M2之汲極電流爲 固定的,並且LVCM3係在該電路中維持一個固定的尾電 流。 ; 本發明之詳細說明 於是,本發明係關於一種能夠運作在非常低的電歷下 之電流傳送器電路,該電路係包括:三個LVCM’s以及四 個MOSFETS,其中若埠X係被保持開路時,LVCM1係提 供一個固定的偏壓電流來流動通過M3,並且若一電流係 被注入到埠X中時,在該偏壓電流與注入的電流之間的差 値係流動通過M3,其係由於LVCM1、M3以及M4的動作 而在埠Z獲得映射,LVCM2係維持Ml與M2之汲極電流 爲固定的,並且LVCM3係在該電路中維持一個固定的尾 電流。 在本發明的一個實施例中,該電流傳送器係包括一個 13 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公爱了 --------------------訂---------線 (請先閱讀背面之注咅?事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 506190 A7 B7 五、發明說明(d PMOS LVCM 〇 在本發明的另一實施例中,LVCM2係爲一個PMOS LVCM。 在仍是本發明的另一實施例中,該電流傳送器係包括 兩個 NMOS LVCM’s。 在仍是本發明的另一實施例中,LVCM1侈爲單一輸入 、雙輸出的NMOS LVCM。 在本發明的另一實施例中,LVCM2係爲單一輸入、單 一輸出的 NMOS LVCM。 在本發明的另一實施例中,該LVCM係利用習知的 CM結構結合一個在該輸入埠之處的位準移動器電晶體。 在本發明的一個實施例中,該LVCM'係給予高擺幅能 力。 在本發明的另一實施例中,該LVCM’s f確保最大可 能的輸入以及輸出電壓擺幅,其係給予軌至軌能力至電壓 轉移區塊。 在仍是本發明的另一實施例中,適應性偏壓技術係被 利用在該LVCM中。 在仍是本發明的另一實施例中,該適應性偏壓技術係 升高輸入電壓擺幅並且降低失調(offset)電流。 在本發明的另一實施例中,該MOSFET的Ml與M2 係構成一個差動對。 &lt; 在本發明的另一實施例中,在埠Y的電壓係由於該差 動對的作用而被轉移至埠X。 14 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ------------—-----^--------»^^wl (請先閱讀背面之注意事項再填寫本頁) 506190 A7 B7 五、發明說明(、/?) 在本發明的一個實施例中,該電流傳送_可以更包括 一個連接在Ml的汲極與M2的閘極之間的電容〇 在本發明的另一實施例中,該電容係被連接以提供補 償。 在仍是本發明的另一實施例中,該電流傳送器可以更 包括一個在Ml與M2的閘極端之間的電阻。 在仍是本發明的另一實施例中,該電阻係增強該電路 的頻率響應。 在本發明的另一實施例中,該MOSFET ft M3與M4 係構成一個電流鏡。 在本發明的另一實施例中,該電流傳送器係運作在一 個i:lV的電壓範圍下。 在此申請案中所提出之電流傳送器係具有簡單的電路 架構、在槪念上是模組化的(此係對於現代的VLSI電路晏 非常有利的必要條件)、並且具有運作在一個頻寬優於 100MHz之±1V供應電壓下的能力。 本模擬的布局設計在提供高頻率、低電處並且簡單的 替代方案給習知的運算放大器方面係證明爲具有極大優點 〇 因此,這些電路結構可以構成一般用途的類比電流所 做成的模組中之一,用於各種類比電路結構的硏發之類比 資料庫。此可證明是在模組化的類比電路設計中之主要的 步驟中之一,模組化的類比電路設計是一個以數位設計的 模式被發展用於先進的類比電路之領域。 15 --:__^ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) ---- 訂--------線泰 經濟部智慧財產局員工消費合作社印製 506190 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明“uc) 附圖式之簡要說明 在該隨附圖式中: 圖1係描繪一個電流傳送器(CC)。 ; 圖2係描繪用於LVCM的施行之所提出的電路。 圖3係描繪該LVCM的完整電路。 圖4係描繪在圖3中所示的LVCM電路之電路槪要圖 〇 圖5係描繪由於輸入電流的注入所出現的輸入電壓。 圖6係描繪具有在低電壓位準下之適應性偏壓的輸出 電流特性。 圖7係描繪不具有在低電壓位準下之適應性偏壓的輸 出電流特性。 圖8係描繪在高電流位準下的輸出電流特性。 圖9係描繪輸入電流轉移特性。 圖10係描繪閘極電阻在頻率響應上的影響。 圖11係描繪各種補償技術的影響。 圖12係描繪溫度變化在LVCM的頻寬上之影響。 圖13係描繪參數變化在LVCM的頻寬上之影饗。 圖14係描繪該所提出的電路。 ‘ 圖15係描繪直流電壓的輸入輸出特性。 圖16係描繪該電壓緩衝器的頻寬特性。 圖17係描繪所提出的CCII結構。 圖18係描繪直流輸入電流的轉移特性。 圖19係描繪該所提出的用於電流轉移之電路的頻率響 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -----------------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 506190 - _: 卜,論 五、發明說明() 應。 圖20係描繪由於輸入電流的注入而在輸入端所發展出 的電壓。 圖21係描繪直流輸入的電流轉移。 圖22係描繪電流轉移的頻寬。 圖23係描繪在輸入偏壓電流與電流轉移之間的圖形° 圖24係描繪在輸入偏壓電流與電流轉移的頻寬之間的 圖形。 圖25描繪電流傳送器在整個頻寬上之頻率響應。 較佳_實施例之說明 對於該所提出的結構吾人已經設計一種特定應用的 LVCMs以及電壓緩衝器(VBs)。 低電懕雷流鏡(LVCM) 請參考圖2。該所提出的用於LVCM的施行之電路係 利用習知的CM結構結合一個在輸入埠的位準移動器電晶 體,以給予高擺幅能力至該所提出的CM。一個電容性與 電阻性的補償技術也曾被利用來增進該所提出的CM之頻 寬。根據位準移動器的CMs之方法通常因爲在低輸入電流 位準下之非所要的電流之流動而更糟。此電流係被稱作爲 失調電流並且係爲在LVCMs設計上之主要的瓶頸。吾人 係導入一種適應性偏壓技術用於該所提出的LVCMs,其係 提高該輸入電壓擺幅並且降低該失調電流。 該設計係採用〇·8μηι技術參數用於p-Spice模擬。電 17 ---I-----I---------I ^---------^ —^w— (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 經濟部智慧財產局員工消費合作社印製 506190 A7 _ B7 五、發明說明(vW) 晶體M4係藉由選擇一個非常低電流來流動通過其通道而 被強迫來運作在子臨界區域中。該偏壓電流係來自於藉由 M6、M7與M8所形成的CM。這些組件的寬長比係被保持 在此種方式爲在電晶體M8的汲極處可用的電流係處於此 種低位準爲使得該M4進入子臨界區域。一個電容C係被 利用於補償並且連接在Ml的汲極與M2的閘極之間。一 個電阻也連接在Ml與M2的閘極端之間。庇電阻係增強 該電路的頻率響應。] _ 雷路架構 完整的電路係顯示在圖3中。然而,爲了解釋該電路 的作用,該電路槪要圖係顯示在圖4中。 模擬結果 評估一個LVCM的效能所必需之最重要的參數係給定 如下: •輸入電阻. •輸出電阻 •頻率響應 •電流轉移比例(直流與交流電流兩者)。 所提出的電路之評估已經在著重以上的參數之下加以 完成。電晶體寬長比(W/L)係在表1中被給予。 18 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) :------------ΦΜ.------------訂---------ΜΦ (請先閱讀背面之注意事項再填寫本頁) 506190 經濟部智慧財產局員工消費合作社印製 Α7 Β7 Χ 用&gt;於NMOSLVCM的電晶體之寬長比 MOSFETs 類型 寬長比(W/L) Ml, M2 NMOS 48 μτη/ϊ.ό μπι M3 NMOS 48 μηι/0.8 μηι M4 PMOS 12 μιη/0.8 μπι M5 PMOS 12 μιη/0.8 μπι M6 NMOS 4.8 μπι/1.6 μτη M7,M8 PMOS 48 μηι/0.8 μπι M9 PMOS 0.8 μπι/16 μπι 由於範圍從ΙμΑ至500μΑ之電流的注入而存在之輸入 電壓係顯示在圖5中。具有與不具有在低電_位準之下的 適應性偏壓之輸出電流特性係分別顯示在圖6與7中。圖 8係顯示在高電流位準之下的輸出電流特性。 輸入電流轉移特性係顯示在圖9中。圖10係描繪閘極 電阻在該結構的頻率響應之上的影響。各種補償技術的影 響係顯示在圖11中。 溫度變化在該LVCM頻寬之上的影響係顯示在圖12 中。圖13係顯示參數變化對於所提出的LVCM的頻帶具 有小影響。 所提岀的電懕緩衝器 此區塊的中心也是差動輸入級。輸入電壓信號係被施 19 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) --------------------訂--------·線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 506190 A7 B7 五、發明說明(\$) 加在源極耦合差動對的閘極中之一。若流動通過該等 MOSFETs的電流係相等時,電壓將會出現在該另一閘極處 。該所提出的結構係給予低阻抗特性至該電壓源。然而, 該電壓源之最大的電流汲取能力係依據該電流源而定。任 何在電流汲取能力上的增加係升高該電路結構的功率消耗 。以上的架構之缺點係爲: •備用的電流之固定的流動係升高該電路結構的功率 消耗。 •該電流鏡係管理該電路架構之輸出汲取的能力。 •較高的電流汲取能力於是將升高該功率消耗。 •此結構無法被用於低功率電路。 該電路的詳細分析係如下。 雷路說明 該所提出的槪要電路係顯示在圖14中,其中一個差動 對係被利用來從輸入-埠轉移電壓至輸出埠。該電路的尾電 流係藉由利用LVCM而被保持爲固定的。類似地,一個 LVCM係被利用來維持M1與m2的汲極電流爲固定的。 LVCMs係確保最大可能的輸入與輸出電壓擺幅,此係給予 軌至軌能力至該電壓轉移區塊。 假設該等MOSFETsMl與M2兩者都運作在飽和區域 中’簡單的電路分析係產生〆 20 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公爱) --------^---------^ AW. (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 506190 A7 B7 五、發明說明(\f) 1 ^ /m=fu)2 2 該電流鏡CM2係維持ID1=ID2,此係給予:506190 Printed by A7 B7, Consumer Cooperatives, Bureau of Intellectual Property, Ministry of Economic Affairs. 5. Description of the invention (f) The invention of the jaw field. The invention relates to an analog circuit for a type II current transmitter of low voltage, low power and high efficiency. layout. Background of Too Inventive The analog world is an exciting area with great potential for commercial development. Most things do happen in analogy in nature, and processing signals in the analogy domain is a natural way of signal processing. This process does not need to be transferred to any other area, and is therefore natural and fast. In contrast, the processing of signals in the digital domain requires the signal to be converted from the analog domain to the digital domain, and then converted back to analog mode after processing. Processing in the digital domain may be fast enough, but its processing time is actually controlled by the conversion device for i-to-digital and digital-to-analog. The time used by this processor is actually too low. This also increases the number of hardware used for this signal processing, and thus such a system (digital signal processing) is more complicated, and thus returns to slow signal processing. However, analog signal processing is a high-frequency action, which is further enhanced by the use of signal processing elements in current mode. It is necessary for continuous development in this area and long-term continuous efforts to develop its full potential. Current conveyors (CCs) are the most powerful current-mode signal processing blocks. Their practical and high-performance circuit structure is important as an application for future analog signal processing. Earlier versions of the CC series used conventional operational amplifiers for construction. 3 paper sizes are applicable to China National Standard (CNS) A4 (210 X 297 mm). Ϋ tmmmm n ϋ n ϋ I n I n · nnnnn ϋ n 1. eJ nn 1 n ϋ nn I (Please read the notes on the back before filling this page) 506190 A7 ____— _ B7 V. Description of the invention (&gt;) (Please read the notes on the back before filling this page). However, CCs in monomer form are available today. Many workers have worked towards this goal and have proposed CCII structures with a dual-carrier / CMOS approach. Even the BiCMOS approach has been proposed. Almost all of them work at ± 3 · νν or higher. As far as I know, only one CC system has been proposed to be able to operate under ± ι · 〇ν, but it also has a lower bandwidth (&lt; 30MΗζ). Furthermore, the circuit structure is too complicated. The input voltage buffer used is too complicated because it uses many CMs and many current summing nodes. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. The current transmitter (CC) is a high-performance analog circuit structure that represents an emerging category of current mode methods in circuit design. In a current mode approach, an analog designer considers current as an input and output variable. Therefore, a current mode component is defined as a circuit structure in which all functions can be explained and understood completely by the current flowing into its various sub-circuits, without having to consider the input and output voltages. However, a proper bias voltage must be established for the proper operating conditions in the circuit structure. The advantages of a current mode circuit include the wide bandwidth available, its ability to operate at low voltages, and its simple circuit structure. Low-voltage operation is one of the most advantageous design techniques for obtaining a low-power circuit structure, but it may not translate into a low-power circuit. The American M / S analog component company has provided several architectures of current transmitters in the form of current feedback amplifiers. The AD 844 is the most popular current transmitter that requires a minimum supply voltage of ± 3 · ν and has a bandwidth of 10 MHz. Furthermore, the element has been fabricated using the double-carrier technology. Several other wafers have also been fabricated 'and are commercially available. 4 This paper size applies the Chinese National Standard (CNS) A4 specification (210 x 297 public love) 506190 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Invention description (7) Although these commercially available chips provide high frequency bandwidth, But they still suffer from high power consumption and the need for higher bias voltages. Almost all of them are made using the double-carrier technology. Analog designers are now focusing on low-power and low-voltage circuit designs to address the needs of portable devices and mobile communications appliances. Low power circuits are also preferred on non-portable devices. The advantage of a current transmitter is that it encourages people to use it in power-saving, low-voltage, and high-efficiency current-mode circuits. They are becoming the industry standard for high-frequency applications. The proposed cc structure is another major stage in this direction. The current transmitter is a very versatile analog signal processing block and is now replacing the conventional operational amplifier in most signal processing applications. Some applications of CCs are: • Analog Active Filter This is an important type of application for CCs. Analog filters are used for a variety of purposes, including i. Entertainment electronic circuits ii. Control circuits for highly noisy industrial environments. This type of environment also occurs during the launch of the spacecraft, so the circuits must be implemented below the mark 値 that they reach. iii. In handheld portable devices and communication equipment. '• Space Applications When designers want to design equipment for space exploration, they are faced with the application of the Chinese National Standard (CNS) A4 specification (210 X 297 mm) on 5 paper sizes -------- ----------- Order-! ------ line <Please read the notes on the back before filling out this page) Printed by the Employee Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 506190 A7 B7 V. Invention Explain (Ur) four equally important challenges, namely power consumption, size, weight, and reliability. Therefore, there is a demand for circuits with reliable low power and high performance. Therefore, the CCII can prove the design advantage of such low-voltage and low-power scientific equipment for space exploration and strategic military applications. • Medical Lei Lei Lei Road 系 Medical equipment is increasingly being used as life-saving equipment. In particular, devices such as pacemakers and hearing aids are increasingly being used. The requirements for medical equipment are small size and low power consumption. CCII can be successfully used in the structure of these medical devices. • General equipment General-purpose equipment that operates at higher voltages and consumes higher power is a cooling system that requires a fan or a water-cooled configuration. This increases the weight of the device and reduces portability and therefore optimal use of the device. The low-voltage low-power CCII can be used in the design of such measurement equipment to improve portability. It should be noted that the potential applications of ceils are high efficiency such as high frequency bandwidth and low power consumption (low voltage operation). A CC system as shown in Figure 1 is a network of three (or more) ports, which are named port X, port Y, and port Z. Port X is a dual port suitable for input and output signals. For the current signal, it acts as an input port with a very low input impedance, but it is also used for electricity. 6 Paper sizes are applicable to China National Standard (CNS) A4 (210 X 297 mm) 1 ----- ----- 1 -------- tr -------- • Line · (Please read the precautions on the back before filling this page) h 0 ^ 0 Vy Vx 1 0 0 ix ⑴ h «Ο 5 0 一 Λ. 506190 A7 B7 V. Description of the invention (&lt;) Output port of the pressure signal. Port γ is simply filled with a high input impedance. Port Z is a current output port. For the current injected into the port X, the output port Z can draw or provide the current. Further research on CCs led to the emergence of several new circuit architectures. Therefore, there are two types of CCs, one of which is based on the characteristics of the input port Y, and the other is based on the characteristics of the port z. Based on the characteristics of the input port Y, CCs have been classified into CC Type I (CCI), CC Type II (CCII), and CC Type III (CCIII). When the classification is based on 璋 Z, the CCs are classified into CC + and ccr. The properties of the port of the general CC structure are as follows: For CCI, A = 1 and a voltage VY will be connected to port Y and the voltage will be connected to 璋 X. The current is irrelevant. The voltage Vz generated at 璋 Z is arbitrary. In CCII, A = 0 and the current flowing into the port is zero, which provides a very high input impedance at the port. For CCIII, A = -l, which means ΙΥ = -Ιχ. This property is used to monitor the current in the circuit path. For the <CC + structure, B = 1, and for the CCT structure, B = -l. Therefore, the CCs line constitutes another class of nine seeds. These are CCI +, ccr, CCI composite output, CCII +, ccir, CCII, CCIII +, CCIir, and CCIII with composite output. The component current mirror (CM) of a current transmitter is almost an indispensable part of the full analog circuit architecture. 7 This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm). ------- -------------- β ------- (Please read the notes on the back before filling out this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Consumption Cooperative 506190 A7 B7 printed by the Bureau's Consumer Cooperatives V. Invention Description (k) Parts. Therefore, when we talk about low-voltage circuits, it is necessary to enable its sub-circuits to operate at low voltage. To meet this challenge, it is necessary to design high-performance CMs that can operate at low voltages. These low-voltage current mirrors (LVCMs) are used in the design of the proposed 'CCII structure. The LVCM line is depicted in FIG. 2. The performance index of an LVCM on which the performance of the CM can be evaluated is: i. Ideally low input impedance of zero, Π. Ideally infinite high output impedance iii. Ideally infinite high current transfer Bandwidth iv. Ideally infinite high DC current transfer range v. Rail-to-rail input and output voltage swing capability. ‘Most analog circuit structures are essentially hybrids, which are signal processing components that use both current and voltage modes. An operational amplifier is one such example, which uses both, such as a current mode circuit of a current mirror, and a differential pair based on a voltage mode concept. Therefore, for the integrity of an arbitrary current mode circuit, it is necessary to check several low voltage, analog voltage mode circuits that are also suitable for current mode components. Their application to low voltage signal processing analog units requires a new perspective.乂 The voltage buffer is one of the most powerful circuits and is most commonly used to transfer the input voltage (applied in a field commonly known as the input port) to the other port (usually called the output port) It has high current supply / sink capability. The properties of these analog circuits include: 8 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) -------- Order --------- Line 'Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 506190 A7 B7 V. Description of the invention (q) • Accurate voltage tracking, get accurate voltage transfer without any errors Required. • Low output impedance, necessary to increase the current draw / supply capability of these circuits. • High input impedance reduces the load on the input signal. • High dynamic range provides a larger signal range to the input voltage signal. ○ Low power consumption brings high battery life and smaller size. These properties help analog designers to take advantage of the block isolation between input and output ports. High input impedance is necessary to avoid load on the input signal. It also provides high current drive capability to the output port. Therefore it can also be called a voltage buffer. These blocks have a wide range of uses. The most common of these signal processing analog units suitable for current mode is their use in current transmitters, current feedback amplifiers, operational floating amplifiers, and so on. They are used in the input port of a current transmitter to transmit the voltage at the current input port. When it is used in a CCII output port, the circuit structure acts as a current feedback amplifier, which is roughly a high-performance component. Four-terminal floating nullers (FTFNs) are the most common current-mode circuits and are suitable for use as a general-purpose current-mode block. This block is used in FTFNs to form its voltage input port. Even the voltage mode circuit uses this block in the operational amplifier very smoothly. It is placed at the input of the op amp. The voltage transfer block is made using several circuit structures. Almost all 9 7¾ standards are applicable to China National Standard (CNS) A4 specifications (210 X 297 mm). I -------- I --------- Order ------ 丨丨 -line (Please read the notes on the back before filling this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 506190 A7 B7 V. Description of Invention (孓) Some methods use a differential pair. Differential pairs are one of the most important analog units used in many circuit applications that originate from real-world problems. The design of low-voltage rail-to-rail voltage transfer units is very important because they require further research into various new circuit structures. They are also called operational transconductors. They are used to transfer input voltage signals from one port to another low-impedance port. Several types of circuits are available in the literature, which are used as voltage transfer blocks. However, all of these blocks are operated under fairly high supply voltages. They also have input and output voltage swings. To overcome these shortcomings, several circuit architectures have been proposed that can provide rail-to-rail voltage transfer. However, few structures are suitable for operation at low voltage levels. Therefore, it is extremely important to investigate whether the new circuit structure can operate under low voltage and provide rail-to-rail voltage transfer capability. Source pot pairing is most commonly used to form a differential input stage. It is the most common for two MOSFET sub-circuits in a single analog circuit structure. The usefulness of this circuit stems from the string connection of this source-coupled MOSFE'Ts, which are directly coupled to each other without an intermediate stage coupling capacitor, and the differential input characteristic is a necessary fact in many types of analog circuits. An important goal of the differential amplifier design is to minimize the DC bias current flowing into the input leads of the circuit and maximize the differential input resistance. MOSFETs are the preferred components for this configuration with low input bias current. 10 This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) ------------ Order --------- line · (Please read the Note: Please fill in this page again) 506190 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (q) Software release, the implementation of this circuit with semiconductors needs to verify the circuit structure first to save time and materials As well as money. The pre-verification of the circuit design can be done with some precise methods, for example: ♦ implemented by a circuit on a chip ♦ by simulation through a computer. Early circuit verification methods involved the implementation of the proposed circuit structure on a silicon wafer. Due to the huge complexity of modern integrated circuits, the implementation of prototypes involves huge costs. The proposed circuit structure may fail to deliver the desired output. However, modern computer-aided circuit analysis systems provide a cheap and fast alternative. Therefore, computer-assisted circuit analysis is necessary, and it is almost impossible to obtain advance circuit performance with laboratory prototype measurements. Computer-assisted circuit analysis can provide prior design verification for confidence building. ♦ Prior performance analysis, which reduces the time to completion and the costs involved in the development of the final product. 4 The most common software system used for this evaluation and as a very necessary tool in the development of analog integrated circuits is the SPICE circuit simulator. In the field of circuit simulation, the SPICE system is considered the industry standard. The acronym SPICE stands for analog programs focusing on integrated circuits. SPICE is a general-purpose circuit simulation program, which can simulate the performance of electronic circuits without actually combining them into a chip or on a circuit board. SPICE can perform various points of electronic circuits. 11 ^ This paper size is applicable to China National Standard (CNS) A4 specification (21〇X 297 mm). -------- Line (Please read the notes on the back before filling this page) 506190 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7_____ V. Invention Description (, 〇) Analysis: Operating Points, Time Domain Response, and frequency response of small signals. It is a very versatile program that is widely used in industry and universities. At first SPICE was designed only on mainframe computers. Later, a PC-based version was developed, which was called PSPICE. PSPICE can be executed on an IBM compatible PC. M / S. Miorosim in the United States is one of the companies that designed and upgraded PSPICE. PSPICE uses the same algorithm as SPICE. They are equally useful for simulating all types of analog and digital circuits in a wide range of applications. They are used to separate components for use on a breadboard or to design a single chip. The necessary control statements are stored in a file, which is called the circuit file. These statements fully describe the circuit. The SPICE simulator reads the circuit file. Each statement is self-sufficient and independent; the statements do not interact with each other. SPICE (or PSPICE) is easy to learn and use. OBJECTS OF THE INVENTION The main object of the present invention is to provide an analog circuit layout design for a low-voltage, low-power, and high-performance transmitter for analog signal processing applications. Another object of the present invention is to provide a development utilization of a prototype 1C wafer whose layout is designed on a semiconductor. It is still another object of the present invention to provide an alternative voltage buffer, which can be very conveniently used as a current feedback amplifier or 12 paper sizes applicable to China National Standard (CNS) A4 (210 X 297) Mm) '&quot;' &quot; 一 ---------------- 1 --- Order ---------- (Please read the precautions on the back before (Fill in this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 506190 A7 B7 V. Description of the invention (α) An input block for calculating a floating current transmitter. Summary of the Invention The present invention relates to a current transmitter circuit capable of operating at a very low voltage. The circuit system includes: three LVCM's and four MOSFETS. Among them, if the X system is kept open, the LVCM1 system Provide a fixed bias current to flow through M3, and if a current is injected into port X, the difference between the bias current and the injected current flows through M3, which is due to LVCM1, M3 And the action of M4 is obtained at 映射 Z, LVCM2 maintains the drain currents of M1 and M2 to be fixed, and LVCM3 maintains a fixed tail current in this circuit. The detailed description of the present invention is, therefore, the present invention relates to a current transmitter circuit capable of operating at a very low e-calendar. The circuit system includes: three LVCM's and four MOSFETS, wherein if port X is kept open LVCM1 provides a fixed bias current to flow through M3, and if a current is injected into port X, the difference between the bias current and the injected current flows through M3, which is due to The actions of LVCM1, M3, and M4 are mapped on port Z. LVCM2 maintains the drain currents of M1 and M2 to be fixed, and LVCM3 maintains a fixed tail current in the circuit. In one embodiment of the present invention, the current transmitter system includes a 13 paper size that is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297). ------ Order --------- line (Please read the note on the back? Matters before filling out this page) Printed by the Intellectual Property Bureau Staff Consumer Cooperatives 506190 A7 B7 V. Invention Description ( d PMOS LVCM. In another embodiment of the present invention, LVCM2 is a PMOS LVCM. In still another embodiment of the present invention, the current transmitter system includes two NMOS LVCM's. It is still the present invention In another embodiment, LVCM1 is a single-input, dual-output NMOS LVCM. In another embodiment of the present invention, LVCM2 is a single-input, single-output NMOS LVCM. In another embodiment of the present invention, The LVCM uses a conventional CM structure combined with a level shifter transistor at the input port. In one embodiment of the present invention, the LVCM 'is provided with a high swing capability. In another aspect of the present invention, In an embodiment, the LVCM's f ensures the maximum possible input and output voltage swings, which Giving rail-to-rail capability to the voltage transfer block. In still another embodiment of the invention, adaptive bias technology is used in the LVCM. In still another embodiment of the invention, the adaptation The sexual bias technology raises the input voltage swing and reduces the offset current. In another embodiment of the present invention, the M1 and M2 of the MOSFET form a differential pair. &Lt; In the embodiment, the voltage at port Y is transferred to port X due to the effect of the differential pair. 14 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) ------ ------—----- ^ -------- »^^ wl (Please read the notes on the back before filling out this page) 506190 A7 B7 V. Description of the invention (, /?) In one embodiment of the present invention, the current transfer may further include a capacitor connected between the drain of M1 and the gate of M2. In another embodiment of the present invention, the capacitor is connected to provide Compensation. In still another embodiment of the present invention, the current transmitter may further include a resistor between the gate terminals of M1 and M2. In still another embodiment of the present invention, the resistor system enhances the frequency response of the circuit. In another embodiment of the present invention, the MOSFET ft M3 and M4 series form a current mirror. In another embodiment of the present invention, In the embodiment, the current transmitter operates under a voltage range of i: 1V. The current transmitter proposed in this application has a simple circuit structure and is modular in concept (this system It is a very necessary condition for modern VLSI circuits), and has the ability to operate at a supply voltage of ± 1V with a bandwidth better than 100MHz. The layout design of this simulation proves to have great advantages in providing high frequency, low power, and simple alternatives to conventional operational amplifiers. Therefore, these circuit structures can constitute general-purpose analog current-made modules One of them is an analog database for the development of various analog circuit structures. This can prove to be one of the main steps in modular analog circuit design. Modular analog circuit design is a digital design model that has been developed for the field of advanced analog circuits. 15-: __ ^ This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) ---- Order ------- -Printed by the Consumer Property Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 506190 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention "uc) A brief description of the drawings is in the accompanying drawing: Figure 1 Series A current transmitter (CC) is depicted.; Figure 2 depicts the proposed circuit for the implementation of LVCM. Figure 3 depicts the complete circuit of the LVCM. Figure 4 depicts the circuit of the LVCM circuit shown in Figure 3 Important Figure 0 Figure 5 depicts the input voltage due to the input current injection. Figure 6 depicts the output current characteristics with an adaptive bias at a low voltage level. Figure 7 depicts the absence of a low voltage level Figure 8 shows the output current characteristics at high current levels. Figure 9 shows the input current transfer characteristics. Figure 10 shows the effect of the gate resistance on the frequency response. Figure 11 depicts the impact of various compensation techniques. Series 12 depicts the effect of temperature changes on the bandwidth of LVCM. Figure 13 depicts the effect of parameter changes on the bandwidth of LVCM. Figure 14 depicts the proposed circuit. 'Figure 15 depicts the input and output of DC voltage Characteristics. Figure 16 depicts the bandwidth characteristics of the voltage buffer. Figure 17 depicts the proposed CCII structure. Figure 18 depicts the DC input current transfer characteristics. Figure 19 depicts the proposed circuit for current transfer The frequency response of this paper is based on the Chinese National Standard (CNS) A4 specification (210 X 297 mm). (Please read the notes on the back before filling this page) 506190-_: Bu, on the fifth, the description of the invention () should be. Figure 20 depicts the voltage developed at the input due to the input current injection. Figure 21 series Figure 22 depicts the current transfer of the DC input. Figure 22 depicts the bandwidth of the current transfer. Figure 23 depicts the graph between the input bias current and the current transfer. Figure 24 depicts the bandwidth between the input bias current and the current transfer. Figure 25 shows the frequency of the current transmitter over the entire bandwidth. The description of the preferred embodiment For the proposed structure, we have designed a specific application of LVCMs and voltage buffers (VBs). Low-electricity lightning current mirror (LVCM) Please refer to Figure 2. The proposed application The circuit implemented in LVCM uses a conventional CM structure combined with a level shifter transistor at the input port to give high swing capability to the proposed CM. A capacitive and resistive compensation technology has also been used It is used to increase the bandwidth of the proposed CM. Methods based on the level shifter's CMs are usually made worse by the undesired current flow at low input current levels. This current is called the offset current and is a major bottleneck in the design of LVCMs. We have introduced an adaptive bias technique for the proposed LVCMs, which increases the input voltage swing and reduces the offset current. The design system uses 0.8 μm technical parameters for p-Spice simulation. Electricity 17 --- I ----- I --------- I ^ --------- ^ — ^ w— (Please read the precautions on the back before filling this page) This paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297 mm). Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 506190 A7 _ B7 V. Description of the invention (vW) Crystal M4 is selected by a very low current Coming flows through its channels are forced to operate in subcritical regions. The bias current comes from the CM formed by M6, M7 and M8. The width-to-length ratio of these components is maintained in such a way that the current available at the drain of transistor M8 is at such a low level that the M4 enters the subcritical region. A capacitor C is used for compensation and is connected between the drain of M1 and the gate of M2. A resistor is also connected between the gate terminals of M1 and M2. The shunt resistor enhances the frequency response of the circuit. ] _ Thunder Road Architecture The complete circuit is shown in Figure 3. However, in order to explain the function of the circuit, a schematic diagram of the circuit is shown in FIG. 4. Simulation results The most important parameters necessary to evaluate the effectiveness of an LVCM are given as follows: • Input resistance. • Output resistance. • Frequency response. • Current transfer ratio (both DC and AC current). Evaluation of the proposed circuit has been completed with emphasis on the above parameters. The transistor width-to-length ratio (W / L) is given in Table 1. 18 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm): ------------ ΦM .------------ Order-- ------- MΦ (Please read the notes on the back before filling out this page) 506190 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Α7 Β7 χ &gt; The width and length of the transistor used in NMOSLVCM is wider than the type of MOSFETs Aspect ratio (W / L) Ml, M2 NMOS 48 μτη / ϊ.ό μπι M3 NMOS 48 μηι / 0.8 μηι M4 PMOS 12 μιη / 0.8 μπι M5 PMOS 12 μιη / 0.8 μπι M6 NMOS 4.8 μπι / 1.6 μτη M7, M8 PMOS 48 μηι / 0.8 μπι M9 PMOS 0.8 μπι / 16 μπι The input voltage that exists due to the injection of current ranging from 1 μA to 500 μA is shown in Figure 5. The output current characteristics with and without the adaptive bias below the low voltage level are shown in Figures 6 and 7, respectively. Figure 8 shows the output current characteristics at high current levels. The input current transfer characteristics are shown in FIG. 9. Figure 10 depicts the effect of gate resistance on the frequency response of the structure. The effects of various compensation techniques are shown in Figure 11. The effect of temperature changes above this LVCM bandwidth is shown in Figure 12. Figure 13 shows that parameter changes have a small effect on the frequency band of the proposed LVCM. The proposed electronic buffer is centered on the differential input stage of this block. The input voltage signal is applied to this paper. The size of this paper is applicable to China National Standard (CNS) A4 (210 X 297 mm) -------------------- Order --- ----- · Line (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 506190 A7 B7 V. Description of the invention (\ $) Added to the source-coupled differential pair One of the gates. If the currents flowing through these MOSFETs are equal, the voltage will appear at the other gate. The proposed structure imparts low impedance characteristics to the voltage source. However, the maximum current draw capability of the voltage source depends on the current source. Any increase in current draw capability increases the power consumption of the circuit structure. The disadvantages of the above architecture are: • The fixed flow of standby current increases the power consumption of the circuit structure. • The current mirror is capable of managing the output draw of the circuit architecture. • Higher current draw capability will then increase this power consumption. • This structure cannot be used in low power circuits. The detailed analysis of this circuit is as follows. Thunder circuit description The proposed essential circuit is shown in Fig. 14, where a differential pair is used to transfer voltage from the input-port to the output port. The tail current of this circuit is kept fixed by using LVCM. Similarly, an LVCM system is used to keep the drain currents of M1 and m2 constant. LVCMs ensure the maximum possible input and output voltage swings, which give rail-to-rail capability to this voltage transfer block. It is assumed that both of these MOSFETs Ml and M2 operate in a saturated region. 'Simple circuit analysis produces 〆20. This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 public love) -------- ^ --------- ^ AW. (Please read the notes on the back before filling out this page) Printed by the Employees' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 506190 A7 B7 V. Description of Invention (\ f) 1 ^ / m = fu) 2 2 The current mirror CM2 system maintains ID1 = ID2, which gives:

Vin=V〇ut 3 樟擬結果 用於軌至軌電壓轉移區塊之重要的參數係爲: •非常高的輸入阻抗。 •非常低的輸出阻抗。 &lt; •直流電壓轉移特性,其係透露出該輸入與輸出的電 壓範圍。 • AC電壓轉移頻寬,其係透露出可用的頻率響應。 P-spice模擬係被執行來判斷這些參數。用於Ml、M2 與M3的W/L比例係分別被取爲24μιη/1·6μπι、 24μπι/1·6μηι與120μιη/1·6μηι。該結構的輸入阻抗被發現爲 1018Ω,此係可從任何的CMOS結構預期到。該結構的輸 出阻抗只有10Ω。 ‘ 當該供應電壓係±l.〇V時,該直流電壓輸入輸出特性 係被給予在圖15中。對於範圍在-1·〇ν至1.0V之間的輸 入電壓,該輸出電壓係依循該輸入電壓。對於一個範圍在一 L0V至1.0V之間的輸入電壓,該輸出電壓擺幅係接近軌 至軌(-0.75V至0.75V)。相對於理想上1〇〇,該直流電壓 轉移比率係被評估在0.981。然而,交流電壓轉移功能已經 被評估理想上爲1·〇〇。該電壓緩衝器的頻寬特性係顯示在 21 ' 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) --------------------訂---I-----線^^· (請先閱讀背面之注意事項再填寫本頁) 506190 A7 B7 五、發明說明(β) 圖16中。該頻寬係被發現爲超過300MHz。 所揋出的CCII結構: c 該所提出的CCII結構係顯示在圖17中。該結構係根 據在以上章節中所述之LVCMs以及VBs的利用。該電路 的動作係相當簡單的,並且能夠藉由認識這些建構區塊的 性質與動作而加以理解。該電路係利用三個LVCMs。其中 之一係爲PMOS,而其它兩個係爲NMOS類型。NMOS CMs係爲雙輸出以及單一輸出的1^/€1^3。若埠乂係被保 持開路時,一個藉由該LVCM1設定之固定的偏壓電流係 流動通過M3。當一個電流係被注入到埠X宁,在該偏壓 電流與注入的電流之間的差値係流動通過M3。此電流由 於藉由M3與M4所形成的LVCM1與CM的作用而在璋Z 獲得映射。類似地,從埠X所汲取的電流獲得映射於埠Z 。被施加在埠Y的電壓係由於差動對的作用而獲得映射於 璋X 〇 該所提出的電路已經對於作用爲一個CCII而加以模擬 。用於Ml、M2、M3與M4的W/L比例係分別被取爲 24μπι/1.6μηι 、 24μηι/1.6μηι 、 120μπι/1.6μιη 以及 120μπι/1·6μηι。對於150μΑ的偏壓電流,該直流輸入電流 轉移特性係顯示在圖18中。用於電流轉移之所提出的電路 之頻率響應係顯示在圖19中。 由於輸入電流的注入而在輸入端處所發展之電壓係顯 示在圖20中。該直流輸入電流轉移係顯示在圖21中。電 22 表紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公璧) (請先閱讀背面之注意事項再填寫本頁) -0 n I n n IB n n^eJ n ·ϋ n -線- 經濟部智慧財產局員工消費合作社印制衣 506190 A7 B7 五、發明說明() 流轉移頻寬係顯示在圖22中。 當該輸入偏壓電流係被增加至25〇μΑ時’該電流轉移 係如在圖23所示地發生至高達250μΑ。電流轉移頻寬也係 如在圖24所示地升高。 應用: 、 該所提出的結構能夠被用於以下的設計 1·電流回授放大器 2·用於行動通訊設備的主動濾波器。 3·用於娛樂與控制信號之類比信號處理設備的發展上 〇 4·在其中高頻率、低功率並且低電壓系統係必須的太 空電子電路上。 5·在醫療電子電路上。 又 6·在用於電壓至電流轉換器的跨導體之設計上。 7·在算數功能上。 8·在用於電流監視之類比與數位晶片上。 該所提出的電路县有以下的優點·. i·低功率消耗(&lt;2.〇mW)。 ii·低電壓供應動作(±1.0V)。 iii·電流轉移比率 ’ a) 直流《 0.99 b) 交流》0.99 23 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閲讀背面之注意事項再填寫本頁) 訂---------線一 經濟部智慧財產局員工消費合作社印製 506190 A7 _B7_ 五、發明說明(#) c)電流轉移頻寬《 100 MHz iv.電壓轉移比率 a) 直流《 0.99 b) 交流《 0.99 c) 電壓轉移頻寬《100 MHz d) 輸入電壓轉移範圍係從-0.7V至0.7V。 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 24 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)Vin = V〇ut 3 Imitation results The important parameters for the rail-to-rail voltage transfer block are: • Very high input impedance. • Very low output impedance. &lt; • DC voltage transfer characteristics, which reveal the voltage range of the input and output. • AC voltage transfer bandwidth, which reveals the available frequency response. P-spice simulation is performed to determine these parameters. The W / L ratios for Ml, M2 and M3 were taken as 24 μm / 1/6 μm, 24 μm / 1 1.6 μm, and 120 μm / 1 1.6 μm, respectively. The input impedance of this structure was found to be 1018Ω, which can be expected from any CMOS structure. The output impedance of this structure is only 10Ω. ‘When the supply voltage is ± 1.0V, the DC voltage input / output characteristics are given in FIG. 15. For an input voltage ranging from -1 · 〇ν to 1.0V, the output voltage follows the input voltage. For an input voltage ranging from L0V to 1.0V, the output voltage swing is close to rail-to-rail (-0.75V to 0.75V). Relative to the ideal 100, the DC voltage transfer ratio was evaluated at 0.981. However, the AC voltage transfer function has been evaluated to be ideally 1.0. The bandwidth characteristic of this voltage buffer is shown in 21 'This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) ------------------ --Order --- I ----- line ^^ · (Please read the notes on the back before filling out this page) 506190 A7 B7 V. Description of the invention (β) Figure 16 This bandwidth was found to exceed 300 MHz. The proposed CCII structure: c The proposed CCII structure is shown in FIG. 17. This structure is based on the use of LVCMs and VBs as described in the previous section. The action of this circuit is quite simple and can be understood by knowing the nature and action of these building blocks. This circuit uses three LVCMs. One of them is PMOS and the other two are NMOS types. NMOS CMs are 1 ^ / € 1 ^ 3 for dual output and single output. If the port is kept open, a fixed bias current set by this LVCM1 will flow through M3. When a current is injected into port Xing, the difference between the bias current and the injected current flows through M3. This current is mapped at 璋 Z due to the effects of LVCM1 and CM formed by M3 and M4. Similarly, the current drawn from port X is mapped to port Z. The voltage applied to port Y is mapped to 璋 X 由于 due to the effect of the differential pair. The proposed circuit has been simulated for acting as a CCII. The W / L ratios for Ml, M2, M3, and M4 were taken as 24 μm / 1.6 μm, 24 μm / 1.6 μm, 120 μm / 1.6 μm, and 120 μm / 1 · 6 μm, respectively. This DC input current transfer characteristic is shown in Fig. 18 for a bias current of 150 µA. The frequency response of the proposed circuit for current transfer is shown in FIG. The voltage developed at the input due to the injection of input current is shown in Figure 20. This DC input current transfer system is shown in FIG. 21. The paper size of the meter 22 applies to the Chinese National Standard (CNS) A4 specification (210 X 297 cm) (Please read the precautions on the back before filling this page) -0 n I nn IB nn ^ eJ n · ϋ n -line- Printed clothing for employees' cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 506190 A7 B7 V. Description of the invention () The flow transfer bandwidth is shown in Figure 22. When the input bias current is increased to 25µA ', the current transfer occurs as high as 250µA as shown in FIG. The current transfer bandwidth also increases as shown in FIG. Application: 1. The proposed structure can be used for the following designs: 1. Current feedback amplifier 2. Active filter for mobile communication equipment. 3. For the development of analog signal processing equipment for entertainment and control signals. 4. On high-frequency, low-power and low-voltage systems where space electronic circuits are required. 5. On medical electronic circuits. 6. In the design of transconductors for voltage-to-current converters. 7. In the arithmetic function. 8. On analog and digital wafers for current monitoring. The proposed circuit has the following advantages: i. Low power consumption (&lt; 2.0 mW). ii. Low voltage supply operation (± 1.0V). iii · Current transfer ratio 'a) DC "0.99 b) AC" 0.99 23 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) Order --------- Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 506190 A7 _B7_ V. Description of the invention (#) c) Current transfer bandwidth "100 MHz iv. Voltage transfer ratio a) DC" 0.99 b) AC "0.99 c) Voltage transfer bandwidth" 100 MHz d) Input voltage transfer range is from -0.7V to 0.7V. (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 24 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

506190 彻晴 i 物的,正^ -—-_ --L__補充·— 六、申請專利範圍 1. 一種能夠運作在非常低的電壓下之電流傳送益電路 ,該電路係包括:三個LVCM’S以及四個MOSFETS ’其 中若埠X係被保持開路時,LVCM1係提供一個固定的偏 壓電流來流動通過M3,並且若一電流係被注入到埠X中 時,在該偏壓電流與注入的電流之間的差値係流動通過 M3,其係由於LVCM1、M3以及M4的動作而在埠Z獲得 映射,LVCM2係維持Ml與M2之汲極電流爲固定的,並 且LVCM3係在該電路中維持一固定的尾電流。 2. 如申請專利範圍第1項所述之電路,其中該電流傳 送器係包括一個PMOS LVCM。 3. 如申請專利範圍第1項所述之電路,其中LVCM2 係爲一個 PMOS LVCM。 4. 如申請專利範圍第1項所述之電路,其中該電流傳 送器係包括兩個NMOS LVCM’s。 5. 如申請專利範圍第1項所述之電路,其中LVCM1 係爲單一輸入、雙輸出的NMOS LVCM。 6. 如申請專利範圍第1項所述之電路,其中LVCM2 係爲單一輸入、單一輸出的NMOS LVCM。 7·如申請專利範圍第1項所述之電路,其中該LVCM 係利用習知的CM結構結合一個在該輸入埠之處的位準移 動器電晶體。 8·如申請專利範圍第1項所述之電路,其中該LVCM 係給予高擺幅能力。 9.如申請專利範圍第1項所述之電路,其中該 _____1__ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閲讀背面之注意事項再塡寫本頁) 訂: 線 A8B8C8D8 506190 六、申請專利範圍 LVCM’s係確保最大可能的輸入以及輸出電壓擺幅,其係 給予軌至軌能力至電壓轉移區塊。 10·如申請專利範圍第1項所述之電路,其中適應性偏 壓技術係被利用在該LVCM中。 11·如申請專利範圍第1項所述之電路,其中該適應性 偏壓技術係升高輸入電壓擺幅並且降低失調電流。 12·如申請專利範圍第1項所述之電路,其中該 MOSFET的Ml與M2係構成一個差動對。 13·如申請專利範圍第1項所述之電路,其中在埠Y 的電壓係由於該差動對的作用而被轉移至埠X。 14·如申請專利範圍第1項所述之電路,其中該電流傳 送器可以更包括一個連接在Ml的汲極與M2的閘極之間 的電容C 〇 15. 如申請專利範圍第1項所述之電路,其中該電容係 被連接以提供補償。 16. 如申請專利範圍第1項所述之電路,其中該電流傳 送器可以更包括一個在Ml與M2的閘極端之間的電阻。 17. 如申請專利範圍第1項所述之電路,其中該電阻係 增強該電路的頻率響應。 18. 如申請專利範圍第1項所述之電路’其中該 MOSFET的M3與M4係構成一個電流鏡。 19. 如申請專利範圍第1項所述之電路,其中該電流傳 送器係運作在一個:UV的電壓範圍下。 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公釐) (請先閲讀背面之注意事項再塡寫本頁) 薷 訂 線506190 晴晴 i 物 的 , 正 ^ -—----L__Supplement · — 6. Scope of Patent Application 1. A current transfer circuit capable of operating at a very low voltage, the circuit includes: three LVCM'S And four MOSFETS 'where the port X series is kept open, the LVCM1 series provides a fixed bias current to flow through M3, and if a current system is injected into port X, the bias current and the injected current The difference between the currents flows through M3, which is mapped at port Z due to the actions of LVCM1, M3, and M4. LVCM2 maintains the drain currents of M1 and M2 to be fixed, and LVCM3 maintains this circuit. A fixed tail current. 2. The circuit described in item 1 of the patent application scope, wherein the current transmitter includes a PMOS LVCM. 3. The circuit described in item 1 of the patent application scope, in which LVCM2 is a PMOS LVCM. 4. The circuit as described in item 1 of the patent application scope, wherein the current transmitter includes two NMOS LVCM's. 5. The circuit described in item 1 of the patent application scope, in which LVCM1 is a single-input, dual-output NMOS LVCM. 6. The circuit described in item 1 of the patent application scope, in which LVCM2 is a single-input, single-output NMOS LVCM. 7. The circuit according to item 1 of the scope of patent application, wherein the LVCM is a conventional CM structure combined with a level shifter transistor at the input port. 8. The circuit as described in item 1 of the scope of patent application, wherein the LVCM is given a high swing capability. 9. The circuit described in item 1 of the scope of patent application, where the ___1__ This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before writing this page ) Order: Line A8B8C8D8 506190 VI. Patent application scope LVCM's is to ensure the maximum possible input and output voltage swing, which is to give rail-to-rail capability to the voltage transfer block. 10. The circuit according to item 1 of the scope of patent application, wherein the adaptive bias technology is used in the LVCM. 11. The circuit according to item 1 of the scope of patent application, wherein the adaptive bias technology increases the input voltage swing and reduces the offset current. 12. The circuit according to item 1 of the scope of patent application, wherein M1 and M2 of the MOSFET constitute a differential pair. 13. The circuit according to item 1 of the scope of patent application, wherein the voltage at port Y is transferred to port X due to the effect of the differential pair. 14. The circuit according to item 1 of the scope of patent application, wherein the current transmitter may further include a capacitor C connected between the drain of M1 and the gate of M2. 〇15. The circuit described above, wherein the capacitor is connected to provide compensation. 16. The circuit according to item 1 of the patent application range, wherein the current transmitter may further include a resistor between the gate terminals of M1 and M2. 17. The circuit as described in item 1 of the scope of patent application, wherein the resistor enhances the frequency response of the circuit. 18. The circuit according to item 1 of the scope of the patent application, wherein M3 and M4 of the MOSFET constitute a current mirror. 19. The circuit as described in item 1 of the patent application range, wherein the current transmitter operates in a voltage range of UV. This paper size applies to China National Standard (CNS) A4 (210 x 297 mm) (Please read the precautions on the back before writing this page) 薷 Ordering
TW90107434A 2001-03-28 2001-03-29 A simulated circuit layout for low voltage, low power and high performance type II current conveyor TW506190B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG200101953A SG94796A1 (en) 2001-03-28 2001-03-28 A simulated circuit layout for low voltage, low power and high performance type ii current conveyor

Publications (1)

Publication Number Publication Date
TW506190B true TW506190B (en) 2002-10-11

Family

ID=27621552

Family Applications (1)

Application Number Title Priority Date Filing Date
TW90107434A TW506190B (en) 2001-03-28 2001-03-29 A simulated circuit layout for low voltage, low power and high performance type II current conveyor

Country Status (2)

Country Link
SG (1) SG94796A1 (en)
TW (1) TW506190B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI423058B (en) * 2008-06-11 2014-01-11 Fujitsu Ltd Simulation apparatus, simulation method and computer-readable recording medium on or in which simulation program is recorded
US9773080B2 (en) 2015-11-30 2017-09-26 Industrial Technology Research Institute Thermal simulation device and method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1281386C (en) * 1988-12-29 1991-03-12 Douglas Clifton Wadsworth Accurate current conveyor
US5124666A (en) * 1991-03-04 1992-06-23 Industrial Technology Research Institute CMOS current convevor and its filter applications
US5596289A (en) * 1995-05-15 1997-01-21 National Science Council Differential-difference current conveyor and applications therefor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI423058B (en) * 2008-06-11 2014-01-11 Fujitsu Ltd Simulation apparatus, simulation method and computer-readable recording medium on or in which simulation program is recorded
US9773080B2 (en) 2015-11-30 2017-09-26 Industrial Technology Research Institute Thermal simulation device and method

Also Published As

Publication number Publication date
SG94796A1 (en) 2003-03-18

Similar Documents

Publication Publication Date Title
US6931605B2 (en) Simulated circuit layout for low voltage, low paper and high performance type II current conveyor
Jiang et al. Design of low-voltage bandgap reference using transimpedance amplifier
Motamed et al. A low-voltage low-power wide-range CMOS variable gain amplifier
Park et al. External capacitor-less low drop-out regulator with 25 dB superior power supply rejection in the 0.4–4 MHz range
Yuce A novel floating simulation topology composed of only grounded passive components
Naderi et al. A new high speed and low power four-quadrant CMOS analog multiplier in current mode
Chen et al. A low-power CMOS analog multiplier
CN112152606B (en) Interface circuit and electronic device
Mayeda et al. Broadband high-efficiency millimeter-wave power amplifiers in 22-nm CMOS FD-SOI with fixed and adaptive biasing
Ferri et al. An integrated improved CCII topology for resistive sensor application
Naderi et al. High speed, low power four-quadrant CMOS current-mode multiplier
Safari et al. A simple low voltage, high output impedance resistor based current mirror with extremely low input and output voltage requirements
TW506190B (en) A simulated circuit layout for low voltage, low power and high performance type II current conveyor
Palmisano et al. Design strategies for class A CMOS CCIIs
Srivastava et al. Low-voltage low-power high performance current mode fullwave rectifier
Kumar et al. Performance analysis of 4: 1 multiplexer with DTMOS technique
Yadav et al. Low voltage analog circuit design based on the flipped voltage follower
KR20060091069A (en) Analog circuit design method using hardware description language
KR100763038B1 (en) A simulated circuit layout for low voltage, low power and high performance type ? current conveyor
Cakir et al. Low-voltage high-performance CMOS current differencing buffered amplifier (CDBA)
Kondo et al. Proposal and design methodology of switching mode low dropout regulator for bio-medical applications.
Madhuri et al. Design of a Low Power Class AB Two-Stage. Op-Amp with Symmetrical Slew Rate
Di Carlo et al. A novel LV LP CMOS internal topology of CCII+ and its application in current-mode integrated circuits
Adhikari et al. Abstract modelling and estimation of a high performance Tobey's PGA
Granhaug et al. Body-bias regulator for ultra low power multifunction CMOS gates

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees