503539 i五、發明說明（i) 丨發明領域： 本發明與一種積體電路封裝製程有關，特別是有關於 一種在晶圓階段晶片尺度之封裝技術，可以防止晶圓蹺曲 之問題。 發明背景： 隨著極大型積體電路（ULSI)製程技術地世代更替，半 導體元件尺寸不但因元件縮小而提昇晶圓上元件之積集 度，更可以因此降低成本，創造利潤。除此之外，客戶對_ 輕薄短小的挑剔也是積體電路快速發展的一驅動力，其中 關鍵積體電路尺寸大小的晶片封裝技術也成一關鍵指標5 提高I C晶片數目於一封裝體，或者如何使欲封裝的晶片夠 薄，都屬於封裝技術中，業者互相較勁的標的之一。 一般而言，晶圓階段晶片大小封裝技術，係屬於先不切 割，而待封裝後才加以切割成獨立的I C封裝體。此外晶片 I設計多將輸出入墊製作於該晶片之外圍部分。當輸出入引 廣’便不適宜在輸出入墊上直接形成凸塊下金屬_ 及鍚球。典型的輸出入墊間隔（口11；(；11)只約5 0 -8 0//111，這 樣的間隙，鍚球就必須夠小，例如至多40μ m直徑。但這 丨會有可靠度的問題。一種解決上述問題的方法之一便是應 丨用蝕刻金屬層形成引線將輸出入墊接到晶片内部位置。晶 503539 五、發明說明（2) 片内部位置可提供之輸出入墊典型間隙約為2 〇 瓜以上， :這對於提供足夠可靠度的鍚球高度而言，已足足有餘。例 |如直接連接鍚球或者先形成鍚球座（p〇st)，再接上鍚球。 !503539 i V. Description of the invention (i) 丨 Field of the invention: The present invention relates to an integrated circuit packaging process, and more particularly, to a packaging technology at the wafer level of a wafer scale, which can prevent the problem of wafer skewing. Background of the Invention: With the replacement of ultra-large integrated circuit (ULSI) process technology, the size of semiconductor components not only increases the integration of components on wafers due to component shrinkage, but also reduces costs and creates profits. In addition, customers' picks on thinness, shortness, and shortness are also a driving force for the rapid development of integrated circuits. The chip packaging technology of key integrated circuit sizes has also become a key indicator. 5 How to increase the number of IC chips in a package, or how Making the chip to be packaged thin enough is one of the targets in the packaging technology. Generally speaking, the wafer-level chip size packaging technology is not cut first, but is cut into individual IC packages after packaging. In addition, the design of the wafer I usually uses I / O pads on the peripheral part of the wafer. When the I / O guide is not suitable, it is not suitable to directly form the metal under the bump and the ball on the I / O pad. The typical I / O pad interval (port 11; (; 11) is only about 5 0 -8 0 // 111, such a gap, the ball must be small enough, for example, up to 40 μm in diameter. But there will be reliability Problem. One of the methods to solve the above problem is to use an etched metal layer to form a lead to connect the input and output pads to the internal position of the wafer. Crystal 503539 V. Description of the invention (2) Typical gaps of the input and output pads available in the internal position of the chip Above about 200%: This is more than enough for the height of the shuttlecock to provide sufficient reliability. For example, if the shuttlecock is directly connected or the shuttlecock (p0st) is formed first, then the shuttlecock is connected. ...!
I :一典型傳統晶圓階段晶片大小封裝技術，||參考圖— 丨所不的橫截面示意圖。這種結構已廣為FUJnsu(富士 OK I (橡樹）等日本電子公司所接 tb 1 η〆 :位置。輸出入墊2。經由金圖7:10係切割道的 j f )引線30V引至晶片較内側位置。引線3〇的另一 =鑛銅及鎳的錄球座35。引線3Q及錄球w : = 裝材料4°之中。…以露出 錄球5。'然後再以鑽石切割刀切割成_顆顆已: ^，的習知技術，由於整片晶圓以—次灌 物的方式，將封震材料直接形成於晶圓上以覆蓋$ ^化合 跡，若 '晶片厚度不足將導致晶圓的蹺曲（wa =屬轨 為劃和封裝材料的熱膨脹係數具有相二題。這 ，、’匕。為降低蹺曲，有兩個解決的方案，—田王度的差 丨太薄至少要有500" m,另一個方宰是降低封圓不可以 :度。 疋降低封裳材料層的厚 I『過厚晶元^丨^及薄的封裝材料層將導 i表和印刷電路板連接時更大的應力產生。 曰曰片以鍚 ! k备厚度的封裝 503539 五、發明說明（3)I: A typical traditional wafer-level chip-size packaging technology, || Reference figure — 丨 cross-section diagram. This structure has been widely used by FUJnsu (Fuji OK I (Oak)) and other Japanese electronics companies tb 1 η〆: position. I / O pad 2. Lead 30V to the chip via the lead of 30V through the jf of 7:10 series scribe line in gold Inside position. The other of the lead 30 is a ball socket 35 of mineral copper and nickel. Lead 3Q and recording ball w: = 4 ° of material. … To reveal the shot 5. 'Then use the diamond cutting knife to cut into _ particles have been: ^, the conventional technology, because the entire wafer in a way of filling, the shock-absorbing material is directly formed on the wafer to cover the $ ^ chemical compound trace If the thickness of the wafer is insufficient, it will cause the wafer to warp (wa = belong to the rails and the thermal expansion coefficient of the packaging material has two problems. This, and 'dagger. To reduce the warp, there are two solutions,- The difference of Tian Wang degree 丨 It is too thin to have at least 500 " m, the other side is to reduce the sealing circle can not: degrees. 疋 reduce the thickness of the seal material layer I "too thick wafer ^ 丨 ^ and thin packaging material When the layer is connected to the printed circuit board and the printed circuit board, greater stress is generated. The film is thickened. The package with a thickness of 503539 is provided. 5. Description of the invention (3)
材料層有其必要性。這是因為矽基板的熱膨脹係數與金 鍚墊上PCB板子後熱膨脹係數（以下簡稱TCE)相差甚女、屬 如以矽基板為二，而PCB板之TCE約為十幾。在元件使用 丨時，或者一開一關之間會使得元件溫度升高，而在兩者 |間產生熱應力，而導致元件的内連線斷路。適當厚声从之 丨裝材料層有如缓衝層。上述薄封裝材料層意謂著緩衝 厚度減少。因此可靠度便會因而降低。 J 有鏗於如上所述’本發明將提供一種可以提供足夠^ 度之封裝材料層又可防止晶圓蹺曲問題之方法。 η"1" 發明目的及概述： 耒發明之目的係提供足夠高度之缓衝層以降低 及P C B板之熱膨脹係數差異性所造成之應力，又-土 圓蹺曲問題之方法。 〜 σ防止晶 | i 本發明揭/露一種晶圓階段晶片大小封裝方 :光阻膜和液態光阻膜之不同特性，使乾光阻膜圖= f 丨置。2 液態光阻層填補切割道位 |再用印刷方式將封裝材料覆蓋在晶片上，、 丨：座以電鍍完成，及去乾光阻膜後，切割道位=’在: 丨光阻層。因此，封裝置邊下液麵 七φϊ u τ表材枓層不是整片晶圓完全霜箠二e 切割道位置沒有封裝材料声。 晃農’而穴 : w村層由於封裝材料層係分立的， 503539 五、發明說明（4) 而非整片，因此，即使夠厚的封 力也可以被解消而避免了晶片繞做為緩衝層’應 複數=首先，提供-晶圓，晶圓含* 積體電路製程至護層形成，旅 稞路輸出入墊’以呈存封裝階段；㈣，形成 於 ^晶圓之護層上；再形成一乾光阻膜圖案層於金屬層上， 丨乾光阻膜圖案層具有裸露切割道及鍚球連接之預定位置之 I開口；隨後，再形成一液體光阻層以填補該乾光阻膜圖案 層之開口；並以微影製程以使該鍚球連接之預定位置再次 裸露。 — ;緊接著，再施以電鍍製程，用以在鍚球連接之預定位置沉 |積一導體層；在去除原來之乾光阻膜圖案後，再以微影及 I麵刻技術蝕刻金屬層，用以形成金屬導線；待去乾光阻膜 丨之後’再灌入封裝材料層該晶圓上；待回蝕刻以露出鍚球 座之導體層後；再去除該液體光阻層以裸露該切割道位 置丨隨後蝕刻切割道位置上的金屬層；最後，將 於該導體層上。 两衣連接 發明詳細說明：The material layer has its necessity. This is because the thermal expansion coefficient of the silicon substrate is very different from the thermal expansion coefficient (hereinafter referred to as TCE) of the PCB after the gold pad is on the silicon substrate, and the TCE of the PCB is about a dozen. When the component is used, or the temperature of the component rises when it is turned on and off, thermal stress is generated between the two and the internal wiring of the component is disconnected. Appropriately thick sound from which the material layer is like a buffer layer. The above-mentioned thin encapsulating material layer means that the buffer thickness is reduced. As a result, reliability is reduced. J. As mentioned above, the present invention will provide a method that can provide a sufficient layer of packaging material and prevent wafer skew problems. η " 1 " Purpose and summary of the invention: 耒 The purpose of the invention is to provide a buffer layer of sufficient height to reduce the stress caused by the difference in thermal expansion coefficient of the PC board, and the method of soil rocking. ~ ΣPrevention of crystal | i The present invention discloses / exposes a wafer-size chip packaging method: the different characteristics of a photoresist film and a liquid photoresist film, so that the dry photoresist film diagram = f 丨 is set. 2 The liquid photoresist layer fills the cutting path | Then the packaging material is covered on the wafer by printing. After the photoresist film has been dried, the cutting path position = 'in: 丨 photoresist layer. Therefore, the surface of the sealing device under the liquid surface φϊ u τ surface layer is not the entire wafer completely frosted. The position of the dicing track has no sound of packaging material. "Huang Nong's hole": The village layer is separated because of the encapsulation material layer. 503539 V. Description of the invention (4) instead of the whole piece, so even the sealing force can be eliminated enough to avoid the wafer winding as a buffer layer 'Shall be plural = first, provide-wafers, wafers with * integrated circuit manufacturing process to the formation of the protective layer, and the circuit input and output pads' to present the packaging stage; ㈣, formed on the protective layer of the wafer; A dry photoresist film pattern layer is formed on the metal layer, and the dry photoresist film pattern layer has an I opening at a predetermined position where the exposed cutting path and the ball are connected; then, a liquid photoresist layer is formed to fill the dry photoresist film. The opening of the pattern layer; and a lithography process is performed to expose the predetermined position where the ball is connected again. —; Next, an electroplating process is applied to deposit a conductive layer at a predetermined position of the ball connection; after removing the original dry photoresist film pattern, the metal layer is etched by lithography and I surface engraving technology To form a metal wire; after the photoresist film has been dried, it is then poured into the packaging material layer on the wafer; it is etched back to expose the conductive layer of the ball seat; Cutting track position 丨 The metal layer at the cutting track position is then etched; finally, it will be on the conductor layer. Connection between two garments
有鑑於傳統方法，若不是緩衝層夠厚時，晶片I 曲問題，便是緩衝層太薄造成可靠度的問題。:疏9有殯 4梟明的方 503539 i五、發明說明（5) ^ I . |法’可以解決上述的問題。 丨 本發明之方法，和發明背景最大的不同點也是本發明 丨解f上述問題的關鍵所在係封裝材料層（即上述的缓衝層） 不疋整片晶圓完全覆蓋，而是切割道位置沒有封裝材料 層°因此’即使夠厚的緩衝層，應力也可以被解消。 ί 首先’請參考圖二的橫截面示意圖，圖中示一晶圓的 其中一晶片，且晶片1〇〇已完成積體電路製程（未圖示）至 護層11 0形成，並裸露輸出入墊1 2 〇及切割道1 3 〇。接著， 如圖三所示，形成一金屬層u〇於晶圓之護層11〇上。隨拳 丨後’請參考圖三，披覆一乾光阻膜15 〇於金屬層上，經過 微影照光及顯影後，裸露出預定之鍚球座（p〇st)l6〇位置 及切割道1 3 0位置。 請參考圖四，接著，再以印刷方式披覆一層液態光阻 層1 7 0以填補乾光阻膜圖案i 5 〇的開口處。隨後，利^液鹱 光阻層170和乾光阻膜不同的顯影特性，再次顯影以再次〇 裸露出錄球座（p〇st)16〇的位置。， 請參考圖五所示的橫載面示意圖。接著，再利用 _ :方法，將導體層160a、160b先後鍍在鍚球座16〇的位置。，又 |例如金160珈鎳l6〇b等導體層等，或者鎳和銅等均可以。 |待電鍍完成後，請參考圖六，去除乾光阻膜15〇而留下鍚In view of the traditional method, if the buffer layer is not thick enough, the problem of wafer I curvature is the reliability problem caused by too thin buffer layer. : Shu 9 You 殡 4 枭 Ming Fang 503539 i V. Description of the invention (5) ^ I. | Method 'can solve the above problem.丨 The method of the present invention and the biggest difference from the background of the invention are also the present invention 丨 The key to solving the above problems lies in the packaging material layer (ie, the above buffer layer). The entire wafer is not completely covered, but the position of the scribe line There is no layer of encapsulation material, so 'even with a thick buffer layer, stress can be relieved. ί First, please refer to the cross-sectional schematic diagram of FIG. 2, which shows one of the wafers, and the wafer 100 has completed the integrated circuit process (not shown) to the formation of the protective layer 110, and exposed the input and output. The pad 1 2 0 and the cutting track 1 3 0. Next, as shown in FIG. 3, a metal layer u0 is formed on the protective layer 11o of the wafer. Follow the fist, please refer to Figure 3. Cover a dry photoresist film 15 o on the metal layer. After lithography and development, expose the predetermined position of the ball (p0st) 160 and the cutting path 1 3 0 position. Please refer to FIG. 4. Then, a liquid photoresist layer 170 is coated on the printing method to fill the openings of the dry photoresist film pattern i 50. Subsequently, the development characteristics of the photoresist layer 170 and the dry photoresist film are different, and the development is performed again to expose the position of the ball socket (p0st) 16o again. Please refer to the schematic diagram of the cross section shown in Figure 5. Next, using the _: method, the conductor layers 160a and 160b are plated in the position of the ball socket 160. , And for example, conductive layers such as gold 160 nickel 160b, or nickel and copper can be. | After the plating is completed, please refer to Figure 6, remove the dry photoresist film 15 and leave 钖
第8頁 503539 ;五、發明說明（6) 丨球座16 0位置上的導體圖案層160a、160b及切割道130位置 上的液態光阻圖案1 7 0。 隨之’以微影技術定義金屬轨跡層（trace iayer)4 稱引線層180。經過蝕刻後，留下引線層18〇、鍚球座 160。結果如圖七所示。 請參考圖八所示的橫截面示意圖。接著，將封裝材料 1 9 0 ’以印刷方式塗佈在上述結果之晶圓上，再以回蝕刻 以露出鍚球座1 6 〇的上表面。隨後，去除液態光阻材料層 1 7 0以露出切割道1 3 0，最後，再去除切割道1 3 0上的金屬 _ 層’及以網印方式接上鍚球2 0 0於鍚球座上。例如，利用 刮刀將鍚膏經由網目（或遮罩）刮過之後沾粘於鍚球座，再 以習知技術自切割道1 3 〇分割成一片片的！ 裝體。 本發明以較佳實施例說明如上，而熟悉此領域技藝 者’在不脫離本發明之精神範圍内，當可作些許更動潤 飾’其專利保護範圍更當視後附之申請專利範圍及其等同 領域而定。 馨 503539 圖式簡單說明 本發明的較佳實施例將於下列之說明文字中輔以下列 圖形做更詳細的闡述： ί 圖一顯示依據傳統階段晶片大小封裝方法，封裝材料 :層係整片晶圓都被覆蓋。 Ι 圖二顯示依據本發明之方法，形成一金屬層於晶圓之 I護層上的截面示意圖。 fPage 8 503539; V. Description of the invention (6) 丨 The conductive pattern layers 160a, 160b at the position 160 of the ball seat and the liquid photoresist pattern 170 at the position 130 of the cutting track. Following this, the metal trace iayer 4 is defined by the lithography technique 4 and is called the lead layer 180. After the etching, the lead layer 180 and the ball socket 160 remain. The results are shown in Figure 7. Please refer to the schematic diagram of the cross section shown in Figure 8. Next, the encapsulating material 19 0 ′ was coated on the wafer with the above result by printing, and then etched back to expose the upper surface of the ball socket 160. Subsequently, the liquid photoresist material layer 170 is removed to expose the cutting track 130, and finally, the metal layer on the cutting track 130 is removed, and the ball 2 0 0 is connected to the ball seat by screen printing. on. For example, using a spatula to scrape the cream through the mesh (or mask) and stick it to the ball tee, and then divide it into slices from the cutting path 1 30 using conventional techniques! Body. The present invention is described above with reference to the preferred embodiments, and those skilled in the art will be able to make some changes and modifications without departing from the spirit of the present invention. Field-specific. Xin 503539 Schematic illustration of the preferred embodiment of the present invention will be described in more detail in the following explanatory text supplemented by the following graphics: ί Figure 1 shows the traditional stage chip size packaging method, packaging material: layered whole wafer The circles are covered. I FIG. 2 is a schematic cross-sectional view of a method for forming a metal layer on an I protective layer of a wafer according to the method of the present invention. f
I 丨 圖三顯示依據本發明之方法，形成一乾光阻膜圖案層 於金屬層上的截面示意圖。 圖四顯示依據本發明之方法，形成一液態光阻圖案於 乾光阻膜圖案層開口 ，再顯影以留下鍚球座位置開口之橫I 截面示意_ 。 ▼ 圖五顯示依據本發明之方法，在鍚球座位置開口鑣上 金和鎳之橫截面示意圖。 圖六顯示依據本發明之方法，去除乾光阻膜圖案層的 橫截面示意圖。 圖七顯示依據本發明之方法，形成引線後的橫截面示 ;意圖。 I 圖八顯示依據本發明之方法，印刷上封裝材料後再去 除液態光阻圖案後以裸露切割道的橫截面示意圖。 ' 圖九顯示依據本發明之方法，先蝕刻切割道的金屬層 後，再接上鍚球的橫截面示意圆。 i圖號對照表： 第10頁 503539 圖式簡單說明 i切割道的位置 10 丨引線 30 封裝材料 40 輸出入墊 120 金屬層 140 鍚球座 160 i液態光阻層 170 封裝材料 190 輸出入墊 20 鍚球座 35 鍚球 50 切割道 130 乾光阻膜 150 導體圖案層160a、 160b 引線層 180I 丨 FIG. 3 shows a schematic cross-sectional view of forming a dry photoresist film pattern layer on a metal layer according to the method of the present invention. Fig. 4 shows a schematic cross-section of a liquid photoresist pattern formed at the opening of the dry photoresist film pattern layer according to the method of the present invention, and then developed to leave the ball seat position opening. ▼ Figure 5 shows a schematic cross-sectional view of gold and nickel on the tee opening at the tee position according to the method of the present invention. FIG. 6 is a schematic cross-sectional view of the method for removing the dry photoresist film pattern layer according to the method of the present invention. Figure 7 shows a cross-sectional view after forming a lead according to the method of the present invention; I FIG. 8 shows a schematic cross-sectional view of a bare cutting track after the encapsulation material is printed and then the liquid photoresist pattern is removed after printing. Figure 9 shows a schematic cross-section of a ball according to the method of the present invention, after the metal layer of the scribe line is etched, and then the ball is connected. I chart number comparison table: Page 10 503539 The diagram simply explains the position of the i cutting path 10 丨 Lead 30 Encapsulation material 40 I / O pad 120 Metal layer 140 Spherical ball seat 160 i Liquid photoresist layer 170 Packaging material 190 I / O pad 20钖 球 座 35 钖 球 50 Cutting line 130 Dry photoresist film 150 Conductor pattern layer 160a, 160b Lead layer 180