TW503318B - Apparatus and method for advance electric utility meter - Google Patents
Apparatus and method for advance electric utility meter Download PDFInfo
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Description
503318 五、發明說明(1) 本發明係有關於一種可嚇阻竊電及免人工抄表之電力 表其方法與裝置,可有效偵測電力被竊,且可將偵測到電 力被竊的資料回送至電力供應公司,尤其是用以偵測使用 旁通線及強力電磁場感應之竊電方法。 大多數的電力公司都會面臨兩種難處,一種難處是對 於被竊電的問題,另一種則是對於人工抄表的成本及實施 不易等問題;而其中關於電力被竊的問題,大致上來說有 兩種方法被廣泛的使用,一種是修改電力表的内部電路; 另一種則是在電力表外並聯一旁通線路,使該電力表無法 有效的紀錄使用過的電力值;還有一種較少使用的方法, 則是在電力表外部運用一強力電磁場感應,間接影響電力 表之電力值紀錄。然而,對於現今一些設計較佳之電力表 裝置,修改其内部電路的方式已不再可能實施,故可針對 在電力表外並聯一旁通線路及在電力表外部運用一強力電 磁場感應之方法研究一解決辦法;但,事實上現行電力供 應公司並無有效防止其竊電之方法。 因此,如何針對上述習用電力表裝置所發生的問題提 出一種新穎尤解決方法,不僅可偵測出電力被竊之情狀, 且可將電力被竊之資料回送至電力供應公司,尤其是用以 偵測使用旁通線及強力電磁場感應之竊電方法,長久以來 一直是使用者殷切盼望及本發明人欲行解決之困難點所在 ,而本發明人基於多年從事於相關產品的相關研究、開 發、及銷售之實務經驗,乃思及改良之意念,窮其個人之 專業知識,經多方設計、探討,並經無數次試作樣品及改503318 V. Description of the invention (1) The present invention relates to a power meter which can deter theft of electricity and avoid manual meter reading. The method and device can effectively detect the theft of electricity, and can detect the theft of electricity. The data is sent back to the power supply company, especially to detect power theft methods using bypass lines and strong electromagnetic field induction. Most power companies will face two difficulties, one is the problem of stolen electricity, and the other is the cost and manual implementation of manual meter reading. Among them, the problem of theft of electricity is generally Two methods are widely used, one is to modify the internal circuit of the power meter; the other is to parallel a bypass line outside the power meter, making the power meter unable to effectively record the used power value; and one is less used The method is to use a strong electromagnetic field induction outside the power meter, which indirectly affects the power value record of the power meter. However, for some of the better-designed power meter devices today, it is no longer possible to modify the internal circuit. Therefore, a solution can be studied for a method of paralleling a bypass line outside the power meter and applying a strong electromagnetic field induction outside the power meter. Method; however, in fact, the existing power supply companies do not have effective methods to prevent their power theft. Therefore, how to propose a novel and special solution to the problem of the conventional power meter device, not only can detect the situation of power theft, but also can return the information of the power theft to the power supply company, especially for the purpose of detecting The use of bypass lines and strong electromagnetic field induction to steal electricity has long been a user ’s long-awaited problem and the inventor wants to solve the problem. The inventor has been engaged in related research, development, The practical experience of sales and sales is the idea of thinking and improvement. It has poor personal expertise and has been designed and discussed by many parties. It has also been tested and sampled numerous times.
第7頁 ^03318 五、發明說明(2) 良後,終於研究出一種組,以解決上 本發明之主要目的,在於提供一箱=問碭。菱是, 工抄表之電力表其方法與裝偵嚇阻竊電及免人 供應公司。 狀且將電力被竊之資料回送至電力 本發明之次要目的,在於提供一 工抄表之雷力砉t k 、 /、 可嚇阻竊電及免人 ❼表之電力表其方法與裝置,其可 兄 電力表中,以將其本期使用之雷力僧月=Ic紀錄卡插入§亥 ,用戶在馮此至電力徂_ \ 電力使用狀況登錄 免人:;:目i 應公司相關櫃檯繳…,以達到 功饮Κϊ一 ΐί if員對本發明之結構特徵及所達成之 fί;: 認識,僅佐以較佳之實施例圖及 配a洋細之說明,說明如後: 首先’請參閱第1圖,為本發明一較佳實施例示意方 塊圖;如圖所#,其係為單相電力表10方塊圖,而其中電 力系統電路1 822為提供電力以供該電力表1〇内裝置之電子 零件運作;電力表測量電路181〇,則包括有一電流元件 1811、一電壓元件181 4及一電力計算電路ι816,其中該電 流元件1811為用以測量電力表1〇活線輸入端(Hve } ine i η 1 et) 1 4 1及活線輸出端(1 i ve 1 i ne 〇u11 et) 1 42之負栽 電流1 5 4 ’而該電壓元件i 8丨4則用以測量活線輸入端i 4 地線輸入端(neutral line iniet) m之供給電壓值;又 ’即時電力之計算值則被傳送至主控制器1 8 5 〇,再顯示於 液晶顯示面板1 8 2 0上,但若偵測到主配電柵(ma i ηPage 7 ^ 03318 V. Description of the invention (2) After a good study, a group was finally developed to solve the main purpose of the present invention, which is to provide a box = question. Ling is the power meter of the work meter and its method and equipment to deter the theft of electricity and prevent the company from being supplied. The secondary purpose of the present invention is to provide a thunder force tk of a meter reading, a method and a device for a power meter that can deter theft of electricity and prevent the meter from being stolen. In his brother ’s electricity meter, insert the Lei Li Monk Month = Ic record card used in this period into §HAI, and the user can log in to the exemption at Feng Zhizhi Power 徂 _ \ Power usage status :: 目 I should be at the company's relevant counter Pay ... in order to achieve the power drink Κϊ 一 ΐί If the staff understands the structural features of the present invention and the achieved f; :: Recognize, only with the preferred embodiment diagram and a detailed explanation, the description is as follows: First, 'Please refer to FIG. 1 is a schematic block diagram of a preferred embodiment of the present invention; as shown in the drawing, it is a block diagram of a single-phase power meter 10, and a power system circuit 1 822 is used to provide power for the power meter 10. The electronic components of the device operate; the power meter measurement circuit 1810 includes a current element 1811, a voltage element 1814, and a power calculation circuit ι816, where the current element 1811 is used to measure the input terminal of the power meter 10 live line ( Hve} ine i η 1 et) 1 4 1 and live The output terminal (1 i ve 1 i ne 〇u11 et) 1 42 has a load current of 1 5 4 ', and the voltage element i 8 丨 4 is used to measure the live line input terminal i 4 ground line input terminal (neutral line iniet) m's supply voltage value; and 'the calculated value of real-time power is transmitted to the main controller 1850, and then displayed on the liquid crystal display panel 1820, but if the main distribution grid (ma i η is detected
第8頁 503318 五、發明說明(3) distribution grid)失敗時,則先前計算之電力值便會 儲存於非易失記憶體1 6 〇,然後其電力表裝置丨〇之測量消 費部分則可將偵測到竊電的資訊傳回至電力供應公司。 而债測竊電的第1種方法為使用旁通線偵測器丨8 3 〇偵 測使用旁通線3 0竊電;故若使用旁通線3 〇竊電時 ’則旁通線偵測電路丨8 3 〇則會透過主控制器1 8 5 〇增加非易 失記憶體1 6 0中偵測旁通線記數器1 6 2之記數值。 另’偵測竊電的第2種方法為使用外部電磁場偵測電 路1 840彳貞測外部強力電磁32干擾;故若使用強力電磁32感 應竊電時’則外部電磁場偵測電路1 8 4 〇則會透過主控制器 1 8 5 0增加非易失記憶體1 6 〇中偵測電磁場記數器1 6 4之記數 值。 最後’當需繳交當期電費前,可使用IC紀錄卡20插入 電力表裝置1 0之I C卡讀卡器1 2 0插槽中,以將當期之需繳 電費及使用電能之資訊登錄於I C紀錄卡中,於電力供應公 司繳交電費時,再將該需繳電費及使用電能之資訊轉登錄 於電力供應公司之中央電腦内,並依此繳交電費,而其中 該使用電能之資訊包括有偵測捣毀記數器1 6 1紀錄、偵測 旁通線路記數器1 6 2紀錄、偵測電磁場記數器1 6 4紀錄、電 力表序號1 6 6及電力測量紀錄1 6 8。 再者,請參閱第2圖,為本發明一較佳實施例之電力 供給運作示意圖;如圖所示,為電力供給電路與其他電子 電路之連接,交流電流(AC)由活線輸入端1 4 1及地線輸入 端1 4 3經過τ 1變壓器1 8 2 4降壓,再經由B1橋氏整流器將其Page 8 503318 V. Description of the invention (3) The distribution grid) fails, the previously calculated power value will be stored in the non-volatile memory 16 〇, and then the measurement and consumption part of its power meter device 丨 〇 can be Information that the theft was detected was sent back to the power supply company. The first method of debt theft test is to use a bypass line detector 丨 8 3 〇 to detect the use of bypass line 30 to steal electricity; therefore, if the bypass line 30 is used to steal electricity, then bypass line detection The test circuit 丨 8 〇 will increase the value of the detection of the bypass line counter 16 2 in the non-volatile memory 160 through the main controller 18 5 〇. Another 'the second method to detect power theft is to use an external electromagnetic field detection circuit 1 840 to measure external strong electromagnetic 32 interference; therefore, if a strong electromagnetic 32 is used to induce power theft, then the external electromagnetic field detection circuit 1 8 4 〇 The value of the electromagnetic field register 16 in the non-volatile memory 16 will be increased through the main controller 1850. Finally, before paying the current electricity bill, you can use the IC record card 20 to insert into the IC card reader 12 slot of the power meter device 10 to register the current electricity bill and electricity usage information. In the IC record card, when the power supply company pays the electricity bill, the information of the electricity bill to be paid and the use of electricity is registered in the central computer of the electricity supply company, and the electricity bill is paid accordingly. The information includes a detection and destruction counter 1 6 1 record, a detection bypass line counter 1 6 2 record, a detection electromagnetic field counter 1 6 4 record, a power meter serial number 1 6 6 and a power measurement record 1 6 8. Moreover, please refer to FIG. 2, which is a schematic diagram of the power supply operation of a preferred embodiment of the present invention; as shown in the figure, for the connection of the power supply circuit and other electronic circuits, the alternating current (AC) is provided by the live line input terminal 1 4 1 and ground line input 1 4 3 are stepped down by τ 1 transformer 1 8 2 4 and then reduced by B1 bridge rectifier.
五、發明說明(4)V. Description of the invention (4)
,^ ^直流電流(DC);而D1二極體則用以隔離vu端點電 mc/電容,一般而言ei電容值通常較大,約為i〇uF 田有衫響或干擾電力表之正常運作時,其為可 ?6$内電壓二主控制器1 85 0,以將其資料存於非易失記憶體 16〇内,再者,ici電壓調節器為使其經由C1電容濾波之直 1電壓穩,,持在5伏特,同樣地,IC2電壓調節器則使其 經由C2電容高頻濾波之直流電壓穩定維持在2伏特,而該2 伏特係為其參考電壓,用以電流及電壓測量之直流參 準。 冰 ^ 明參考苐3圖’為本發明一較佳實施例之電力計 算不思,方塊圖;如圖所示,訊號經由CT1電流變壓器ι812 至BF 1緩衝電路i 8丨3調節訊號,再至I㈡類比數位轉換器( ADC);另訊號亦經由ρτι電位變壓器1814至心2緩衝電路 181 5調節訊號’再至Ic3類比數位轉換器(adc);而其中 該兩緩衝電路為可防止輸入類比數位轉換器(aDC) iC3& IC4之訊號產生過衝及下沖負尖峰現象(under shoot),另 ’ IC5數位信號處理器(Dsp)則從類比數位轉換器(ADC) I C 3及I C 4内之資料取樣用以計算即時電力之測量,而該即 時電力之測量係為將各取樣值加總在反應於電力表之總消 耗電量中。 請參考第4圖,為本發明一較佳實施例之緩衝電路示 意圖;如圖所示,其為連接CT1電流變壓器181 2及PT1電位 變壓器1814之緩衝電路BF1及BF2,而電阻R1為CR1電流變 壓器1812及PT1電位變壓器1814之負載,另電阻R2及R3則^ ^ Direct current (DC); and D1 diode is used to isolate the Vu terminal electrical mc / capacitor. Generally speaking, the ei capacitance is usually larger, which is about i〇uF In normal operation, it is the main voltage controller 6800 which can store the internal voltage of 6 $ to store its data in the non-volatile memory 160. Furthermore, the ICi voltage regulator is used to filter it through the C1 capacitor. Until the voltage is stable, it is maintained at 5 volts. Similarly, the IC2 voltage regulator keeps the DC voltage filtered by the C2 capacitor high-frequency stable at 2 volts, and the 2 volts is its reference voltage for current and DC reference for voltage measurement. Bing ^ Ming refer to Figure 3 is a block diagram of the power calculation of a preferred embodiment of the present invention; as shown in the figure, the signal is adjusted by the CT1 current transformer 812 to the BF 1 buffer circuit i 8 丨 3, and then I㈡ Analog Digital Converter (ADC); the signal is also adjusted by the ρτι potential transformer 1814 to the heart 2 buffer circuit 1815 and then to the Ic3 analog digital converter (adc); and the two buffer circuits are used to prevent input analog digital The converter (aDC) iC3 & IC4 signal produces overshoot and undershoot negative shoot (under shoot), and the IC5 digital signal processor (Dsp) is from the analog digital converter (ADC) IC 3 and IC 4 The data sampling is used to calculate the real-time power measurement, and the real-time power measurement is to add the sampled values to the total power consumption reflected in the power meter. Please refer to FIG. 4 for a schematic diagram of a buffer circuit according to a preferred embodiment of the present invention. As shown, it is a buffer circuit BF1 and BF2 connected to a CT1 current transformer 1812 and a PT1 potential transformer 1814, and a resistor R1 is a CR1 current The load of transformer 1812 and PT1 potential transformer 1814, and the resistance of R2 and R3 are
第10頁 503318Page 10 503318
五、發明說明(5) 為可設定該緩衝電路之反向增益;事實上,該兩缓衝器並 不像電流元件1811及電壓元件1814為可用以測其值 ,其係為運用I C 6反向運算放大器,以阶u认 、 丨方止輪入類比數位 轉換器(ADC) IC3及IC4之訊號產生過衝菸π、丄 ^ ^ (under shoot) w <两及下沖負尖峰現象 請參閱第5圖,為本發明一較佳實雜办丨+立 ^ b , ^ ^ ^汽她例之旁通線偵測 器示意方塊圖;如圖所示,其係為使用留祕⑴ ^ , π早線型之旁通線偵 1831,又電流變壓器1 832、測試電流玫大電路(1) 1 835及 測試電流調節電路(1) 1 836為用以偵測測試電流ι5〇並可 測電路’即在結構上’只採用一穿過電流變壓器1 833之電 、流感測線140 ;而當未並聯一旁通,線3〇時,測試電流電路 1831所產生的交流電流150則會經由Α測試電流線183“、 電流感測線1 40及B測試電流線1 834b再回至測,式電流電路 確說、该旁通線彳貞測線電路1 8 3 0是否運作正常,且當電流變 壓器1 8 3 2短路或開路時’則可將卻認為不正常之測試電流 1 5 0訊號傳至主控制器1 8 5 0並增加偵測搗毀記數器1 6丨之記 數值;而測試電流1 5 2則可經由電流變壓器1 8 3 3感應並經 由測試電流差動放大電路(2 ) 1 8 3 7及測試電流調節電路(2 ) 1 8 3 8測試其是否有變異。 又,若該測試電流1 5 0及1 5 2有任何變異的話,則會觸 動一訊息至主控制器1 8 5 0,即為告知增加有一旁通線3 〇 ; 在無旁通線3 0時,測試電流1 5 0會全數流過電流感測線1 4 0 ,即為該測試電流1 5 0等於電流感測線1 4 〇上之測試電流 1 5 2,且因兩測試電流方向相反,故可相互抵消其影響磁V. Description of the invention (5) The reverse gain of the snubber circuit can be set; in fact, the two snubbers are not as useful as the current element 1811 and the voltage element 1814 to measure their values. To the operational amplifier, the signals of the analog digital converter (ADC) IC3 and IC4 are used to generate overshoot π, π ^ (under shoot) w < two and undershoot negative spikes. Refer to FIG. 5, which is a schematic diagram of a bypass line detector of a preferred embodiment of the present invention ++ ^ ^ b, ^ ^ ^; as shown in the figure, it is used to keep secrets ^ , π early line type bypass line detection 1831, and current transformer 1 832, test current rose circuit (1) 1 835 and test current adjustment circuit (1) 1 836 are used to detect the test current ι50 and the testable circuit 'That is to say in the structure', only an electric current passing through the current transformer 1 833 and the flu test line 140 are used; when no bypass is connected in parallel with the line 30, the AC current 150 generated by the test current circuit 1831 passes the test current A Line 183 ", current sensing line 1 40 and B test current line 1 834b. Ascertain whether the bypass line 1 8 3 0 works normally, and when the current transformer 1 8 3 2 is short-circuited or open-circuited, the test current 1 5 0 signal that is considered abnormal can be transmitted to the main control. 1 8 5 0 and increase the value of the detection and destruction register 16 6; and the test current 1 5 2 can be induced by the current transformer 1 8 3 3 and passed through the test current differential amplifier circuit (2) 1 8 3 7 and the test current adjustment circuit (2) 1 8 3 8 to test whether there is any variation. In addition, if there is any variation in the test currents 1 50 and 15 2, it will trigger a message to the main controller 1 8 5 0 In order to inform that a bypass line 3 is added; when there is no bypass line 30, the test current 150 will flow through the current sensing line 1 4 0, that is, the test current 1 50 is equal to the current sensing line 1 The test current on 4 〇 1 5 2 and the two test currents have opposite directions, so they can cancel each other ’s influence on the magnetic field.
503318 五、發明說明(6) 場;然而當增加有一旁通線3 0時’則依據電流分流原理’ 測試電流1 5 0部分流向旁通線3 〇 ’故測試電流1 5 2小於測试 電流1 5 0,如此便造成測試電流1 $ 2之變異’並間接影響其 兩測試電流原可相立抵消之磁場’而電流差動放大電路 (2) 1 8 3 7則會產生一非零振幅訊號以觸發電流調節電路 (2) 1 8 3 8,使其告知主控制器1 8 5 0增加有一旁通線。 請參閱第6圖,為本發明一較佳實施例之測試電流產 生示意圖;如圖所示’其係為產生一固定振幅之測試電流 電路,首先,史密特觸發反向器(Schmitt Triggered Inverter) IC7E配合電阻R4及電容C4產生一震盪電路’再 使用一史密特觸發反向器I C 7 F為電流緩衝’使該小測試 電流經由電容C3及電阻R5流至A測試電流線1 834a 、電流 感測線140及B測試電流線1 834b,再接地;而電容C3係為 用以與直流元件隔離,電阻R5則為可用以設定該測試電流 之振幅。 請參閱第7圖,為本發明一較佳實施例之放大器電路 運作示意圖;如圖所示,其為顯示測試電流放大器電路 (1 ) 1 8 3 5,當測試電流1 5 0經由b測試電流線1 8 3 4 b至電流 變壓器183 2時,會產生感應一電磁場及一電位勢,而電阻 R6則為其負載阻抗;電阻{^7及R8、電容(^及與運算放大 器Ϊ C 8 B形成一初階帶通濾波器,即當測試電流振幅非常小 時’此電路可允許其高增幅增益,又電阻”及^丨、電容C8 及C9與運算放大器IC8A則為第2階帶通濾波器,而該運算 放大器IC8A接腳1號之輸出訊號1 835a則為在測試放大電503318 V. Description of the invention (6) Field; however, when a bypass line 30 is added, 'the current is shunted according to the principle of current shunting'. The test current 1 50 partially flows to the bypass line 3 0 ', so the test current 15 2 is less than the test current. 1 5 0, thus causing a variation of the test current of 1 $ 2 'and indirectly affecting the magnetic field where the two test currents could have been canceled by each other' and the current differential amplifier circuit (2) 1 8 3 7 will produce a non-zero amplitude The signal triggers the current regulating circuit (2) 1 8 3 8 so that it informs the main controller 18 5 0 that a bypass line is added. Please refer to FIG. 6, which is a schematic diagram of test current generation according to a preferred embodiment of the present invention. As shown in the figure, it is a test current circuit with a fixed amplitude. First, a Schmitt Triggered Inverter ) IC7E cooperates with resistor R4 and capacitor C4 to generate an oscillating circuit 'using a Schmitt-triggered inverter IC 7 F as a current buffer' to make this small test current flow through capacitor C3 and resistor R5 to A test current line 1 834a, The current sensing line 140 and the B test current line 1 834b are then grounded; the capacitor C3 is used to isolate the DC component, and the resistor R5 is used to set the amplitude of the test current. Please refer to FIG. 7, which is a schematic diagram of the operation of an amplifier circuit according to a preferred embodiment of the present invention. As shown in the figure, it is a test current amplifier circuit (1) 1 8 3 5. Line 1 8 3 4 b to current transformer 183 2 will induce an electromagnetic field and a potential, and the resistance R6 will be its load impedance; the resistance {^ 7 and R8, the capacitance (^ and the operational amplifier Ϊ C 8 B Form a first-order band-pass filter, that is, when the test current amplitude is very small, 'this circuit can allow its high gain gain, and resistance' and ^ 丨, capacitors C8 and C9 and the operational amplifier IC8A are second-order band-pass filters , And the output signal 1 835a of pin 1 of the operational amplifier IC8A is used to test the amplified signal.
第12頁 503318 五、發明說明(7) 路(2)節點1 83 7a上用以偵測旁通線(請參閱第9圖所示 ),再者,電阻RIR卜電容C1&C1與運算放大器IC8D組 成為第3階帶通濾波器’連接節點1 836a (如第8圖所示 )° 又,在該電路中,電阻R1及R1與電容C5為用以提供運 算放大器IC8A、IC8B及IC8D之電壓供給,而電阻R1及R1則 可用以設定參考電壓位準Vrefl835c,為產生最小振幅之 測試電流。 請參閱第8圖,為本發明一較佳實施例之調節訊息圖 ;如圖所示,其係為測試電流訊息調節電路(1) 1 83 6,二 極體D2、電阻R1及R1與電容C1係為可將連接IC8D之接腳14 處節點之交流資料訊息整流成直流訊息,並利用運算放大 器I C 8 C與參考電壓位準Vrefl836 c比較,但一般而言,該 運算放大器IC8C之接腳1〇電壓高於其接腳9,故其IC8C之 接腳8,為高電位之輸出端,而二極體D3、電阻R1及R2與 電容C1則為過濾IC8CI妾腳8輸出之雜訊或假訊號。 另’其密特觸發反向器IC7^ IC7D為用以再調節電 壓,使之成為完整邏輯高電位,由IC7D之接腳8輸出;然 而,當提供有一主電力分配柵時,一交流電壓便會由節點 1 836b輸入’此時二極體μ及電容C1會將該交流電壓整流 成直流電壓’再經過電阻“及R2分壓,並導通電晶體; 而一旦電晶體Q1導通時,即會使光隔離器IC9產生運作, 且若當IC7D輸出端接腳8為邏輯高電位時,即會使iC9中之 發光二極體導通’接著再送出一低電位至主控制器185〇,Page 12 503318 V. Description of the invention (7) Road (2) Node 1 83 7a is used to detect the bypass line (see Figure 9), and the resistor RIR capacitor C1 & C1 and the operational amplifier The IC8D is composed of a third-order band-pass filter 'connection node 1 836a (as shown in Fig. 8). Also, in this circuit, the resistors R1 and R1 and the capacitor C5 are used to provide the operational amplifiers IC8A, IC8B, and IC8D. Voltage supply, and the resistors R1 and R1 can be used to set the reference voltage level Vrefl835c, in order to generate the test current with the smallest amplitude. Please refer to FIG. 8 for the adjustment message diagram of a preferred embodiment of the present invention; as shown, it is a test current message adjustment circuit (1) 1 83 6, diode D2, resistors R1 and R1 and capacitor C1 is used to rectify the AC data information of the node connected to pin 14 of IC8D into DC information, and compare it with the reference voltage level Vrefl836 c using the operational amplifier IC 8 C, but in general, the pin of the operational amplifier IC8C The voltage of 10 is higher than its pin 9. Therefore, its pin 8 of IC8C is a high-potential output terminal, while diode D3, resistors R1 and R2, and capacitor C1 are used to filter noise or output from IC8CI pin 8. False signal. In addition, its Mitte trigger inverter IC7 ^ IC7D is used to readjust the voltage to make it a complete logic high potential, which is output by pin 8 of IC7D; however, when a main power distribution grid is provided, an AC voltage will It will be input from node 1 836b 'At this time, the diode μ and the capacitor C1 will rectify the AC voltage into a DC voltage' and then pass through the resistor 'and R2 to divide the voltage and conduct the crystal; once the transistor Q1 is turned on, it will Enable the opto-isolator IC9 to operate, and if the IC7D output terminal pin 8 is at a logic high potential, it will cause the light-emitting diode in iC9 to be turned on, and then send a low potential to the main controller 185.
503318 五、發明說明(8) 告知其增加有某一旁通線;反之,若沒有該主配電柵時, 則該節點1 8 3 6 b之交流電壓亦會消失,接著該電晶體q以更 不再運作,但此時電晶體Q 2則會觸發導通,並使運算放大 器I C 7 B之接腳3節點放電,故該電路係為用以防止當主配 電栅有誤時,可能產生之電路運作失常。 然,若測試電流1 5 0有異變時,則不管短路或是開路 ,其節點1 8 3 6 a上都不會有交流訊息,而此時,;[c 8 c之接 腳10電壓便會低於其接腳9,故IC8C之輸出端接腳8為低電 位之輸出,且在一般的狀況下光隔離器9内之發光二極 體並不會運作,即會產生邏輯高電位至主控制器1 8 5 0,則 其係為偵測旁通線電路1 8 3 0運作失常。 請參閱第9圖,為本發明一較佳實施例之放大器電路 另一運作示意圖;如圖所示,其係為測試電流放大器電路 (2) 1 8 3 7 ’當測试電流1 5 2經由電流感測線1 4 0至電流變 壓器183 3時,會產生感應一電磁場及一電位勢,而電阻R2 則為其負載阻抗;電阻R 2及R 2、電容C1及C1與運算放大器 I C1 : B形成一初階帶通濾波器,其值與功能係與第7圖中之 電阻R7及R8、電容C6及C7與運算放大器IC8B-樣,而電阻 R2及R3、電容C1及C1與運算放大器ici : A則為第2階帶通濾 波器,其值與功能亦與第7圖中之電阻R9及1Π、電容C8及 C9與運算放大器IC8A—樣。 另,在該電路中,電阻R3及R 3與電容C1為用以提供運 算放大器IC1 : A、IC1 :B及IC1 :D之電壓供給,而電阻R3及 R3則可用以設定參考電壓位準Vref2 1 837c,為產生最大之503318 V. Description of the invention (8) It is informed that there is a bypass line added; on the contrary, if there is no main distribution grid, the AC voltage of the node 1 8 3 6 b will also disappear, and then the transistor q will be less Operation, but at this time transistor Q 2 will trigger conduction and discharge pin 3 of pin 7 of the operational amplifier IC 7 B. Therefore, this circuit is used to prevent the operation of the circuit that may occur when the main power distribution grid is wrong. Abnormal. However, if there is an abnormal change in the test current 150, there will be no AC message on its node 1 8 3 6 a regardless of short circuit or open circuit, and at this time, [c 8 c pin 10 voltage will It will be lower than its pin 9. Therefore, the output pin 8 of IC8C is a low-potential output, and under normal conditions, the light-emitting diode in the optical isolator 9 will not work, which will generate a logic high potential to The main controller 1850 is to detect the malfunction of the bypass line circuit 1830. Please refer to FIG. 9 for another operation diagram of the amplifier circuit according to a preferred embodiment of the present invention. As shown in the figure, it is a test current amplifier circuit (2) 1 8 3 7 'When the test current 1 5 2 passes When the current sensing line 1 40 to the current transformer 1833, an electromagnetic field and a potential are induced, and the resistance R2 is its load impedance; the resistances R 2 and R 2, the capacitors C1 and C1, and the operational amplifier I C1: B Form an initial-stage band-pass filter whose values and functions are the same as those of resistors R7 and R8, capacitors C6 and C7, and operational amplifier IC8B in Figure 7, while resistors R2 and R3, capacitors C1 and C1, and operational amplifier ici : A is the second-order band-pass filter, and its value and function are the same as the resistors R9 and 1Π, the capacitors C8 and C9 in Figure 7 and the operational amplifier IC8A. In addition, in this circuit, the resistors R3 and R 3 and the capacitor C1 are used to provide the voltage supply of the operational amplifiers IC1: A, IC1: B and IC1: D, and the resistors R3 and R3 can be used to set the reference voltage level Vref2 1 837c, in order to produce the largest
第14頁 503318 五、發明說明(9) 電位階,其係介於測試電流1 5 0振幅與測試電流1 5 2振幅之 間。 又,節點1 8 3 7 C則連接至節點1 8 3 8 C (請參閱第1 0圖所 示);而電阻R3、R3、R3及R3與運算放大器ici :D則形成 一電壓減法電路,其中電阻R 3之電阻值與r 3之電阻值一 樣’且電阻R3之電阻值亦與電阻R3之電阻值相等;當無旁 通線時,運算放大器I C1 : A之接腳1係與節點1 8 3 7 a上之電 壓值一樣,故運算放大器IC1 :D之輸出端接腳1 4 ( 1 837b) 上幾乎為一直流訊號,而當有一旁通線增加時,運算放大 器I C1 : A接腳1之電壓即不同於節點丨8 3 7a上之電壓值,故 運算放大器IC1 :D之輸出端接腳1 4 ( 1 837b)上則為一交流 訊號;最後,其中該節點1 8 3 7 b則連接至訊息調節電路節 點1 838a (請參閱第1〇圖所示)。 請參閱第1 0圖,為本發明一較佳實施例之另一調節訊 息示意圖;如圖所示,其係為測試電流訊息調節電路(2) 1 8 3 8,基本上,該調節電路(2)係與第8圖中所示之調節 電路(1) 一樣,唯其當無旁通線時,在運算放大器IC1:C 接腳10上節點1 838a之直流電壓低於節點1 838c上之參考 電壓位準,故其運算放大器IC1:D之接腳8會輸出一邏輯低 電位,而運算放大器I C1則會送一邏輯高電位至主控制器 1 8 5 0 ’為表示並無旁通線;然而若存在一旁通線時,則在 節點1 8 3 8 a上會有一較大振幅之交流訊息,故運算放大器 IC1:C接腳1〇之電壓值會高於節點1838 c上之參考電壓位準 ,且在運算放大器IC1:D之輸出端接腳8產生一邏輯高電位Page 14 503318 V. Description of the invention (9) The potential level is between the test current 150 amplitude and the test current 15 2 amplitude. In addition, node 1 8 3 7 C is connected to node 1 8 3 8 C (see Figure 10); and resistors R3, R3, R3, and R3 and the operational amplifier ici: D form a voltage subtraction circuit, The resistance value of the resistor R 3 is the same as the resistance value of r 3 ′ and the resistance value of the resistance R 3 is also equal to the resistance value of the resistance R 3; when there is no bypass line, the pin 1 of the operational amplifier I C1: A is connected to the node The voltage values of 1 8 3 7 a are the same, so the output terminal pin 1 4 (1 837b) of the operational amplifier IC1: D is almost a direct current signal, and when a bypass line is added, the operational amplifier I C1: A The voltage at pin 1 is different from the voltage at node 丨 8 3 7a, so the output terminal of operational amplifier IC1: D is an AC signal at pin 1 4 (1 837b). Finally, the node 1 8 3 7 b is connected to node 1 838a of the message conditioning circuit (see Figure 10). Please refer to FIG. 10, which is a schematic diagram of another adjustment message according to a preferred embodiment of the present invention. As shown in the figure, it is a test current message adjustment circuit (2) 1 8 3 8, basically, the adjustment circuit ( 2) It is the same as the regulating circuit (1) shown in Figure 8, except that when there is no bypass line, the DC voltage of node 1 838a on pin 10 of operational amplifier IC1: C is lower than the reference on node 1 838c Voltage level, so pin 8 of its operational amplifier IC1: D will output a logic low potential, and the operational amplifier I C1 will send a logic high potential to the main controller 1 8 5 0 'means there is no bypass line However, if there is a bypass line, there will be a larger amplitude AC message on node 1 8 3 8 a, so the voltage value of pin 10 of op amp IC1: C will be higher than the reference voltage on node 1838 c Level, and a logic high potential is generated at the output pin 8 of the operational amplifier IC1: D
第15頁 503318 五、發明說明(ίο) ,而運算放大器IC 1則會送一邏輯低電位至主控制器1850 ,為表示存在一旁通線。 請參閱第1 1圖,為本發明一較佳實施例之另一旁通線 偵測器示意方塊圖;如圖所示,其係為具雙線結構之旁通 線偵測電路1 8 3 0,即包括有一電流感測線1 4 0及一地線 (neutral line)穿過該電流變壓器1833,且除了其中該 地線外,其係與單線結構之旁通偵測電路相同;而在單線 型旁通線偵測電路1 8 3 0中,其測試電流1 5 2中尚包括有一 負載電流1 5 4,該電流易使電路的敏感性產生變化,故單 線型旁通線偵測電路易有負載電流雜訊;但,在雙線型旁 通線偵測電路中,流向電流感測線1 4 0之負載電流1 5 4與流 向地線之負載電流反向,故彼此可相互抵消,即具雙線結 構之旁通線偵測器可避免有負載電流雜訊之存在。 請參閱第1 2圖,為本發明一較佳實施例之又一旁通線 偵測器示意方塊圖;如圖所示,其係為具三線結構之旁通 線偵測電路1 8 3 0,即包括有一電流感測線1 4 0、一地線及 一測試電流線1 834b穿過該電流變壓器1 833 ;該三線型旁 通線偵測電路亦與雙線型旁通線偵測電路一樣,同樣都可 以避免負載電流雜訊,且當無旁通線存在時,其並無測試 電流1 5 2產生,即因流向線測試電流線1 8 3 4b之測試電流 1 5 0與流向電流感測線1 4 0之測試電流相互抵消的緣故;然 而當存在一旁通線3 0時,流向電流感測線1 4 0之測試電流 1 5 0小於流向線測試電流線1 8 3 4b之測試電流,故電流變 壓器1 8 3 3會產生一非零測試電流。Page 15 503318 5. Invention description (ίο), and the operational amplifier IC 1 will send a logic low potential to the main controller 1850 to indicate that there is a bypass line. Please refer to FIG. 11, which is a schematic block diagram of another bypass line detector according to a preferred embodiment of the present invention. As shown in the figure, it is a bypass line detection circuit with a dual-line structure 1 8 3 0 That is, it includes a current sensing line 140 and a neutral line passing through the current transformer 1833, and except for the ground line, it is the same as the bypass detection circuit of the single wire structure; and in the single wire type In the bypass line detection circuit 1 830, the test current 1 5 2 also includes a load current 1 5 4. This current easily changes the sensitivity of the circuit, so the single-line bypass line detection circuit is prone to Load current noise; however, in a two-wire bypass line detection circuit, the load current 1 5 4 flowing to the current sense line 1 4 0 is opposite to the load current flowing to the ground line, so they can cancel each other out, that is, The two-wire structure bypass line detector can avoid the presence of load current noise. Please refer to FIG. 12, which is a schematic block diagram of another bypass line detector according to a preferred embodiment of the present invention; as shown in the figure, it is a bypass line detection circuit with a three-wire structure 1 8 3 0, That is, it includes a current sensing line 140, a ground line and a test current line 1 834b passing through the current transformer 1 833. The three-wire bypass line detection circuit is also the same as the two-wire bypass line detection circuit. It is also possible to avoid load current noise, and when there is no bypass line, no test current 1 5 2 is generated, that is, the test current 1 8 3 4b and the flow direction current sense line are caused by the flow direction test current line 1 8 3 4b. The test current of 1 4 0 cancels each other; however, when there is a bypass line 30, the test current flowing to the current sensing line 1 40 is smaller than the test current of the flowing line test current line 1 8 3 4b, so the current The transformer 1 8 3 3 will generate a non-zero test current.
第16頁 503318 五、發明說明(π) 在該電路中,其用以偵測非零測試電流電路1 839即為 =試電流^大器電略⑴,且該訊息調節電路(1) _ ^專=該成心調卽電路(1) 1 836,而其不同處只在於其參 考電?位準,έ欠當無旁通線時,該電路會輪出一邏輯 輯低電位,並告知主控’則輸出-邏 ^ A 彳工制裔表不有一旁通線存在。 請參閱第1 3圖,為太菰b你鲁从 偵測感應器示意方塊::二:板佳例之外部電磁場 無負載電流發生時;::;;表電流變壓㈱1812 棚林路π成虛w ρ在電力表10裝置之外表面設有複數 且 f外磁%感應盗1 842用以感測其是否有 在變壓器1 824上設有一浐制磁妒鴻、目,丨哭,。%之干招" 無法擅改外部磁場相=❹感心18仏,以綠保其 偵測;$閱ΐ 3 ’為本發明一較佳實施例之外部電磁場 塊圖;如圖所示’所有外部磁場感測器 (嗜夫閱器1 842則接至電磁放大器電路1844 ’在電磁放大器電路184神設有兩 下:而若ϋ =設定ί所有感測之電磁皆在窗形限制 改之現象Γ 其電則貞測電路184◦有被擅 改之現象,反之,若磁場感應太多, 電磁場干擾之情形;另,電磁心調子二匕 知主控制器1 850其電磁偵測電路184〇正當(1) 1 846為。 節電路(2) 1 847為告知主控制器185〇其則而電磁訊息調 場干擾。 〃貞測到一外部電磁Page 16 503318 V. Description of the invention (π) In this circuit, it is used to detect a non-zero test current circuit 1 839 = test current ^ large device power slightly, and the message conditioning circuit (1) _ ^ Dedicated = the heart adjustment circuit (1) 1 836, but the difference lies only in its reference voltage? Level, when there is no bypass line, the circuit will roll out a logic low level and inform the master control ‘then output-logic ^ A 彳 work system does not have a bypass line. Please refer to Fig. 1 for the block diagram of the detection sensor for the 菰 blu 从 luo: :: the external electromagnetic field of the plate is a good example when no load current occurs :: ;; table current transformer ㈱ 1812 Penglin Road π A virtual w ρ is provided on the outer surface of the power meter 10 device with a plurality of f magnetic induction sensors 1 842 to sense whether it has a magnetically controlled magnet on the transformer 1 824. % Of dry tricks "Cannot tamper with the external magnetic field phase = ❹ 感 心 18 仏, green to ensure its detection; $ read ΐ 3 'is a block diagram of the external electromagnetic field of a preferred embodiment of the present invention; as shown in the figure' all External magnetic field sensor (1842 is connected to the electromagnetic amplifier circuit 1844 'The electromagnetic amplifier circuit 184 is provided two times: and if ϋ = set, all the sensed electromagnetic fields are changed in the window shape. Γ Its electrical measurement circuit 184◦ has been tampered with, otherwise, if the magnetic field is induced too much, the electromagnetic field will interfere; In addition, the electromagnetic heart tone 2 knows that the main controller 1 850 and its electromagnetic detection circuit 184〇 is legitimate ( 1) 1 846 is. The section circuit (2) 1 847 is to inform the main controller 185 0 that the electromagnetic message field interference.
五、發明說明(12) σ請參閱第1 5圖,為本發明〆較佳實施例之電磁場放大 器電路運作示意圖;如圖所系,其係為電磁場放大器電路 1844,該電路之運作其係與旁通線偵測放大器電路1 835相 似,而其主要不同點是該中央帶通濾波器被設定頻率為主 配電柵基頻,即因該大^數的電子頻率元件會與該主配電 拇基頻互干擾的緣故;該電路中,其電阻R4及R4、電容C2 及C 2與運算放大器I C 1 : Β為一主配電柵中心頻率初階帶通 濾波器,而電阻以及R4、電容C2及C2與運算放大器IC1 : A 為一主配電栅中心頻率之第2階帶通濾波器,又電阻R 3則 為其負載阻抗’電阻R4及R4與電容C2用以設定提供運算放 大器I C 1 : B及I C 1 : A之電源供應,另電阻R 4、R 4及R 4則用以 設定兩個窗形限制參考電壓位準,即EMFVref 1 ( 1 844b) 與 EMFVref2 ( 1 844c)。 再者’其所有電磁感測器感測到之電磁量係由運算放 大器I C1 : A之接腳1反應輸出;在一般的狀況下,該節點 1 844a上之訊號電壓係限制在一個窗形限制下,且該節點 分別連接至節點1 8 4 6 a及節點1 8 4 6 d (請參閱第1 β圖键 圖所示)。 久弟17 請參閱第1 6圖,為本發明一較佳實施例之又一 ' » 息示意圖;如圖所示,其係為顯示正常電磁偵測$即訊 之訊息調節電路,該電路之運作直係盥甸ή 〃 塔運作 丨ρ…w 一成息調節電 相似;當無偵測外部電磁干擾時,盆運笪*, w ^ 1836 τ 逆异放大器ICl 接腳1 2電壓高於其接腳1 3之電壓值,故及认, i ί · D之 人久輸出一邏 位至主控制器,以顯示該電磁偵測電路谨从 、辨低電 作正常;而若該V. Description of the invention (12) Please refer to FIG. 15 for the operation diagram of the electromagnetic field amplifier circuit of the preferred embodiment of the present invention; as shown in the figure, it is an electromagnetic field amplifier circuit 1844. The operation of this circuit is related to The bypass line detection amplifier circuit 1 835 is similar, but the main difference is that the central band-pass filter is set to the frequency of the main distribution grid, that is, the large number of electronic frequency components will be the same as the main distribution base. The reason is that the resistors R4 and R4, the capacitors C2 and C2, and the operational amplifier IC1 in the circuit are primary bandpass filters at the center frequency of the main distribution grid, and the resistor and R4, capacitor C2 and C2 and operational amplifier IC1: A is the second-order band-pass filter at the center frequency of the main power distribution grid, and resistor R3 is its load impedance, resistors R4 and R4 and capacitor C2 are used to set and provide the operational amplifier IC 1: B And IC 1: A power supply, and resistors R 4, R 4 and R 4 are used to set two window-shaped limit reference voltage levels, namely EMFVref 1 (1 844b) and EMFVref2 (1 844c). Furthermore, the electromagnetic quantities detected by all the electromagnetic sensors are output by the response of pin 1 of the operational amplifier I C1: A; under normal conditions, the signal voltage on this node 1 844a is limited to a window shape Restricted, and the node is connected to node 1 8 4 6 a and node 1 8 4 6 d (see the key diagram in Figure 1 β). Jiu Di 17 Please refer to FIG. 16 for a schematic diagram of another preferred embodiment of the present invention. As shown in the figure, it is a message adjustment circuit for displaying normal electromagnetic detection. The operation is directly related to the operation of the tower. The operation of the tower 丨 ρ ... w is similar to the regulation of electricity; when no external electromagnetic interference is detected, the basin is shipped *, w ^ 1836 τ inverse amplifier ICl pin 1 2 voltage is higher than its The voltage value of pin 1 3, and therefore recognizes that the person of i ί · D outputs a logic bit to the main controller for a long time, to show that the electromagnetic detection circuit is obedient, and low power is normal; and if the
第18頁 503318 五、發明說明(13) I電磁感測器與偵測電磁放大 ’則電路節點1 846a會存W路Λ 短路或開路時 |放大器IC1D接腳8輸出—邏輯二二:號並:二號會使運算 I 1 8 5 0該電磁偵測電路184〇已被擅改。 工制态 請參閱第1 7圖,為本發明一赖佳 息示意圖;如圖所示,豆俜A j又一調節訊 11二' ?4二目 Λ之運作係與㈣磁訊息調節電路 』π =:: ΐ 電磁干擾存在時,其運算放大 I使兮上之訊號電位階低於節‘點1 846e,故會 IC1:C輸出一邏輯高電位至主控制器185〇以顯是並無 外部電磁干擾;反之,若外邱雷磁 ,右外#電磁干擾存在時,則I c 1 : C 之接腳1 0則會輸出一邏輯低電位以告知該主 |控制器1 850顯示其存在有外部電磁干擾。 請參閱第18圖,為本發明一較佳·實施例之非易失記憶 不思方塊圖,如圖所示,係為顯示非易失記憶體工6 〇儲 子其偵測捣毀記數器1 6 1紀錄、偵測旁通線路記數器j 6 2紀 錄:偵測電磁場記數器1 6 4紀錄、電力表序號i 6 6及電力表 測里紀錄1 6 8,而該各紀錄值係由主控制器丨8 5 〇所控制存 取’且各紀錄執一旦被登錄後便無法更改或重新設定,其 當各電路有運作失常時,可保護其各資料不受影響。 请參閱第1 9圖’為本發明一較佳實施例之偵測旁通線 | δ己數器運作示意圖;如圖所示,其係為非易失記憶體丨6 〇 中累計旁通偵測記數器1 6 2,該記數器包括有兩個部分 巧(^01(1623)及界(^02(1621)),其各為16位元;當偵測無旁Page 18 503318 V. Description of the invention (13) I electromagnetic sensor and detection electromagnetic amplification 'The circuit node 1 846a will store the W circuit Λ short circuit or open circuit | amplifier IC1D pin 8 output-logic 22: No. : No. 2 will make the operation I 1 8 50. The electromagnetic detection circuit 1840 has been tampered with. Please refer to FIG. 17 for the working status, which is a schematic diagram of the present invention; as shown in the figure, the operation system of the douqi A j and another adjustment signal 11 2 ′? 4 two head Λ and the magnetic signal adjustment circuit ” π = :: 时 When electromagnetic interference is present, its operational amplification I makes the signal potential level on the signal lower than the node 'point 1 846e, so IC1: C outputs a logic high potential to the main controller 185. External electromagnetic interference; conversely, if external Qiu Lei magnetic, right external # electromagnetic interference exists, then I c 1: C pin 10 will output a logic low potential to inform the main | controller 1 850 to show its existence There is external electromagnetic interference. Please refer to FIG. 18, which is a block diagram of a non-volatile memory according to a preferred embodiment of the present invention. As shown in the figure, it is a display showing the number of non-volatile memory workers and their detection and destruction records. 1 6 1 record, detection bypass line register j 6 2 record: detection electromagnetic field register 1 6 4 record, power meter serial number i 6 6 and power meter test record 1 6 8 and each record The value is controlled and controlled by the main controller 丨 8 5 ′ and once the records are registered, they cannot be changed or reset. When the circuits malfunction, the data can be protected from being affected. Please refer to FIG. 19 for the detection of the bypass line according to a preferred embodiment of the present invention. The operation of the delta-sigma counter; as shown in the figure, it is the cumulative bypass detection in the non-volatile memory. Counting register 1 62, the register includes two parts (^ 01 (1623) and bound (^ 02 (1621)), each of which is 16 bits; when the detection is complete
第19頁 503318 五、發明說明(14) 通線30時’ f0RDl(162a)與W〇RD2(162b)記數值相等,而當 痛測到有一旁通線3 0時,則主控制器會檢查word 1 ( 1 6 2a ) 是否與W0RD2( 1 62b)記數值一樣,如若其兩記數值相等, 該ffORDl (162a)記數值就會被增加&欠,其係用以防止重複 摘測旁通線連接及重複增加記數器之記數值。 又’當用戶插入I C紀錄卡以更新當期用電資料時,其 101^2(1621))記數值會被設為與1〇〇1(1623)記數值相等, 且會開始下一次旁通線之偵測;但若w〇RD1(162aM W0RD2 (1 6 2b )記數值要相等之前,由於各字元係為丨6位元(可依Page 19 503318 V. Description of the invention (14) When the line is 30, the f0RDl (162a) and WORD2 (162b) are equal, and when a bypass line 30 is detected, the main controller will check Is the word 1 (1 6 2a) the same as the value of WORD2 (1 62b)? If the two values are equal, the value of ffORDl (162a) will be increased & owed, which is used to prevent repeated sampling and bypassing Connect the wires and repeatedly increase the register value. Also, when the user inserts the IC record card to update the current electricity consumption data, the value of 101 ^ 2 (1621)) will be set equal to the value of 1001 (1623), and the next bypass will begin. Line detection; but if the value of w〇RD1 (162aM W0RD2 (1 6 2b) should be equal, since each character is 6 bits (can be determined according to
f況增加)’故該偵測旁通線電路可有6 5,5 3 6次偵測,其 思為若用戶竊電,係需每月刷卡6 5,5 3 6次,且每次都需恰 好為其偵測循環週期,否則即會觸動該偵測電路;另,其 偵測捣毁圯數器1 6 1與偵測電磁場記數器J 6 4之運作方式亦 同〇 一請參閱第2 0圖,為本發明之另一較佳實施例圖;如圖 所不,其係為第3種防旁通線竊電方法,即在習用電力表 ^〇b主保險絲44之連接線前偵測負載電流154,以代替習用 電力表1 Ob主保險絲44之後連接線偵測負載電流丨54 ;電 2線42從主配電柵經過電流變壓器1812、主保險絲44至電f condition increase) 'Therefore, the detection bypass line circuit can have 6 5, 5, 3, 6 detections. The thinking is that if the user steals electricity, the card needs to be swiped 6 5, 5 3 6 times a month, and each time It must be exactly the detection cycle, otherwise the detection circuit will be touched. In addition, the detection and destruction of the counter 1 6 1 and the detection of the electromagnetic field counter J 6 4 are the same. Figure 20 is a diagram of another preferred embodiment of the present invention; as shown in the figure, it is the third method of preventing bypass wire theft, that is, before the connection line of the main fuse 44 of the conventional power meter ^ 〇b Detect the load current 154 instead of the conventional power meter 1 Ob main fuse 44 after connecting the line to detect the load current 54; electricity 2 wire 42 from the main distribution grid through the current transformer 1812, the main fuse 44 to the electricity
表1 〇b,且其只有一個可分離點,位於該主保險絲4慎 故並不可能在該電力表之地線丨4 7及活線i 4 5間並聯一旁 f線竊電,又該電流變壓器1812之線圈内洞直徑需設計為 八允許有一電力線4 2通過。 請參閱第21圖,為本發明一較佳實施例之應用以繳交 503318 五、發明說明(15) 一~ 電費流程圖;如圖所示,用戶(顧客)每月在要至電力供 應公司授權出納處繳交電費前,需先至電力表之1C卡讀寸; 插槽ί 2 0刷卡,又由於其是否有竊電之資料會被登錄於該 I C紀錄卡2 0中,故不需詢問用戶,且當月之用電量及電力 表序號亦被登錄於該I C紀錄卡2 0中;在刷卡後,其各項資 料都被登錄於I C紀錄卡2 0,用戶再至電力供應公司所授權 之各出納處繳交當月電費。 而用戶至電力供應公司所授權之各出納處繳交當月電 費時’其用戶之I C紀錄卡2 0中各項資訊會經由其讀卡機 5 1 2顯示在電力記數器5 0之電腦終端5 1 〇上,且首先該電腦 會先檢查該I C紀錄卡2 0是否有登錄其竊電紀錄;若有,^ 電力供應公司得以進一步進行其應盡之行為,反之,若沒 有竊電紀錄的話’就以計算該月份之電費,又除此之外, I C紀錄卡2 0登錄之所有該月份之各項資料將會被轉錄於電 力供應公司之中央電腦5 2 0中,以作為下月份之電費計算 參考;最後,若已正常繳交電費,則I C紀錄卡2 0會被登錄 有正常繳費之指令’再將該紀錄卡帶回插入電力表讀卡^ 插槽1 2 0中,使該電力表開啟下月份之電費計算。 睛參閱第2 2圖’為本發明一較佳實施例之I c卡读卡一 意圖;如圖所示,其係為利用電力表1 〇裝置内之! ^喊不 機將資料從電力表1 0裝置登錄至I C紀錄卡上,g卩火&項卡 卜上’即當偵測至丨| 有I C紀錄卡插入該電力表1 〇之讀卡機插槽sc丨(丨 4 4 主控制器1 850便將所紀錄之各項資料轉錄於 ^ ’其 7、热ί 己錄卡2 〇Table 1 〇b, and it has only one detachable point, located in the main fuse 4 It is not possible to parallel the f line to steal electricity between the ground line of the power meter 4 7 and the live line i 4 5, and the current The diameter of the inner hole of the coil of the transformer 1812 needs to be designed to allow a power line 4 2 to pass through. Please refer to FIG. 21, which shows the application of a preferred embodiment of the present invention to pay 503318. V. Description of the Invention (15) I ~ Flowchart of electricity fee; as shown in the figure, users (customers) are going to the power supply company every month. Before authorizing the cashier to pay the electricity bill, you must first read the position on the 1C card of the electricity meter; Slot ί 20, swipe the card, and because it has information about whether the electricity is stolen, it will be registered in the IC record card 20, so it is not necessary Ask the user, and the current month ’s electricity consumption and power meter serial number are also registered in the IC record card 20; after swiping the card, all its information is registered in the IC record card 20, and the user goes to the power supply company. Authorized cashiers pay electricity bills for the month. And when the user pays the monthly electricity bill to the cashier authorized by the power supply company, the information in the user's IC record card 20 will be displayed on the computer terminal of the power register 50 through his card reader 5 1 2 5 1 〇, and the computer will first check whether the IC record card 20 has logged its power stealing record; if so, ^ the power supply company can further perform its due diligence, otherwise, if there is no power stealing record 'On the basis of calculating the electricity bill for that month, in addition to that, all the data registered for the month on the IC record card 20 will be transcribed in the central computer 5 2 of the power supply company as the next month Electricity charge calculation reference; Finally, if the electricity fee has been paid normally, the IC record card 20 will be registered with the normal payment instruction 'Then bring the record card back into the electricity meter reading card ^ slot 1 2 0, so that The electricity meter starts the calculation of electricity charges for the next month. Please refer to FIG. 2 2 for an example of the I c card reading card of a preferred embodiment of the present invention; as shown in the figure, it is the use of the power meter 100 in the device! ^ Shout the machine to register the data from the power meter 10 device to the IC record card, and then fire the & item on the card, that is, when detected 丨 | There is an IC record card inserted into the power meter 1 〇 card reader Slot sc 丨 (丨 4 4 The main controller 1 850 transcribes all the recorded data into ^ 'its 7. Hot recorded card 2 〇
503318 五、發明說明(16) 綜上所述 抄表之電力表 將偵測到電力 以偵測使用旁 明實為一富有 應符合專利申 鈞局早日賜準 惟以上所 用來限定本發 圍所述之形狀 ,均應包括於 圖號簡單說明 10 10b . 120 140 141 142 143 144 145 147 150 152 ,本發 其方法 被竊的 通線及 新穎性 請要件 專利’ 述者, 明實施 、構造 本發明 明係有 與裝置 資料回 強力電 、進步 無疑, 至為感 僅為本 之範圍 、特徵 之申請 關於一 ,可有 送至電 磁場感 性、及 爰依法 禱。 發明之 。故即 及精神 專利範 種可嚇 效偵測 力供應 應之竊 可供產 提出發 一較佳 凡依本 所為之 圍内。 阻竊電及免 電力被竊, 公司,尤其 電方法。故 業利用功效 明專利申請 實例而已, 發明申請專 均等變化與 人工 且可 是用 本發 者, ,祈 並非 利範 修飾 電力表 習用電力表 I C卡讀卡插槽 活線上之電流感測線 活線輸入端 活線輸出端 地線輸入端 地線輸出端 活線輸入端鎖合 地線輸入端鎖合 測試電流線1 8 3 4上之測試電流 電流感測線1 4 0上之測試電流503318 V. Description of the invention (16) In summary, the meter-reading power meter will detect the power to detect the use of Pond Ming as a rich one. It should comply with the patent application issued by the Bureau of Junjun as soon as possible. The shapes described above should be included in the drawing's simple description 10 10b. 120 140 141 142 143 144 145 147 150 152. The method of theft and novelty of this method should be patented. The invention is related to the strong power and progress of the device data, and the application is undoubtedly about the scope and characteristics of the application. One can be sent to the electromagnetic field inductive, and pray according to law. Invented. Therefore, the type of mental patent can scarcely detect the supply of power. It should be available for production. Stop theft and avoid theft of power, companies, especially power methods. For this purpose, the patent application example is only used for the invention. The invention application is exclusively for equal changes and manual labor. However, it is the author of this application. It is not a good idea to modify the current meter on the live line input terminal of the IC card reader slot on the power meter. Live wire output end Ground wire input end Ground wire output end Live wire input end Locked ground wire input end locked Test current line 1 8 3 4 Test current on current sensing line 1 4 0
第22頁 503318 五、發明說明(17) 154 160 161 162 162a 162b 164 166 168 1810 1811 1813 1814 1815 1816 1820 1822 1824 1830 1831 1832 1833 1834 1835 複載電流 非易失記憶體 電力表搗毁偵測記數器 累計旁通線偵測記數器 累計旁通線偵測記數器WORD 1 累計旁通線偵測記數器WORD2 累計外部電磁場偵測記數器 電力表序號 累計用電量 電力測量電路 電流測量元件 電流測量元件緩衝器 電壓測量元件 電壓測量元件緩衝器 電力計算電路 液晶顯不面板 電源供給電路 變壓器 旁通線偵測電路 測試電流產生電路 測試電流1 5 0之電流變壓器 測試電流1 5 2之電流變壓器 測試電流線 測試電流放大器電路Page 22 503318 V. Description of the invention (17) 154 160 161 162 162a 162b 164 166 168 1810 1811 1813 1814 1815 1816 1820 1822 1824 1830 1831 1832 1833 1834 1835 Reload current non-volatile memory power meter tamper detection record Counter cumulative bypass line detection register cumulative bypass line detection register WORD 1 cumulative bypass line detection counter WORD2 cumulative external electromagnetic field detection register power meter serial number cumulative power consumption power measurement circuit Current measurement element Current measurement element Buffer voltage measurement element Voltage measurement element buffer Power calculation circuit Liquid crystal display panel power supply circuit Transformer bypass line detection circuit Test current generation circuit Test current 1 5 0 Current transformer test current 1 5 2 Current transformer test current line test current amplifier circuit
第23頁 503318 五、發明說明(18) 1836 1837 1838 1840 1842 1844 1846 1847 1850 20 30 32 42 44 50 510 512 520 522 測試電流運作正常顯示電路 測試電流放大器電路 旁通線偵測顯示電路 外部電磁場偵測電路 電磁場感測 電磁場放大電路 電磁場訊號偵測運作正常顯示電路 電磁場訊號偵測顯示電路 主控制器 I C紀錄卡 旁通線 外部電磁場 電力線(活線) 主保險絲 電力記數 電腦終端機 電力記數器上之I C卡讀卡機 電力供應公司之中央電腦 電力供應公司之中央資料儲存庫Page 23 503318 V. Description of the invention (18) 1836 1837 1838 1840 1842 1844 1846 1847 1850 20 30 32 42 44 50 510 512 520 522 Test current works normally Display circuit Test current amplifier circuit Bypass line detection Display circuit External electromagnetic field detection Test circuit electromagnetic field sensing electromagnetic field amplification circuit electromagnetic field signal detection works normally display circuit electromagnetic field signal detection display circuit main controller IC record card bypass line external electromagnetic field power line (live line) main fuse power counter computer terminal power counter IC card reader on the central computer power supply company's central data repository
第24頁 圖式簡單說明 =1圖:本發明一較佳實施例方塊示意圖; 2圖·本發明一較佳實施例之電源供應電路運作示意圖 f 第3圖.本發明—較佳實施例之電力計算電路示意方塊圖 第4圖:太於 第5圖:I 明一較佳實施例之緩衝電路示意圖; ° •發月較佳實施例之旁通線偵測器示意方塊圖 第7圖 第8圖Brief description of the drawings on page 24 = diagram 1: block diagram of a preferred embodiment of the present invention; 2 diagram · schematic diagram of the operation of a power supply circuit of a preferred embodiment of the present invention f Fig. 3 of the present invention-the preferred embodiment Schematic block diagram of power calculation circuit Figure 4: Too much Figure 5: Schematic diagram of the buffer circuit of a preferred embodiment; ° • Schematic block diagram of the bypass line detector of the preferred embodiment of the month Figure 8
= 較佳實施例之測試電流產生示意圖; 本^ ϋ 一較佳實施例之放大器電路運作示意圖; =月—較佳實施例之調節訊息示意圖; 务明—較佳實施例之放大器電路另一運作示意 第10圖: 第11圖: 第12圖: 第1 3圖: 第14圖: 第1 5圖: 較佳實施例之又一旁通線偵測器示意方 本發明一較隹實施例之另 本發明一較佳實施例之另 塊圖; 本發明 塊圖; ^發明一較佳實施例之外 意方塊圖; 本發明一較佳實施例之外 方塊圖; f發明一較佳實施例之電 一調節訊息·示意圖·, 一旁通線偵測器示意方 部電磁場偵測感應器示 部電磁場偵測電路示音 礙場放大器電路運作示 503318 圖式簡單說明 第1 6圖:本發明一較佳實施例之又一調節訊息示意圖; 第1 7圖··本發明一較佳實施例之又一調節訊息示意圖; 第1 8圖:本發明一較佳實施例之非易失記憶體示意方塊圖 9 第1 9圖··本發明一較佳實施例之偵測旁通線記數器運作示 意圖; 第2 0圖:本發明之另一較佳實施例圖; 第2 1圖:本發明一較佳實施例之應用以繳交電費流程圖; 及 第2 2圖:本發明一較佳實施例之I C卡讀卡示意圖。= Schematic diagram of test current generation of the preferred embodiment; this ^ 示意图 schematic diagram of the amplifier circuit operation of a preferred embodiment; = month—schematic message diagram of the preferred embodiment; Schematic diagram 10: diagram 11: diagram 12: diagram 13: diagram 14: diagram 15: diagram of a bypass line detector according to another preferred embodiment of the invention Another block diagram of a preferred embodiment of the present invention; Block diagram of the present invention; ^ Block diagram of a preferred embodiment of the present invention; Block diagram of a preferred embodiment of the present invention; f Of a preferred embodiment of the invention Electrical adjustment information · Schematic diagram · A bypass line detector indicates the square part of the electromagnetic field detection sensor and the electromagnetic field detection circuit of the sound field interference amplifier circuit is shown in 503318. Schematic diagram of another adjustment message of the preferred embodiment; Fig. 17 ·· Schematic diagram of another adjustment message of a preferred embodiment of the present invention; Fig. 18: Schematic block diagram of the non-volatile memory of a preferred embodiment of the present invention Fig. 9 Fig. 19 Fig. · Ben A schematic diagram of the operation of a bypass bypass register in a preferred embodiment is shown in FIG. 20; FIG. 20 is a diagram of another preferred embodiment of the present invention; FIG. 21 is an application of a preferred embodiment of the present invention. Flowchart for electricity payment; and Figure 22: A schematic diagram of an IC card reading card according to a preferred embodiment of the present invention.
Claims (1)
Priority Applications (1)
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TW88120419A TW503318B (en) | 1999-11-23 | 1999-11-23 | Apparatus and method for advance electric utility meter |
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TW88120419A TW503318B (en) | 1999-11-23 | 1999-11-23 | Apparatus and method for advance electric utility meter |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007145498A1 (en) * | 2006-06-13 | 2007-12-21 | Sigitas Zvirblis | Electricity meter |
TWI407113B (en) * | 2008-10-29 | 2013-09-01 | 艾尼爾分配公司 | Electricity meter, remote controllable disconnector module and electrical installation comprising the electricity meter |
-
1999
- 1999-11-23 TW TW88120419A patent/TW503318B/en not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007145498A1 (en) * | 2006-06-13 | 2007-12-21 | Sigitas Zvirblis | Electricity meter |
TWI407113B (en) * | 2008-10-29 | 2013-09-01 | 艾尼爾分配公司 | Electricity meter, remote controllable disconnector module and electrical installation comprising the electricity meter |
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