TW498665B - Non-coherent 6-port receiver - Google Patents

Abstract

According to the present invention a method and a receiver for high-frequency signals is provided. The receiver comprises a power divider (4) to divide a modulated RF input signal in at least two branches. At least one delay line (5, 6) provides for a delay of the branches relatively to each other by a predetermined delay constant. A calculation circuit (7, 8) calculates at least three power levels based on combinations (12, 13, 14) of the two branches of the input signal relatively delayed (5, 6) to each other. A processing means (10) calculates the phase and the amplitude of a complex signal representing the relation between the two branches of the input signal relatively delayed to each other, on the basis of the said at least three power levels (8). The invention therefore provides for a direct 6-port receiver based on non-coherent detection. The concept of the invention is inherently cheap and features high integration ability and low-cost processes. Ideally the whole RF front end can be placed on one chip.

Description

498665 The Central Purification Bureau of the Ministry of Economic Affairs only eliminates cooperation and printing tt7. V. Description of the invention (1) Field of the invention: Field of the invention: The invention relates to a method for receiving and demodulating by a direct conversion method. The present invention relates to a method and a receiver for high-frequency signals, and the present application is more related to a mobile communication device including a receiver and a cellular radiotelephone. Description of related technology: It has recently been shown that the so-called six-port receiving circuit together with a digital signal processor can directly perform digital demodulation in the frequency range from the microwave band to the millimeter wave band. This new direct digital receiver provides cost-effective The heterodyne structure replaces the traditional heterodyne structure used in various digital terminals, which promises reduced receiver complexity, low manufacturing requirements, and good performance. In digital communication systems, such as satellite and personal communication systems, the most widely used modulation scheme is PSK (Phase Shift Keying). There are two types of demodulation techniques: coherence and non-coherence (differential). In general, differential detection results in less complex receiver structures, while coherence detection is superior in terms of error performance. However, the complexity of a coherent receiver may increase significantly due to carrier recovery requirements. This work becomes particularly different when carrier recovery must be performed directly at microwave and millimeter-wave frequencies. Figure 3b schematically shows the application range of a direct six-port receiver as a partial or complete replacement of a traditional heterodyne receiver structure (Figure 3a). Figure 4 shows the data from Bossisio, Wu, "A Six-Port Direct Digital --------- ^^ 装 --- (Please read the precautions on the back before filling out this page),-The size of the paper is applicable to the Chinese National Standard (CNS) 8-4 specifications (210X297) .4-498665. Λ7 _B " V. Description of Invention (2)

Millimeter Wave Receiver ", Abstract of the 1994 IEEE MTT Proceedings, Book III, pp. 1659-1662, San Diego, May 1994. The structure of the six-port receiver is known.

The Ministry of Standards and Industry of the People's Republic of China Standards Bureau staff consumption cooperation Du Yin U (please read the precautions on the back before filling this page) Liubu Technology has accurately measured both the scattering parameters, amplitude and phase of microwave networks, It is known for its ability to replace the heterodyne receiver. The six-port receiver performs direct microwave and millimeter-wave frequencies by extracting power levels in at least three of the six ports or in particular four. measuring. The shortcomings of the hardware can be easily removed through proper calibration procedures. Very accurate measurements can be made from a large dynamic range and a wide frequency range. The six-port receiver includes passive microwave components such as directional couplers and power splitters and diode detectors. The circuit can be easily integrated as MHM I C or MM I C. The conventional receiver performs direct phase / amplitude demodulation of microwave frequency and millimeter wave frequency. The traditional I / Q block in the receiver is composed of a six-port receiver and a six-port digital signal processor (DSP) unit. The phase / frequency discriminator is replaced. The incoming digitally modulated RF signal is compared with the output of the digitally controlled local oscillator 18. First, carrier recovery is performed. The DSP unit 17 detects the frequency difference of the signal and then controls Local oscillator 18 to track incoming signals. Once the carrier is recovered, the instantaneous phase of the received signal is detected and decoded to restore the original modulation data. The maximum data transmission rate is mainly determined by the sampling rate of the A / D converter 16 and the processing speed of the DSP unit 17. To decide. By performing the calibration procedure, hardware defects such as phase errors of bridges, imbalances of power detectors, etc. can be easily removed. It is clear that the paper size applies to the Chinese national standard $ Γ (CNS) Λ4 圯 grid ( 210X297 public goods) a 498665

5. Description of the invention (3) The need for hardware improvement is significantly reduced and the six-port receiver operates in a wide frequency band up to the millimeter wave frequency. In the six-port receiver, the amplitude in the phase is obtained independently. Therefore, even if the amplitude of the incoming signal changes over a large dynamic range, the phase modulation of the incoming signal can still be correctly detected, which is different between Switching between modulations can be easily accomplished by a slight change in the algorithm in the DSP unit 17. A receiver like the one shown in Figure 4 is called a coherent receiver, but the conventional six-port receiver is quite complex and cannot be integrated on a chip, especially because of the presence of a local oscillator 18 The problem. The description of the present invention: Therefore, the object of the present invention is to provide a method for receiving high-frequency signals by a direct conversion method and a simplified structure for demodulating high-frequency signals by a direct conversion method and Lower cost receiver. The main idea of the present invention is to replace a coherent receiver with a non-coherent detection receiver. According to the present invention, a method for receiving high-frequency signals by a direct conversion method is provided according to the present invention. The digitally modulated input signal is divided into at least two branches. One of the branches is delayed by a predetermined delay constant relative to the other of the branches. At least three power bits are calculated based on the combination of the two branches of the input signal delayed relative to each other. And the best four power levels, and then calculate the phase and amplitude of the complex signal, which represents the relationship (ratio) between the two branches of the input signal that are delayed relative to each other, with their three or four powers Level-based. The paper & scale is applicable to the China National Standard (CNS) Λ4 specification (210 \ 297g) 498665 __Βη V. Description of the invention (4) Both branches of the input signal can be delayed, where the two branches have different delay constants . The at least three power levels can be A / D converted and the phase in the amplitude of the complex signal can be calculated by digital processing. The relative delay between the two branches of the input signal can be equal to or greater than the reciprocal of the sampling rate of the A / D conversion. The modulated input signal can be modulated by the differential PSK and the complex signal can be calculated based on the at least three kinds of specific power levels. The calculation of the at least three power levels can only be affected by linear passive elements like detection diodes. The step of calculating the phase and amplitude of the complex signal may further include a step of calculating a calibration coefficient. The step of calculating the phase and amplitude of the complex signal may further include the conversion of the real (I) and imaginary (Q) parts of the complex signal. According to the present invention, a receiver for demodulating high-frequency signals by a direct conversion method is provided. The receiver includes a power divider for dividing the modulated input signal into at least two branches. At least one delay line is provided to delay one of the branches relative to the other branch by a predetermined delay constant. The circuit calculates at least three power levels based on a combination of two branches of the input signal delayed by a predetermined delay constant relative to each other. A processing mechanism calculates a relationship between the two branches of the input signal delayed relative to each other (compared to 値The phase and amplitude of the complex signal are based on the at least three power levels. Two delay lines can be provided to delay each of the branches in the input signal. The paper size is applicable to the Chinese National Standard (CNS) Λ4 ^ Ke (210X297); 7 498665 B1 V. Description of the invention (5) Do not branch, the two delays The lines have different delay constants. The A / D converter can be provided to convert the at least three power levels output by the calculation circuit. In this case, the processing mechanism can be a digital processing mechanism. Between the two branches of the input signal The delay can be set to be equal to or greater than the reciprocal of the sampling rate of the A / D converter. The modulated input signal can be a signal modulated by the differential P SK, and in this case, the processing mechanism can be analog processing The calculation circuit can include only linear passive components. When no local oscillator is needed, the delay line and the calculation circuit can be integrated on a chip. Digital filters can be provided separately between the A / D converter and According to the present invention, there is further provided a mobile communication device including the receiver as published above, and the mobile communication device can It is a honeycomb type telephone, and another preferred application is a satellite receiver or a receiver for a microwave distribution system. The central sample bureau of the Ministry of Economic Affairs only eliminates and cooperates with it. ^ Brief description of the drawings: The preferred embodiment of the present invention The example will now be described in more detail with reference to the drawings of the following drawings, in which: FIG. 1 schematically shows a receiver according to the present invention; FIG. 2 shows a passive circuit of the receiver according to FIG. 1 in detail; A direct-type six-port receiver (Figure 3b) replaces one outside -8- (Please read the precautions on the back before filling this page) The paper size is applicable to the Chinese National Standard (CNS) Λ4 ^ grid (210X297) 498665 B- V. Description of the invention (6) Part or all of the differential receiver (Fig. 3a); Fig. 4 shows a coherent six-port receiver according to the conventional technology; Fig. 5 shows a six-port receiver according to the present invention; The relationship between the relative power ratio 値 detected by the receiver and the relative phase difference 値 of the separated digital modulation input signal; Figure 6 is a graphical representation similar to Figure 5, but in this case, the incoming signal has 2 0 d B relative power level Figure 7 shows an example of the calculation procedure required to obtain the phase change and amplitude of the signal, where the phase change adopts · 157.5 ° (7ττ / 8), the amplitude is still the same; Figure 8 shows an example, in this example The relative change of the incoming signal is three times larger in amplitude and 4 5 · 5 ° (7Γ / 4) in phase: and Figure 9 shows the mathematical modification to match the image in the example of Figure 7 or Figure 8 The possible offset of the intersection of the circles. Component comparison table (please read the precautions on the back before filling out this page) I installed 4: ¾ printed by the Ministry of Economic Affairs and Cooperatives of the Central Ministry of Economic Affairs 1 Bandpass filter 2 LNA amplifier 3 band-pass filter 4 power divider 5 second delay line 6 first delay line 7 passive circuit 8 power readout circuit 9 A / D converter 1 0 digital signal processing unit 1 6 A / D converter Applicable to Chinese Garden Standard (CNS) grid (210X 297) (cloth size) -9- 498665

V. Description of the invention (7) 17 DSP unit 18 Detailed description of the preferred embodiment of the digitally controlled local oscillator:-The present invention has been completed based on the following motivational results:-The present invention is a direct conversion (zero-beat (zero-beat ( homodyne)) The system is prepared in advance, and the system can also use the microwave direct conversion method or the fundamental frequency conversion function,-the front end can be implemented with passive components that are not ideal due to manufacturing tolerance,-the invention inherently avoids Traditional I / Q circuits and therefore their amplitude / phase imbalance,-the present invention allows the use of RF local oscillators at very low power levels,-the hardware of the receiver to cope with the possibility of many different fundamental frequency channel bandwidths Different modulation technologies, the central Ministry of Economic Affairs, JM Industrial and Consumer Resources, and It Printing-The present invention provides an inherently cheap concept featuring high integration capabilities and low-cost processes. Ideally, the entire RF front-end is Placed on a chip,-the receiver supports global policies to reduce analog processing towards digital processing, · an invention supports total development towards software wireless , And an invention that allows high data rate applications (also greater than 2 million digits -10- (please read the notes on the back before filling in this purchase) 夂 the paper size applies the scholar's standard (CSS) Λ4 grid (210X297) Wear) 498665 B * 7 V. Description of the invention (8) Yuan / second) ^ The present invention will now be described with reference to FIG. 1. Fig. 1 shows the general concept of a direct six-port receiver based on a non-coherent detector according to the present invention. As can be seen in Fig. 1, the received RF signal passes through a band-pass filter 1. LNA2 is amplified, passed through another band-pass filter 3, and then output to a power divider 4. The power divider 4 divides the supplied RF signal into two branches S 1 and S 2. One branch S 1 is output to a first delay line 6 having a delay constant 7: 1 and the other branch S 2 is output to a The second delay line 5 having a delay constant r 2 different from the delay constant r 1 of the first delay line 6 is divided by the power divider 4 and branched by the first delay line 6 and the second delay line 5 S 1, S 2 are then input to a passive circuit 7. The passive circuit 7 is prepared for cooperation of two different linear groups of two input signals. The passive circuit 7 preferably includes only linear passive elements like detector diodes. 0 amplitude, that is, at least three types calculated by the passive circuit 7 The power of the linear combination and the four linear combinations, which are preferably provided by the passive circuit 7, are then detected by the power readout circuit 8. The power readout circuit 8 preferably includes only a detector diode. As already stated, the minimum number of detected power levels detected by the power readout circuit 8 is three. In the example shown in FIG. 1, the passive circuit 7 is prepared for cooperation of four linear groups of two input signals S 1 and S 2, and thus the four power levels are detected in the four linear combinations. The example then prepares for the determined redundancy of the entire system. The output of the power readout circuit 8, which is the detected power level, is -11-(Please read the precautions on the back before filling this page) The paper size is applicable to the Chinese garden standard (CNS) Λ4Α grid (210X 297 credits) 498665

V. The invention description (9) is transmitted to the circuit 9 respectively, which includes a low-pass filter and an A / D converter. Alternatively, the circuit 9 may include a DC amplifier, so the circuit 9 will be output by the power readout circuit 8. The detected power levels are respectively amplified and digitally converted. The digital output signals of the circuit 9 are then transmitted to the digital signal processing unit 10 respectively. The digital signal processing unit 10 is a digital input signal which will be described later. Filtering, preparation of system calibration, calculation of I / Q part of input signal and further processing like demodulation. As can be seen in Figure 1, according to the present invention, a direct six-port receiver basically contains two inputs (RF frequency bands) to approximate a passive RF structure. The passive RF structure is defined as a passive circuit, and it is designed to operate in a frequency band from a tenth of a megahertz (ΜΗz) to a tenth of a gigahertz (GHz) depending on different implementation results. The passive structure contains several (at least three, preferably four) power detectors. The output of the power detector 8 is sampled by the A / D converter after a possible amplification (selective) and filtering. DC voltage. It ’s printed by the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperation. An important feature of the present invention is the two delay lines 5, 6 of the local oscillator of the suppression technology. The two delay lines 5, 6 are between the power of the RF signal. The relative delay between the two branches divided by the distributor 4 is prepared, and the relative delay is r = r: -r2. As it is only important to prepare for the relative delay between the two branches separated by the power divider 4, r 2 can be 0 and the corresponding delay line 6 can be suppressed, separated by the power divider 4 The relative delay r between the two branches is equal to or greater than the derivative of the sampling rate of the A / D converter 9. -12 · (Please read the precautions on the back before filling this page) The paper size of the paper is applicable to the Chinese National Standard (CNS) Λ4 specification (210X297 cm) 498665 V. Description of the invention (1〇) As can be seen from Figure 1 Thus, the present invention allows the detection of vector information, that is, only the phase of the RF signal based on the scalar information (the power level detected by the power readout circuit 8). Therefore, the present invention considers the detection of non-coherent phase information, and how the vector information in the digital signal processing unit 10 is represented between two branches of the input signal delayed relative to each other (delay lines 5, 6) will be explained later. The relationship (than 値) method. The advantage of the system of the present invention over the traditional approach is that the hardware disadvantages (phase and amplitude imbalance) are inherently avoided by a calibration procedure that can be performed without changing the physical connection, which allows the RF components to be Use without exaggerating requirements for component tolerance. In addition, because non-coherent demodulation is used, there is no need for a local oscillator (L 0). Otherwise, a local oscillator with low power (similar to RF level) is required, and AFC (Automatic Frequency (Phase) Control) is required. Printed by the central government of the Ministry of Economic Affairs, quasi-calendar, labor and consumer cooperation. The advantage of the present invention is that if there is no local oscillator, the entire RF front end can be realized with a simple chip. Traditionally, because there are no active components, and the main challenge is only to implement the detector diode on the wafer, it is not necessary to use very advanced GAAS or (SI) Μ IC technology for lower frequency bands. Six-port structure for higher frequency bands. Therefore, in order to avoid intermediate stages and to have a less complex RF front-end structure (no local oscillator circuit, AGG and PLL), the present invention prepares for cost reduction in RF front-end. In the example shown in Figure 1, the detected power level is converted by A / D and then processed digitally. However, in a simple way to adjust the input -13 · (Please read the precautions on the back before filling out this page) The wood paper scale is applicable in the S! National Standard Rate (CNS) Λ4 exclamation (210X297); 498665 5. Description of the invention (11) In the case of RF signal, the detected analog power level does not need to be converted by A / D, and can be processed by analogy. (Please read the precautions on the back before filling this page) In any case, in the calculation block provided by the digital signal processing unit 10, an additional calibration coefficient obtained from the calibration procedure is used to calculate a complex number representing the ratio of the two input RF signals provided by the power splitter 4 Signals, complex signals are then selectively decomposed into I / Q data strings for further use in traditional demodulation procedures in the fundamental frequency. Optionally, before investigating the input of the passive circuit structure, additional LNA and The additional BPF can be placed after or integrated into the delay lines 5, 6. The components constituting the receiving method of the present invention and the receiver of the present invention will now be explained in more detail. The dynamic RF circuit 7 is a circuit containing only passive linear elements. This may include a different number of power dividers, mixers, couplers, transmission lines, matching components, resistors, capacitors, and composites in each technology element. The entire path circuit can be implemented with discrete or lumped components. The design of the transmission line, substrate, or reused lumped components is arbitrary and usually set to optimize the passive circuit 7 to define the frequency band of interest. The frequency band is referred to as the RF frequency band in the following description. The RF frequency band is a frequency band of interest. The RF frequency band represents a frequency band in which the proposed receiver structure acts, and the RF frequency band is also considered to be in the middle of a more complicated receiver circuit. In this case, the proposed receiver functions as a direct conversion circuit from the mid-band to the base band. As shown in Figures 3a and 3b, the direct six-port receiver according to the present invention is The paper size of this table is suitable for the S-country purpura (CNS) Λ4 profile (210X297). 14.498665 B7 __ 5. Description of the invention (12) In the case, the traditional One of the down-conversion techniques is used to process signals obtained from another IF intermediate frequency signal or a higher RF frequency. The RF frequency signal can be used in the frequency range of 50 MHz to 100 GHz. This RF frequency signal is filtered and amplified before approaching the passive RF circuit 7. Before the band-pass filter 1, 'extra structure can be used to provide channel assignment if necessary. As already explained before, the passive circuit 7 respectively Prepared for the cooperation of at least three and preferably four linear groups of the two input signals S 2 output by the delay lines 6 and 5, based on the two input signals Si, S2 and according to Equation 1 below, four power levels Pχ are calculated. , P2, P3 and P4.

Pi = a XS! + B X S2 P2 = cx Sj + dx S2 P3 = ex Sj + fx S2 P4 = gx Si + hx S2 Please note this page again)) These four power levels Pi, P2, p3 and p4 are detected by the power readout circuit (power diode) 8. A device for converting the power of a signal into a frequency range of RF frequency band to DC voltage information by a power two-pole system, which can be implemented by different methods. The most common technology for the practical improvement and implementation of a digital six-point receiver is the implementation of a general detector diode method, which can be integrated on a chip with the passive circuit 7 The detector diode is considered to be a detector diode with a selective circuit for temperature compensation. The digital signal processing unit 10 calculates the power levels Pχ, P2 from the amplified, filtered and A / D converted? 3 and? The plural number of 4 signals, the paper size of the duplicate applies to the Chinese National Standard (CMS) A4 (210X 297)} 17 498665 __Βη ___ 5. Description of the invention (13) The digital signal indicates that it is between the two input signals S 1 and S 2 The relationship between them (Comparison). The digital signal processing unit 10 is the hardware that causes the digital signals from the A / D converter 9 to be processed. The basic functions of the digital signal processing unit 10 are:-Digital low-pass filtering -Calculation of the complex signals mentioned,-Calculation of the calibration coefficients obtained from the calibration procedure, and-If necessary, the complex signals are turned into real and imaginary parts (1 / Q output). Alternatively, software digital signal processing capabilities are used. Or hardware capability (ASIC or similar products) to complete the calculation of complex signals and the calculation of calibration coefficients, depending on the data rate to be processed, the processing performed by the digital signal processing unit 10 can be combined with demodulation Use the same hardware parts (such as the same digital signal processing) to implement the change program together. Now, the following explains how the digital signal processing unit 10 comes. The complex signal described in the calculation indicates a relationship between the two input signals s 1 and 32. The complex signal is a signal calculated by using a combination of a calibration coefficient and a relative power level in the digital signal processing unit 10 , Which is detected by the power readout circuit 8 and presents a ratio of voltage, and a representative structure of a complex signal having an ordinary number of power readout circuits 8 (4) is presented in Equation 2 below: 卜卜 ⑽ + Qian 1). 1 * 1 夂 The paper size is applicable to Chinese National Standard Soap (CMS) Λ4 specification (210X29D > t). 1 β-One (Please read the precautions on the back before filling in and write this page) ^ Leather Bureau: Printed by the Industrial and Commercial Cooperatives ^ 498665 A 7 _____B7__ V. Description of the Invention (14) One of pi is the relative power expressed by the voltage detected by the power readout circuit 8 divided by a reference power detection (The reference power detection is usually the fourth power readout, such as Pi = P2 / P4), —X (i), x (i), y (i), y (i), i = 1, 2, 3 To obtain the calibration coefficients from the calibration procedure, —grd is the delay Ti, which is actually up-converted to the carrier frequency fThe input signal S i, _ composed of the fundamental frequency signal is an input signal delayed by r 2 by the second delay line 5 ′. The input signal is S 2 and is actually up-converted to the carrier frequency f. It consists of the baseband signal and △ [=! :: —r2. Note that Δτ is greater than or equal to the sampling period of the A / D converter 9, and one of the delay constants can be zero. It can be seen that the change in the total frequency content in the two samples of the signal multiplied by the time delay is fixed or if it can be omitted, we can obtain information about the amplitude from the sample to the other sample. And relative changes in phase, or the relative increase or decrease of I / Q signals. a 屮 η ·? -meaning:] Digestion (Read the precautions on the back before filling out this page) The detection of this number is especially corrected when the oscillation period of the main carrier is much smaller than the sampling period In this case, the passive circuit 7 is made to obtain a practically quasi-steady state and can perform power detection by the power readout circuit 8. The calibration procedure is a procedure necessary to obtain the calibration coefficients X (i), y (i). The calibration can be completed without separating the actual connection of the system. The calibration procedure can be implemented offline, and the system parameters will not be changed quickly. 498665 ________ B * 7 V. Description of the invention (15) changes, so that offline calculation can be performed in cycle T, which is much longer than the signal signal duration. Calibration coefficients are obtained through the calibration process, and they are used for relative signal detection along with power readout. In the first minute before updating with the data obtained from the calibration program data from the memory, Yu started using the calibration data to calculate the relative signal. After performing the non-coherence detection of the I / Q mathematical calculations in the digital signal processing unit 10, a demodulation process is performed. The demodulation procedure can be implemented through a hardware structure (such as an I / Q demodulator chip) or with DSP software (such as the same DSP used for calculation of calibration coefficients and calculation of complex signals). It is noted that for some In terms of applications, complex signals can be directly used for demodulation without being decomposed into I information and Q information (data strings). Due to the inherently non-coherent detection proposed, the differential processing of the data string must be implemented before approaching the I / Q port of the D / A converter and further transmitter modulators. An example of the function of the present invention will be described below with reference to Figs. 2 and 5-9. The Central Government Bureau of the Ministry of Economic Affairs and X Consumer Cooperation cooperate to make India disaster (please read the precautions on the back before filling this page). In the following description, it is assumed and demodulated a differential QPSK modulation signal. The concepts are constant, and they are used only for simplified demodulation and system description. Note that this modulation use does not change the main functionality of the proposed receiver, so that if all combinations of various modulation schemes are differentially processed before approaching the D / A converter and the I / Q port of the transmitting receiver ' Then they can be used. In addition, it is noted that the structure of the passive circuit 7 is not suitable for the paper. The Chinese standard (CNS) is Λ4 ^ grid (210X297 cm). -Jg-498665

Fifth, the description of the invention (16) changed. In the following description, it is assumed that the delay difference is equal to the sampling period. Furthermore, it is assumed that the RF frequency signal has the same power level as that applied to the passive circuit 7. The incoming RF signal is differentially modulated and transmitted by the transmitter. The passive circuit 7 consists of an ideal secondary circuit that does not need to be calibrated. In addition, considering an ideal linear power readout circuit (power detector) 8, the passive structure can be as shown in FIG. In the diagram below, a set of differential phase differences is presented for a set of fixed signal amplitudes (ideal detection). The combined power readings are normalized by the power read from the power detector P1. -------- • t—— (Please read the precautions on the back before filling out this page) Order the standard for the W Industrial Consumers Cooperatives of the Central Li Ping Bureau of the Ministry of Economic Affairs | Once-ruler ^ paper and wood

SN -19- 498665 V. Description of the invention (17) A? B7 Phase phase difference P4 / P1 P3 / P1 P2 / P1 Decision logic tolerance of P4 / P1 vs. P3 / P1 Decision logic tolerance of P2 / P1 Tolerance of decision logic 0 3 3.414 0.5857 1 to5 2 to 4 0 to 2 τ / 2 5.8258 0.585 0.585 5 to 5.825 0 to 2 0 to 2 τ 3 0.585 3.414 1 to5 0 to 2 2 to 4 3 r / 2 0 3.414 3.414 1 to 1.17 2 to 4 2 to 4 (Please read the notes on the back before filling out this page) M Ministry of Economic Development, Central Purification Bureau, M Industrial Consumer Cooperatives, hair printing paper size applicable to Chinese national standards ([> ^) 6 4 Specifications (210 '乂 297mm). 2〇- 498665

5. Description of the invention (18) Figure 5 shows the change in relative power level (voltage at the power detector) as a function of the relative phase difference. In Fig. 5, it is assumed that there is no amplitude change between time samples and the incoming signals S1, S2 have the same power level. Figure 6 is similar to the representation of Figure 5, but with the assumption that the incoming signal has a relative power level difference of 20 d B. From Figures 5 and 6, it can be concluded that if the incoming signal SI and the power level difference of S2 increase, the sensitivity of the system decreases. This situation can occur. If a delay line 5, 6 is used in the system configuration, and one of the incoming signals SI and S 2 is also attenuated relative to the other undelayed signal, note the relative power. The level is independent of the RF signal level. Also note that if the number of phase (or amplitude) states is low, then because of the ability to use analog devices to build simple decision logic to perform demodulation based on the comparison of analog voltages (power levels), this pair of (D) PSK tuning Change is true. Employees ’cooperation in the Ministry of Economic Affairs of the People ’s Republic of China (please read the precautions on the back before filling out this page). Figure 7 shows the principle calculations required in the digital signal processing unit 10 of the receiver. The two signals S 1 'S 2 have the same amplitude at two different time points (QPSK modulation) and the phase difference obtained by detecting and calculating the measured power level is 7 ^ / 8 and get As an example of the state of the calibration coefficients shown on the three circles' ideally, they intersect at one point. When the intersection point is connected to the center of the coordinate grid, the vector thus generated represents the complex ratio S of the signals S 1 and S 2 at two different time increments, which are determined by the two delay lines 5 '6 The size of the paper to be used is far from the Chinese S National Standard Leather (CNS) M specification (210X29 * 7). 21-498665 The Central Bureau of the Ministry of Economic Affairs, the “Only Consumer Cooperatives” printed Λ7 ηη 5. Description of the invention (19) Defined by the relative delay provided. In order to obtain the complex number 値, mathematical processing is required to calculate the intersections of known circles (the circles are defined by calibration coefficients). As can be seen in Figure 7, from the origin of the coordinate box A vector whose point refers to the intersection of the three circles has a length (amplitude) corresponding to a unit circle and represents an angle of 157.5 ° (7ττ / 8). When it is a modulation of QPS κ, the vector has a correspondence The fact that the length of a unit circle indicates that the two signals SI and S2 have the same amplitude. Figure 8 shows that the two signals S 1 and S 2 have different phases and amplitudes. Figure 8 shows the relative change of the signal as The amplitude is three times larger, and The phase aspect is 4 5 · 5 ° (7Γ / 4). As can be seen in Figure 8, the direction from the origin of the coordinate box to the intersection of the three circles has a length corresponding to 1/3 of the unit circle and 45 · 5 ° (π / 4). Note that the result of calculation is generally not the final complex number of this signal. The direct six-port receiver detects the difference between the two signals S 1 and S 2. So that any relative change in the signal from one time step to another can be detected. That means that before the up-converted signal is transmitted, it is supplied to the transmitter I via a D / A converter The digital data before the / Q modulator must be differentially processed, which is inherently true for the DPS K modulation scheme. In the case where the transmitted digital data is not differentially modulated, a reference sample must be sent for provision The reference amplitude and phase for the absolute detection of the modulated digital data. In actual circuits, that is, in non-ideal circuits, the three circles will not (please read the precautions on the back J · -Item refill _ Loading-write this page) Custom paper size China S Standard (CNS) Λ4 specification (210X297) -22- 498665 B7_______ V. Description of the invention (2) Accurately intersect at the same point, so there will usually be some deviation in the intersection of circles, which must be offset by Mathematically, the offset is due to the fact that the calibration coefficients have not been optimally obtained. A further cause of the offset can be different noise effects, which can be used in the digital signal processing unit 10 signal processing. Investigate ways to "determine" where the intersections are placed ', such as the geometric middle of a curved triangle. 値 can be used as intersections. However, in some cases, where a relatively low number of modulation states are considered, when This is the case, for example, for QPSK modulation schemes, where the offset can be ignored. ϋ— mu K —Ml— ml m ^ i 1— ϋ— ϋ (Please read the precautions on the back before filling out this page) Order 4 This paper applies the Chinese Garden Standard (CNS) Λ4 regulations (210X297) Conversion) -23-

Claims (1)

< W 6 6 8 9 0. 0 J jf.〆 -ψ 'A8 B8 C8 D8 Annoyance committee 1 "Show 1 ¾ will be mentioned on the day of the amendment. Whether there are any changes to the content, whether 4 is allowed or not. Appendix A of the scope of patent application: No. 87113127 Chinese patent application scope amendment in October 1990. 1. A method for receiving high-frequency signals, which is characterized by the following steps. Separate (4) the high-frequency input signals into at least two branches (S i, S 2), 9 branches (S 丄 'S 2) of the input signals delayed (5, 6) relative to each other — a predetermined delay constant, according to The combination (12,) of the delays (5 S 1, S 2) with respect to each other is at least three power levels (p 1 P 2 two branches of the input signal 4) to calculate (7, P 3, P 4), with ( Please read the notes on the back before filling out this page)-., Tr Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs and calculated based on the at least three power levels (8) (1 0) indicates a delay relative to each other The phase and amplitude of the relationship between the two branches (S i 'S 2) of the input signal. 2. The method according to item 1 of the scope of patent application, characterized in that the at least three power levels (P 1, P 2, P 3 'P 4) are A / D converted (9) and processed digitally (1 0 ) To calculate the phase and amplitude of the complex signal. 3. The method according to item 2 of the scope of patent application is characterized in that the relative delay between the two branches (S i, S 2) of the input signal is equal to or greater than the reciprocal of the sampling rate of the A / D conversion (9). This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) · 1-498665 Α8 B8 C8 D8 6. Application for patent scope 4, such as the method of applying for any one of the patent scope items 1 to 3, It is characterized in that the modulated input signal is modulated by a differential PSK and a complex signal is calculated based on the at least three kinds of specific power levels (P1, P2, P3, P4). 5 'The method of any one of items 1 to 3 of the scope of patent application, characterized in that the step of calculating the phase and amplitude of the (1 0) complex signal further includes the step of calculating a calibration coefficient. 6. The method of any one of items 1 to 3 of the scope of patent application, characterized in that the step of calculating the phase and amplitude of the (10) complex signal further includes the real (I) and imaginary (Q) parts of the complex signal Conversion. 7. A method for receiving modulated high-frequency signals, which is characterized by the following steps: separating (4) high-frequency input signals into at least two branches (Si, S 2), which are delayed relative to each other ( 5,6) Branches (S1, S2) of the input signal—predetermined delay constants, based on the combination of the two branches (S !, S2) of the input signal delayed (5,6) relative to each other (12,13, 14) Calculate (7, 8) at least three power levels (Pi, P2, P3, P4), and detect the modulation by implementing analog comparison decision logic on the at least three power levels (8). Status of high-frequency input signals. 8. If the method of any one of the items 1 to 3 and 7 _ of the scope of patent application, is characterized by delaying with different constants (5, 6) This paper size applies the Chinese National Standard (CNS) A4 specification (21〇χ297 mm) (Please read the precautions on the back before filling out this page),-Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, 498665 A8 B8 C8 D8 6. Two branches of the input signal for patent application scope ( S i, S 2). (Please read the precautions on the back before filling out this page) 9. The method of applying any one of the items 1 to 3 and 7 of the patent application scope is characterized by the influence of at least linear passive components Calculation of three power levels (P1, P2'P3'P4) (7) 〇1. A receiver for high-frequency signals, characterized by: a power divider (4), which uses To divide the high-frequency input signal into at least two branches (S i, S 2) ′ at least one delay line (5, 6), which is used to delay two branches (Si, S2) relative to each other—a predetermined delay constant, one A calculation circuit (7, 8) for calculating at least three power levels (P1'P2) based on a combination of two halves (Si, S2) of input signals delayed (5,6) relative to each other , P 3 ′ P 4), and a processing mechanism (1 0), which is used to calculate the expression based on the at least three power levels (P 1, P 2, P 3, P 4) relative to the wisdom of the Ministry of Economic Affairs Property Bureau employee consumer cooperative prints the relationship between the two branches (S i 'S 2) of this delayed input signal Phase and amplitude of complex signals. 11. The receiver as claimed in item 10 of the patent application range is characterized by two delay lines (5, 6) of the individual branches of the branch (S i, S 2) of the delayed input signal, and the two delay lines (5 6) have different delay constants. 1 2. If the receiver of the scope of patent application No. 10 or No. 11 is characterized by converting at least three paper sizes output by the calculation circuit (7'8) to the Chinese National Standard (CNS) A4 specification ( 210X297 mm) _ 3-498665 A8 B8 C8 D8 VI. A / D converter with various power levels (P1, P2, P3, P4) for patent application (please read the precautions on the back before filling This page) (9), and in this case, the processing mechanism coefficients the processing mechanism (10). 1 3. The receiver as claimed in item 12 of the patent application, characterized in that the delay between the two branches (S i, S 2) of the input signal is equal to or greater than the sampling rate of the A / D converter (9). reciprocal. 14. The receiver of any one of the tenth or the eleventh in the scope of patent application, characterized in that the modulated input signal is a signal modulated by differential PSK, and the processing mechanism (10) is Analog processing agency. 15. The receiver as claimed in item 10 of the patent application range is characterized in that the computing circuit (7) includes only linear passive components. 16. The receiver according to item 15 of the patent application scope is characterized in that the delay line (5, 6) and the calculation circuit (7, 8) can be integrated on a chip. -Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs17. If the receiver of any one of the 10th or 11th of the scope of patent application, the receiver is characterized by being provided between the A / D converter and the Digital filter between processing units (10). 18. A mobile communication device, characterized in that it includes a receiver such as the one in the scope of patent application No. 10. 19. The mobile communication device according to item 18 of the patent application scope is characterized in that it is a cellular telephone. 20. The mobile communication device according to item 18 of the patent application scope is characterized in that it is a satellite receiver. This paper size is applicable to China National Standard (CNS) A4 (210x297 mm) ~ 498665 ABCD VI. Patent application scope 21, such as the mobile communication device No. 18 of the patent application scope, which is characterized in that it is a microwave distribution system receiver. (Please read the precautions on the back before filling out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper applies the Chinese National Standard (CNS) A4 specification (210X297 mm)-5-