TW495851B - Photo-lithographic method for semiconductors - Google Patents

Photo-lithographic method for semiconductors Download PDF

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Publication number
TW495851B
TW495851B TW090106319A TW90106319A TW495851B TW 495851 B TW495851 B TW 495851B TW 090106319 A TW090106319 A TW 090106319A TW 90106319 A TW90106319 A TW 90106319A TW 495851 B TW495851 B TW 495851B
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Taiwan
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photoresist
semiconductor wafer
semiconductor
optical system
light
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TW090106319A
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Chinese (zh)
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Alain Bernard Charles
John George Maltabes
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Motorola Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/50Mask blanks not covered by G03F1/20 - G03F1/34; Preparation thereof

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

The present invention relates to a method for forming structures on a semiconductor wafer (7) by photo-lithographic steps and by ion implant steps comprising the steps of: deposition of a resist layer (14) on a surface of said semiconductor wafer (7), exposing said resist layer to light of a predetermined wavelength through a reticle (4) and an optical system (3, 4, 5) so as to form an image of said reticle on said semiconductor surface, developing and cleansing said surface of said semiconductor wafer (7) so as to remove at least partly said resist layer (14) depending on whether or not said resist layer had been exposed, implantation of ions so as to determine the conductivity of said semiconductor in said cleansed areas of said semiconductor surface. In order to allow for changes in depth and dose of an implant at different locations within the IC using a single lithographic step fine structures (10) are deposited in predetermined areas arid in a predetermined distribution on said reticle (4) before exposing said resist (14) to said light, said fine structures having at least one dimension being smaller than the resolution of said optical system (3, 5, 6).

Description

495851 A7 ---——----- 五、發明說明(1 ) 發明領域 本發明係關於一種方法用以在一半導體晶圓i,使用光 微影蚀刻步驟與離子怖植步驟形成細結構。 背景 一般摻雜半導體方法為建立於藉由準備一光罩以光微影 蝕刻步騾與 < 後於半導體植入離子,來依照摻雜剖面與摻 雜準位決定其電導值。 > 假使半導體中不同區域需要不同摻雜特性,相同佈植手 續必須進行幾次,每一次以新光罩進行曝光,顯影以及蝕 刻半導體上其他區域,以供後續佈植動作。換言之,基本 上’相同步驟以改變至少一個參數而重複幾次。此是耗時 且高成本。 因此’需要使用單一光微影蝕刻步驟讓IC上不同位置的 佈植深度與劑量能夠變化。 附圖之簡明說明_ 圖1列出光微影蝕刻設備中主要光線路徑到本發明適用 圖2為圖1設備中主要部分的透視圖。 經濟部智慧財產局員工消費合作社印^ 圖3 A至圖3 C列出顯影與清除前,中,後期光阻上部分遮 光的效應。 詳細之說明 本發明原理建立於光學影像系統之影像場區中,不同位 置經過微影餘刻步驟之後,而產生不同的剩餘光阻厚度β 剩餘光阻厚度的調變將允許在稍後離子佈植步驟中,調變 -4- 本紙張尺㈣种關緖準賴⑽7^7公^ 495851 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明(2 佈植深度或佈植劑量或是二者。 •楮由光微影蝕刻步驟與離子佈植步驟於半導體晶圓上形 ^結構方法’纟中包括步驟有:在該半導體晶圓表面沉積 一光阻層,將該光阻層透過光罩與光學系統曝露在預定波 長光線中,以在該半導體晶圓表面形成該光罩圖像,顯影 與清除該半導體晶圓表面,視該光阻層是否曝光來移除至 少部分光阻層’離子佈植決定在該半導體晶圓表面上受清 除區域的電導値,其中在該離曝露iij該光線之前,細結 構沉積^預定區域與光罩上預定分佈,該細結構至少有一 維度尺寸小於該光學系統的解析度。 較佳地使用一種低對比光阻,給予細結構次解析較寬廣 〈析尺寸範圍。同理’也需要低解析度光學系統。 本發明一項優點爲建立全部1(:所需要的植入次數減少 了。 圖1列出先前技術光微影蝕刻設備中光線路徑的示意圖。 光線由光源1發射,其較佳爲雷射或水銀燈泡發射預定波長 介於300-450 nm之間的光線。由光源丨而出之光線以幾 個光學元素3如路徑2上的鏡面與透鏡,導引至光罩4。光罩 4包含將在半導體晶圓7形成之結構影像。對於此順序,一 (未列出)沉積在該半導體晶圓7表面。在自該光源i 而來j過光罩4與準直透鏡5,以及投影接物鏡6的光線到達 半導體晶圓7表面之前,該電阻層曝露於光線中。換士之, 光罩影像在半導體表面光阻層形成。此影像可能爲1:1=像 或10:1影像,或其他比例。藉由曝光使得光阻根據該光罩斗 -5- 本紙張尺度適用中國國家標準(CNS)A4規格(21Q x 297公爱) — — — — Lilli — — MV · I I I I I I I 11111111 (請先閱讀背面之注意事項再填寫本頁) 495851 經濟部智慧財產局員工消費合作社印制衣 五、發明說明(3 )影像改變組成。 半導體晶圓7與光罩4二者相對於光束2移動,以便於對半 導體表面整個光阻曝光。因此半導體晶圓7黏著於支撑8之 上’而支撑本身連接至可動之xy_桌面。詳細之光學系統盘 受黏著晶圓7列於圖2。晶圓7包含一些晶粒u。圖2中一些 晶粒11已經曝光(白色方框),以及—些晶粒i ^要曝光(黑 色方框”爲了獲取半導體表面上的晶粒,黏著晶圓7之: 撑8固定料步進器驅動(未列出)之可動xy_桌面。來自光源 1之光線藉由準直透鏡5與投射接物鏡6對光線做準直與 於晶圓7。 光阻曝光後’孩半導體晶圓7表面之光阻顯影與清除,來 移除至少部分之該光阻。自半導體表面移除光阻層的部分 視光源1而來的光線通過光罩4或受光罩4阻絕而定。更進一 步説’其視光阻14形式而定。假如使用正光阻,顯影後受 曝光阻移除,假如使用負光阻,顯影後未受曝光 體表面移除。 隨著晶圓7表面剩餘光阻,定義出想要區域以進行後續離 子佈植步驟。離子於任何光阻移除區域穿入半導體,因此 半導體電導値能以選擇適當劑量與剖面(半導^ 度),於通當區域決定。 a ^ 然而,先前技術中整個晶圓上離子佈植劑量相同。一般 而言’不可能建立半導體上離子佈植劑量刻意非等量分 佈,除非使用幾道光罩,每—道分別定義離子所需要佈植 的圖形。此需要耗時與昂貴硬體。發 ^ 贽明者提出碉變剩餘光 !·! (請先閱讀背面之注意事項再填寫本頁) r·裝 !|1 訂-------495851 A7 ------------ V. Description of the invention (1) Field of the invention The present invention relates to a method for forming a fine structure on a semiconductor wafer i using a photolithography etching step and an ion implantation step. . Background The general doped semiconductor method is established by preparing a photomask with photolithographic etching steps and < implanting ions into the semiconductor to determine its conductivity according to the doping profile and doping level. > If different regions of the semiconductor require different doping characteristics, the same implantation process must be performed several times, each time with a new photomask for exposure, development, and etching of other regions on the semiconductor for subsequent implantation operations. In other words, basically the same steps are repeated several times to change at least one parameter. This is time consuming and costly. Therefore, a single photolithographic etching step is required to allow the implant depth and dose to be varied at different locations on the IC. Brief description of the drawings_ Figure 1 lists the main light paths in the photolithography etching equipment to which the present invention is applicable. Figure 2 is a perspective view of the main parts of the equipment of Figure 1. Printed by the Intellectual Property Bureau's Consumer Cooperatives of the Ministry of Economic Affairs ^ Figures 3A to 3C list the effects of partial light blocking on the photoresist before, during, and after development and removal. Detailed description The principle of the present invention is established in the image field area of the optical imaging system. After the photolithography step is performed at different positions, different residual photoresistance thicknesses β will be generated. The adjustment of the residual photoresistance thickness will allow ion dispersing later. In the step of planting, the adjustment -4- this paper rule Guanxun Lai 7 ^ 7 public ^ 495851 A7 B7 printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs It is both. • The method of forming a structure on a semiconductor wafer by a photolithography etching step and an ion implantation step includes the steps of: depositing a photoresist layer on the surface of the semiconductor wafer, and the photoresist layer Exposure to a predetermined wavelength of light through the photomask and optical system to form the photomask image on the surface of the semiconductor wafer, develop and clear the surface of the semiconductor wafer, and remove at least part of the photoresist depending on whether the photoresist layer is exposed The layer 'ion implantation determines the conductance of the area to be cleaned on the surface of the semiconductor wafer, and before the light is exposed to the iij, a fine structure is deposited on a predetermined area and a predetermined distribution on the photomask. The structure has at least one dimension smaller than the resolution of the optical system. A low-contrast photoresist is preferably used to give the fine structure a wider range of resolution (analysis size range. Similarly, a low-resolution optical system is also needed. One of the inventions The advantage is the establishment of all 1 (: the number of implants required is reduced. Figure 1 shows a schematic diagram of the light path in the prior art photolithography etching equipment. The light is emitted by the light source 1, which is preferably a laser or mercury bulb. Light with a wavelength between 300-450 nm. The light from the light source 丨 is guided by several optical elements 3 such as mirrors and lenses on path 2 to the photomask 4. The photomask 4 contains the semiconductor wafer The structure image formed by 7. For this sequence, a (not listed) is deposited on the surface of the semiconductor wafer 7. The light passing through the photomask 4 and the collimator lens 5 from the light source i, and the projection lens 6 is projected. Before reaching the surface of the semiconductor wafer 7, the resistance layer is exposed to light. In other words, a mask image is formed on the semiconductor surface photoresist layer. This image may be a 1: 1 = image or a 10: 1 image, or other ratio. Make light by exposure According to the mask bucket-5- This paper size applies Chinese National Standard (CNS) A4 specification (21Q x 297 public love) — — — — Lilli — — MV · IIIIIII 11111111 (Please read the precautions on the back before filling this page ) 495851 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (3) The composition of the image changes. The semiconductor wafer 7 and the photomask 4 are moved relative to the light beam 2 to facilitate exposure of the entire photoresist on the semiconductor surface. Therefore, the semiconductor wafer 7 is adhered on the support 8 and the support itself is connected to the movable xy_desktop. The detailed optical system disk adhered wafer 7 is shown in Fig. 2. The wafer 7 contains some dies u. Some dies 11 have been exposed (white boxes), and some dies i have to be exposed (black boxes) In order to obtain the dies on the surface of the semiconductor, the wafer 7 is adhered: support 8 stepper drive (Not listed) of the movable xy_desktop. The light from the light source 1 is collimated with the wafer 7 by the collimating lens 5 and the projection objective lens 6. After the photoresist is exposed, the photoresist on the surface of the semiconductor wafer 7 is developed and removed to remove at least part of the photoresist. The portion where the photoresist layer is removed from the semiconductor surface depends on whether the light from the light source 1 is blocked by the photomask 4 or the photomask 4. Furthermore, it depends on the form of the photoresist 14. If a positive photoresist is used, it will be removed by exposure after development. If a negative photoresist is used, the surface of the exposed body will not be removed after development. With the remaining photoresist on the surface of the wafer 7, a desired area is defined for subsequent ion implantation steps. Ions penetrate the semiconductor in any photoresist removal area, so the semiconductor conductance can be determined in the appropriate area by selecting the appropriate dose and profile (semiconductivity). a ^ However, the ion implantation dose is the same across the wafer in the prior art. In general, it is not possible to establish a deliberately non-equal distribution of ion implantation doses on semiconductors, unless several masks are used, each channel defining a pattern of ion implantation separately. This requires time-consuming and expensive hardware. ^ The person who made the issue proposed to change the remaining light! ·! (Please read the precautions on the back before filling this page) r · 装! | 1 Order -------

-6 - 〜丄 〜丄 經濟部智慧財產局員工消費合作社印製 A7 五、發明說明(4 ) 阻厚度’使晶圓7表面的透射率呈現空間性改變予與離子使 用。 光阻厚度的調變可以藉由調變光罩4上不同位置的光線透 :率而獲得。然而’在光罩4添加材料來做區域化光罩透射 :修正將導致昂貴的光罩製作。由於佈植層就解析度而 。通系不疋關鍵層次,因此由低解析度光學系統執行。 根據f發明之細結構,例如,在光罩上形成鉻圖形。此細 結構實質上在光罩4上提供一侗二維圖々。其中之一維度低 於實際透鏡解析度。例如_個次解析度方形鉻(類似一個格 子)或圖形。因爲這些圖形不受透鏡解析,它們實際上爲步 進機之調變透射率圖形。藉由改變次解析度圖形密度,或 安置,或形狀,有可能區域性控制光罩光線的透射率。 如此之細結構1〇伴隨著圖丨中“正常,,結構9列出。細結構 10在‘正常”結構9旁邊預定區域沉積。此外,它們在該光阻 Η曝露於來自光源丨光線之前,光罩4上正常尺寸結構間, 該光罩4預定密度分佈。必備條件爲,該細結構丨〇至少一爲 度低於該具有鏡面3,準直透鏡5,以及接物鏡6之光學系統 解析度。 爲了細結構10擁有較寬範圍的可能之小尺寸,使用_種 低對比光阻材料,視透射率調變情形,其或多或少引起顯 著的光阻泡沫。低對比光阻之剩餘厚度對於曝光劑量自 100% (未曝光)緩慢減至0% ( 一旦超過臨界曝光量),此與 鬲對比光阻以步階方式改變相反。因爲對比視圖形大小而 定,且由於光罩透射率調變圖形上之低對比材料使得以在 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) --r.---:--------------訂--------- (請先閱讀背面之注意事項再填寫本頁) 495851 A7 五、發明說明(5 ) 暴光心像内不同位置控制與調整剩餘光阻厚度,因此之後 的佈植劑量與深度可以局部調整。 (請先閱讀背面之注意事項再填寫本頁) 爲了延展細結構較小可能之尺寸範圍,進一步使用具有 鏡面3,準直透鏡5,以及接物鏡6之低解析度光學系統。 <光阻厚度調變效應列於圖3A至3C中。由於光學系統透射 率的變化,曝光線13可局部變化強度。此於圖3A中以不同 長度箭號表示;較長箭號代表較高強度,反之則代表較低 強度。光線13到達沉積在半導體層15上之光阻14。本實施 例中,第一半導體層15本身在第二半導體層16之上。因爲 根據光阻14經過顯影與清除步驟後,留下不同厚度於半導 體表面,以及在整個表面具有調變性結構,使得光線Η具 有不同強度,例如,包含氣泡17 (圖3B)。表面上光阻層Μ 較薄區域處,以離子佈植步驟(未列出)將離子穿越深入半 導體。因此表面上較薄剩餘光阻層區域關於其電子特性不 同於鄰近較厚剩餘光阻層區域。之後更深入步驟爲第二半 導fa層I5區域保持南離子密度(圖3C)。 因此根據本發明之方法可以於半導體内/上提供不同離子 佈植圖形,而僅需極少額外硬體:只需次解析度結構安罾 在光罩上,或光源與半導體上光阻之間.光線路徑任意處。 經濟部智慧財產局員工消費合作社印制衣 -8- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 經濟部智慧財產局員工消費合作社印製 495851 A7 _B7 五、發明說明(6 ) 參考數字 1 光源 2 光束 3 光學導引元素 4 光罩 5 準直透鏡 6 投影物鏡 7 晶圓 8 晶圓支撑 9 光罩上之正常尺寸結構 10 具有低於光學解析度之結構 11 晶圓上之晶粒 12 xy-桌面 13 曝曬光線 14 光阻 15 第1半導體層 16 第2半導體層 17 光阻中的氣泡 -9 - 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公釐) (請先閱讀背面之注意事項再填寫本頁)-6-~ 丄 ~ 丄 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 V. Description of the Invention (4) The thickness of the barrier ′ causes the transmittance of the surface of the wafer 7 to be spatially changed for the use of ions. The adjustment of the photoresist thickness can be obtained by adjusting the transmittance of light at different positions on the reticle 4. However, adding material to the mask 4 to make the mask transmission transparent: Correction will result in expensive mask production. Due to the resolution of the implant layer. Because the system is not critical, it is performed by a low-resolution optical system. According to the fine structure of the f invention, for example, a chromium pattern is formed on the photomask. This fine structure essentially provides a two-dimensional map on the photomask 4. One of these dimensions is lower than the actual lens resolution. For example, _ sub-resolution square chromium (similar to a grid) or graphics. Because these patterns are not parsed by the lens, they are actually the modulated transmittance patterns of the stepper. By changing the sub-resolution pattern density, or placement, or shape, it is possible to regionally control the light transmittance of the mask. Such a fine structure 10 is listed along with "normal, structure 9" in the figure. The fine structure 10 is deposited in a predetermined area next to the 'normal' structure 9. In addition, before the photoresist is exposed to light from the light source, the photomask 4 has a predetermined density distribution among the normal-sized structures. The necessary condition is that the fine structure is at least one degree lower than the resolution of the optical system having the mirror surface 3, the collimating lens 5, and the objective lens 6. In order for the fine structure 10 to have a wide range of possible small sizes, a low-contrast photoresist material is used, which, depending on the modulation of the transmittance, causes more or less significant photoresist foam. The remaining thickness of the low-contrast photoresist slowly decreases from 100% (unexposed) to 0% (once the critical exposure is exceeded), as opposed to the 鬲 -contrast photoresist changing in a stepwise manner. Due to the size of the contrast image, and the low contrast material on the mask transmittance modulation pattern, the Chinese National Standard (CNS) A4 specification (210 X 297 mm) is applied at this paper scale --r .-- -: -------------- Order --------- (Please read the notes on the back before filling this page) 495851 A7 V. Description of the invention (5) Exposure image The remaining photoresist thickness is controlled and adjusted at different positions in the interior, so the subsequent implant dose and depth can be locally adjusted. (Please read the precautions on the back before filling out this page.) In order to extend the smaller possible size range of the fine structure, a low-resolution optical system with a mirror 3, a collimator lens 5, and an objective lens 6 is further used. < Photoresist thickness modulation effects are shown in Figs. 3A to 3C. Due to the change in the transmittance of the optical system, the intensity of the exposure line 13 may be locally changed. This is shown in Figure 3A by arrows of different lengths; longer arrows represent higher intensities, and vice versa. The light 13 reaches a photoresist 14 deposited on the semiconductor layer 15. In this embodiment, the first semiconductor layer 15 itself is above the second semiconductor layer 16. After undergoing the development and removal steps according to the photoresist 14, different thicknesses are left on the surface of the semiconductor, and the entire surface has a modulating structure, so that the light rays have different intensities, for example, including bubbles 17 (FIG. 3B). At the thinner areas of the photoresist layer M on the surface, the ions are passed through the semiconductor in an ion implantation step (not listed). Therefore, the region of the thinner remaining photoresist layer on the surface differs from its adjacent region of the thicker remaining photoresist layer with respect to its electronic characteristics. A further step is to maintain the south ion density for the second semiconductor fa layer I5 region (Fig. 3C). Therefore, the method according to the present invention can provide different ion implantation patterns in / on the semiconductor, and requires very little additional hardware: only the sub-resolution structure is installed on the photomask, or between the light source and the photoresist on the semiconductor. Light path anywhere. Printed clothing for employees' cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs-8- This paper size applies to the Chinese National Standard (CNS) A4 (210 X 297 mm) Printed by the employee's consumer cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 495851 A7 _B7 V. Description of the invention (6) Reference number 1 light source 2 light beam 3 optical guiding element 4 mask 5 collimator lens 6 projection objective 7 wafer 8 wafer support 9 normal size structure on the mask 10 structure with lower than optical resolution 11 crystal Grains on a circle 12 xy-desktop 13 Exposure to light 14 Photoresistor 15 First semiconductor layer 16 Second semiconductor layer 17 Bubbles in photoresistor 9-This paper size applies to China National Standard (CNS) A4 (210 x 297) (Mm) (Please read the notes on the back before filling this page)

Claims (1)

495851 六、申請專利範圍 I:種藉由光微影蚀刻步驟與離子佈植步 上形成結構之方法,包括下列步驟: 、導虹时回 在該半導體晶圓表面沉積一光阻層, 將該光阻層透過光罩與光學系^ 中,以在該半導體晶圓表面形成該光罩圖像、广皮長光線 顯影與清除該半導體晶圓表面,視該光阻層是否曝光 來移除至少部分光阻層, 離子佈植決定在該半導體晶圓表面上受清除區域的電 導値, 其中在該光阻曝露到該光線之前,細結構沉積於預定 區域與光罩上預定分佈,該細結構至少有一維度尺寸小 於該光學系統的解析度。 2.如申請專利範圍第1項之方法, 其中光阻爲一種低對比光阻。 3·如申請專利範圍第丨項之方法, 其中光學系統爲一種低解析度光學系統。 經 濟 部 智 慧 財 產 局 員 工 消 費 合 作 社- 印 -10- 製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)495851 VI. Application Patent Scope I: A method for forming a structure by a photolithography etching step and an ion implantation step, including the following steps: 1. When a rainbow is guided, a photoresist layer is deposited on the surface of the semiconductor wafer, and The photoresist layer passes through the photomask and the optical system ^ to form the photomask image on the surface of the semiconductor wafer, and develops and clears the surface of the semiconductor wafer, removing at least as much as the photoresist layer is exposed. Part of the photoresist layer, the ion implantation determines the conductance of the area to be cleared on the surface of the semiconductor wafer, and before the photoresist is exposed to the light, a fine structure is deposited on a predetermined area and a predetermined distribution on the photomask. At least one dimension is smaller than the resolution of the optical system. 2. The method according to item 1 of the patent application range, wherein the photoresist is a low contrast photoresist. 3. The method according to the first item of the patent application, wherein the optical system is a low-resolution optical system. Employees' Co-operative Agency of the Intellectual Property Agency of the Ministry of Economic Affairs-India--10- Production This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)
TW090106319A 2000-03-20 2001-03-19 Photo-lithographic method for semiconductors TW495851B (en)

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US4231811A (en) * 1979-09-13 1980-11-04 Intel Corporation Variable thickness self-aligned photoresist process
DE3402653A1 (en) * 1984-01-26 1985-08-01 Siemens AG, 1000 Berlin und 8000 München Method for producing specially doped regions in semiconductor material
DE4020076A1 (en) * 1990-06-23 1992-01-09 El Mos Elektronik In Mos Techn METHOD FOR PRODUCING A PMOS TRANSISTOR AND PMOS TRANSISTOR
KR0161389B1 (en) * 1995-02-16 1999-01-15 윤종용 A mask and the method of pattern forming using the same

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