TW490634B - Method for performing two-dimensional discrete cosine transform and its inverse involving a reduced number of multiplication operations - Google Patents

Abstract

A set of scaled weighing coefficients is employed in the intrinsic multiplication stage of a six-stage DCT/IDCT fast algorithm for one of two one-dimensional DCT/IDCT operations so that a corresponding stage of the DCT/IDCT fast algorithm for the other one of the one-dimensional DCT/IDCT operations can be omitted. Accordingly, the number of multiplication operations for two-dimensional DCT/IDCT processing is reduced in order to achieve a higher processing speed.

Description

Printed by the Central Bureau of Standards, Ministry of Economic Affairs and Consumer Cooperatives 490634 A7 _ B7 V. Description of the Invention (,) ^^ ~ ^ The present invention relates to a method for performing discrete cosine transform (DCT) and its inversion. More specifically, the system It relates to a method for performing two-dimensional DCT / IDCT which can reduce multiplication. The applicant's U.S. Patent No. mi, 412 discloses-a type 5 discrete cosine transform (DCT) and inverse discrete cosine transform (DCT) of continuous input data of an 8x8 data block using a six-stage arithmetic DCT / IDCT rapid algorithm Industrial DCT) method and device. The six-level operation of the DCT / IDCT rapid algorithm usually includes butterfly-type operation stages, multiplication operations, and stages that are interchangeably inserted. These multiplication stages include internal multiplication, multiplication after addition, and subtraction after multiplication by 10. In the aforementioned U.S. patent, a single butterfly operation unit performs the butterfly operation stages, and a single multiplication operation unit performs the multiplication stages. The butterfly operation unit and the multiplication operation unit operate in a cyclic and parallel processing form, so DCT and industrial DCT can be efficiently achieved at a relatively low hardware cost. 15 The first and third figures respectively depict the flow diagrams of the six-stage operation DCT and IDCT rapid algorithms used in the aforementioned US patent case. The DCT rapid algorithm uses three arithmetic operations: butterfly, internal multiplication, and multiplication after addition, as shown in the second A to C diagrams. The IDCT rapid algorithm also uses three arithmetic operations: butterfly, internal multiplication, and subtraction 20 after multiplication, as shown in the second A, two B, and two D diagrams. Please refer to the first figure. The six-level operation of the DCT rapid algorithm includes a first-level operation including four butterfly-type operations, a second-level operation including multiplication operations after rain, and / The third-level operation of the four butterfly pupa operations, and the fourth-level operation including three multiplication operations after addition. Page 4 This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm). C Please First read and read the N% notes and fill in this tribute.) Tr 490634 A7 B7 V. Description of the invention (2), arithmetic, a fifth-level operation including four butterfly-type operations, and one including eight internal multiplication operations Sixth-level operation. Please refer to the third figure, the six-level operation of the DCT rapid algorithm includes a first-level operation including eight internal multiplication operations, a second-level operation including four or five butterfly operations, and one including three A third-level operation including multiplication and subtraction, a fourth-level operation including four butterfly operations, a fifth-level operation including two multiplication-subtraction operations, and a four- butterfly operation Sixth level operation. In general, the DCT / IDCT multiplication system is time consuming and requires quite complex hardware. Although the aforementioned US patent case uses a rapid algorithm that only contains thirteen multiplication operations for one-dimensional transformation, or only 208 (2x8x13) multiplication operations for two-dimensional transformation of an 8x8 data block, it is still a further step It is desirable to reduce the number of multiplication operations and achieve higher processing speed. 15 Therefore, an object of the present invention is to provide a method for performing two-dimensional DCT / IDCT which can reduce multiplication operations. Printed by the Consumer Standards Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs (please read the notes on the back before filling this page). According to a feature of the present invention, a continuous one-dimensional discrete cosine transform (DCT) operation including first and second rounds A two-dimensional DCT method is provided. Each of the first and second rounds of one-dimensional DCT operations uses a six-stage operation DCT to quickly perform a 20 algorithm to process continuous input data of an 8x8 data block, which can generate continuous conversion data. The DCT rapid algorithm includes the first, third, and fifth stages including several butterfly operations, the second and fourth stages including several multiplication operations after addition, and the first stage including several internal multiplication operations. Six levels. The two-dimensional DCT method includes the following steps: Page 5 This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 490634 Printed by the Consumers Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7 V. Invention Description (3) (a) Provide an input unit to receive input data; (b) Control the input unit to provide the input data to a butterfly-type computing unit; enable the butterfly-type computing unit to perform the DCT of the first round of one-dimensional DCT operations quickly First-level operation of the algorithm; 5 (c) Control a data register unit to store the first-level output data from the butterfly-type arithmetic unit; (d) Control the data register unit to provide a predetermined first-level unit Output data to a multiplication unit. The multiplication unit 10 can be enabled to perform the second-stage operation of the DCT rapid algorithm when the predetermined first-stage output data has been stored in the data register unit; ( e) controlling the data register unit to store second-level output data from the multiplication unit; (f) controlling the data register unit to provide the first stage and The second stage outputs data to the butterfly-type arithmetic unit. After the butterfly-type arithmetic unit has completed the first-stage operation of the DCT rapid algorithm, the butterfly-type arithmetic unit can be enabled to execute the first stage of the DCT rapid algorithm. Three-level operation (g) Control the data register unit to store the third-level output data from the butterfly-type arithmetic unit; 2 0 (h) Control the data register unit to provide a predetermined third-level output data to the The multiplication operation unit may enable the multiplication operation unit to perform the fourth-level operation of the DCT rapid algorithm when the predetermined third-level output data has been stored in the data register unit; (i) control the data temporarily The register unit stores page 6 from the multiplication unit. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) (Please read the precautions on the back before filling this page) 490634

5. Description of the Invention (Jiang) 5 The level 4 output data is printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs; (> j) Control the data register unit to provide the level 3 and level 4 in a predetermined order. Output data to the butterfly-type arithmetic unit. After the butterfly-type operation, single 70 has completed executing the third-level operation of the DCT rapid algorithm, enable the butterfly-type arithmetic unit to perform the fifth-level operation of the DCT rapid algorithm. ; User (k) controls the data register unit to store fifth-level output data from the butterfly-type arithmetic unit, and the fifth-level output data functions as one-dimensional conversion data of rate conversion; (l) controls the data register The unit provides the magnification conversion one-dimensional conversion data to the butterfly-type operation unit in another direction, and can enable the butterfly-type operation unit to perform the first-level operation of the DCT rapid algorithm of the second round of one-dimensional DCT operation; ( m) · Repeat steps (C) to (j) to perform the second to fifth stage operations of the DCT rapid algorithm of the second round of one-dimensional DCT operation; (η) control the data register unit to store data from the Butterfly type arithmetic unit The fifth-level output data, the fifth-level output data functions as two-dimensional conversion data. (0) Controls the data register unit to provide the two-dimensional conversion data to the multiplication unit. The multiplication operation unit can perform the sixth-stage operation of the DCT rapid algorithm of the second round of one-dimensional DCT operation based on a set of multiplication factor weighting coefficients stored in the multiplication early difference element Rojy [ Obtain the two-dimensional conversion data corresponding to the input data. The ratio conversion weighting coefficients are DCT for the first and second round / dimensional DCT operations. Page 7 This paper applies Chinese National Standard (CNS) 8-4 specifications. (210X 297mm) (Please read the notes on the back before filling out this page), 11 Printed by the Employees' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 490634 A7 ^ __ B7 _________ V. Description of the invention (S ^ Speed algorithm 6th level A product of the weighting coefficients; and (р) controlling an output unit to receive the two-dimensional conversion data from the multiplication unit. According to another feature of the present invention, a first-round and first-round 5-dimensional inverse are included. A two-dimensional IDCT method for transforming difficult-to-scatter cosine transform (ICD) operations is provided. Each of the first and second rounds of one-dimensional DCT operations uses a six-stage operator DCT to quickly process the 8x8 data block Continuous input data can generate continuous conversion data. The IDCT rapid algorithm includes a first-level operation including several internal multiplication operations, a second 10, fourth and sixth-level operations including several butterfly operations, and The third and fifth stage operations of a number of subtraction operations after multiplication. The two-dimensional IDCT method includes the following steps: (a) providing an input unit to receive input data; (b) controlling the input unit to provide the input data to A multiplication. Operation unit: enables the multiplication operation unit to perform the IDCT rapid algorithm of the first round of one-dimensional DCT operation according to a set of multiplication factor weighting coefficients stored in the coefficients ROM of the multiplication operation unit 15 The first-stage operation, the ratio conversion weighting coefficients are the product of the first-stage weighting coefficients of the IDCT rapid algorithm of the first and second rounds of one-dimensional IDCT operations; (с) controlling the storage of a data register unit The first-stage output data is converted from the multiplying unit at a rate of 20; (d) the data register unit is controlled to provide the first-stage output data to the rate-converting unit to a butterfly-type arithmetic unit; This first round of one-dimensional IDCT calculation is based on the second-level operation of the rapid IDCT algorithm. Page 8 This paper size is applicable to China National Standard (CNS) M specifications (210X297 mm) (Please read the precautions on the back before filling this page ) Order 490634 A7 B7 V. Description of the invention 5 10 15 The Ministry of Finance «.Winter lhc-τ. Eliminated by the cooperative private system 20 (e) Control the data register unit to store the data from the butterfly-type arithmetic unit. Second-level output data, (f) controlling the data register unit to provide a predetermined second-level output data to the multiplication unit, so that the predetermined second-level output data has been stored in the data register unit Enable the multiplication unit to perform the third-level operation of the IDCT rapid algorithm; (g) control the data register unit to store the third-level output data from the multiplication unit; (h) control the data The material register unit provides the second-level and third-level output data to the butterfly-type arithmetic unit in a predetermined order, and can be enabled after the butterfly-type arithmetic unit has completed executing the second-stage operation of the IDCT rapid algorithm. The butterfly-type arithmetic unit performs the job; the fourth-level operation of the DCT rapid algorithm j (i) controls the data register unit to store the fourth-level output data from the butterfly-type arithmetic unit; (j) controls the data temporarily The register unit provides a predetermined _ fourth level output to the multiplication unit. The multiplication unit can be enabled when the predetermined fourth level output data has been stored in the data register unit. The fifth-level operation of the IDCT's rapid algorithm; 00〇 controls the data register unit to store the 11 items of p material from the ^ Yunyi early plate temporarily to provide the fourth $ to calculate the single heart into a butterfly 1 After the fourth stage of the IDCT's rapid surprise method, the paper size of Yuan applies to the Chinese National Standard No. 9 Buy (2K) X 297 mm) (Please read the precautions on the back before filling this page)

4 ^ U634 A7 B7 5 V. INTRODUCTION OF THE INVENTION The butterfly-type arithmetic unit performs the sixth-level operation of the IDCT rapid algorithm. (M) Controls the data register unit. The butterfly-type arithmetic unit can be stored in steps ( 1) Generated one-dimensional conversion data of magnification conversion; (η) Control the data register unit to provide the magnification-converted one-dimensional conversion data to the butterfly-type arithmetic unit in another direction, enabling the butterfly-type arithmetic unit to execute The second-level operation of the second round of one-dimensional DCT calculations. The second-level operation of the fast DCT algorithm; (0) Repeat steps (i) to (1) to perform the second round of one-dimensional IDCT calculations. Third to sixth stage operations; and (ρ) after step (0), controlling an output unit to receive the sixth stage output data from the butterfly-type arithmetic unit as two-dimensional conversion data corresponding to the input data. Other features and advantages of the present invention will become clearer in the following detailed description of the preferred embodiments with reference to the accompanying drawings, in which: The first diagram is used in the conventional technique for one-dimensional transformation operation of a DCT device. Flow chart of the DCT rapid algorithm used; Figure A shows the butterfly operation in the flow chart of the first picture; Figure B shows the internal multiplication operation in the flow chart of the first picture; Figure C Draw the multiplication operation after the addition in the flow diagram of the first picture. The second D diagram describes the multiplication and subtraction operation used in a 1DCT rapid algorithm. The third picture is in the conventional technique of IDCT. One-dimensional transformation operation of the device. Page 10 Guan Family Standard Rate (CNS) A4 ^ (21〇X 297 ^ t / (Please read the precautions on the back before filling out this page) Order 490634 5 5 10 A7 B7 、 Description of invention (¾) The flow chart of the rapid DCT algorithm used in the process; the fourth diagram is a flowchart of the preferred embodiment of the DCT method of the present invention; the fifth diagram is the flowchart of the preferred embodiment of the DCT method of the present invention; FIG. 6A depicts a group used in the DCT method of the preferred embodiment of the present invention. Figure 6B depicts a set of ratio conversion weighting coefficients used in the IDCT method of the preferred embodiment of the invention; Figure 7 is used to implement the dct / idct method of the preferred embodiment of the invention Figure 8 is a schematic circuit block diagram of an example of a DCT / IDCT device; Figure 8 is a timing diagram depicting the operation of the device in Figure 7 when performing a two-dimensional DCT; Figure 9 is a device in which the device in Figure 7 is green Timing diagram of DCT time and rich a; (谙 Read the precautions on the back before filling out this page} 15 The tenth diagram is another example of a DCT / IDCT DCT / IDCT device used in the preferred embodiment of the present invention The schematic circuit block diagram; and the eleventh diagram is a timing diagram of the operation of the device drawing the tenth diagram. The component number comparison table method order 2 0 1 3 21 31 33 35 input unit multiplication unit multiplexer input selection Multiplexer circuit output selection multiplexer 2 4 22 32 34 WP1 write to the port butterfly type arithmetic unit data register butterfly type circuit addition / subtraction circuit coefficient ROM Dln rotation data WP2 write to port spring page 11 paper Zhang scales suitable for China Standard (CNS) 乂 specifications (210X297 mm) 490634 A7 B7 V. Invention description 5 10 RP1 read port RP2 read port 101 DCT / IDCT processing unit 102 DCT / IDCT processing single 103 control unit 1011 input unit 1012 butterfly type Operation unit 10121 Multiplexer 10122 Butterfly circuit 1013 Multiplication unit 10131 Input selection multiplexer 10132 Addition / subtraction electric defeat 10133 Multiplier circuit 10134 Coefficient ROM 10135 Output selection multiplexer 1014 Data register single # 1021 Butterfly operation Unit 10211 Multiplexer 10212 Butterfly circuit 1022 Multiplication unit 10221 Input selection multiplexer 10222 Addition / subtraction circuit 10223 Multiplier circuit 10224 Coefficient ROM 10225 Output selection multiplexer 1023 Data register unit 1024 Output unit Read the notes on the back to replant the 'write this page j 15 in the Ministry of Economic Affairs «: ^ ， 0, J. Elimination of cooperation and printing of India 20 Please refer to the fourth figure. The two-dimensional DCT method of the present invention is better The embodiment is shown to include successive first and second rounds of one-dimensional DCT operations. The first round of one-dimensional DCT operation includes the first five stages of the DCT rapid algorithm shown in the first figure, and is executed to obtain a one-time conversion of one-dimensional DCT block data from an input original block data. The second round of one-dimensional DCT operation includes the six-level operation of the DCT rapid algorithm shown in the first figure, and is executed to obtain the two-dimensional DCT block data from the magnification conversion 〆 雉 DGT block data. In the second and fourth stages of each of the first- and second-dimensional DCT operations ... a2, the number of multipliers used in the multiplication operation after the addition of the difference is al. Page 12 of this paper Shizhou Central Circle National Standard (CNS) A4 specification (210'〆297 mm) 490634 A7 B7 5 5. The invention is clear (乂 b2 and b3, as shown in the first picture. However, because of the DCT The sixth-level operation of the rapid algorithm is omitted in the first round of a DCT operation of the DCT method of the present invention. 'A set of magnification conversion weighting coefficients is used.' The second round of one-dimensional DCT operation of the DCT rapid algorithm The sixth stage of the internal multiplication operation. Figure 6A shows that the second round of one-dimensional DCT operation uses the scaling factor used in the processing corresponding to the 8x8 matrix of a data block. As shown in the figure, The original weighting factor used in the internal multiplication of the sixth-level operation of the DCT rapid algorithm of the second one-dimensional DCT operation is converted by a different ratio converter for each row (or each column). If = 〇 to 7) is a quick calculation for the DCT shown in the first figure For the original weighting coefficients used in the internal multiplication of the method, the ratio converters (ci) of the first to eighth rows (or columns) are respectively cO, cl, c2, C3, c4, C5, C6, and C7. That is, the original weighting coefficient (cj) of the internal multiplication of the i-th row (or column) is converted to ci, j by the magnification, which is equal to the product of ci and cj ', where i and j == 0 to 7 , And the j-th one-dimensional transformed data of each row (or column) is F (j) as shown in the first figure. Please refer to the fifth figure. A preferred embodiment of the two-dimensional DCT method of the present invention is shown to include successive first and second rounds of one-dimensional DCT operations. The first round of one-dimensional DCT operation includes the six-level operation of the fast DCT algorithm shown in the third figure, and is executed to obtain one-time conversion of one-dimensional DCT block data from an input original block data. . The second round of one-dimensional IDCT operations includes the last five stages of the IDCT rapid algorithm shown in the third figure, and is executed to convert the one-dimensional IDCT block data from the magnification to obtain the appropriate paper size on page 13. State China National Standard Apple (CNS) A4 Specification (210X 297mm) Clothing — (Please read the precautions on the back before filling this page)

1T 490634 A7 ___________ B7__ V. Description of the invention) 2D DCT block data. In the first and second rounds of one-dimensional DCT calculations, the coefficients used in subtraction are multiplied by the third and fifth stage noses. The coefficients used in noses are qi, q2, q3, rl, and r2, as in As shown in the third picture. However, 'because the first-level operation of the DCT 5 speed calculation algorithm of this industry is omitted in the second round of one-dimensional DCT operation of the IDCT method of the present invention, a set of ratio conversion weighting coefficients is used in this first round. One-dimensional IDCT operation IDCT rapid algorithm in the first stage of the internal multiplication operation. Figure 6B shows the multiplier 10 conversion weighting coefficients Pi, j used in the first round of one-dimensional DCT operations and corresponding to the processing of an 8x8 matrix corresponding to a data block. As shown in the figure, in the first round of one-dimensional: [DCT operation IDCT rapid algorithm of the first stage of the internal multiplication operation of the original weighting coefficient used by a different magnification for each row (or each column) The converter performs rate conversion. The first to eighth rows (or columns) of pj (j = ◦ to 7) are the original 15 weighting coefficients used in the internal multiplication of the fast DCT algorithm shown in the third figure. The multiplier (Pi) is divided into two parts, J is p0, pl, p2, p3, p4, p5, pe, and P7 ° gp, and the original weighting coefficient p (j) of the inner multiplication of row i (or column) is different. ) Is scaled to become pi, j, which is equal to the product of Pi and pj, where i and j = 0 to 7, and the j-th one-dimensional conversion data of each row (or column) is 20 F (j) shown in the third figure. The seventh figure depicts a DCT / IDCT apparatus for performing the DCT / IDCT method of the preferred embodiment of the present invention. The DCT / IDCT device is substantially the same in structure as described in US Patent No. 5,471,4 I2, and is shown to include an input unit 1, a butterfly-type arithmetic unit 2, and a page 14 This paper is suitable for National Standards (CNs) / U specifications (2 丨 〇'〆297mm) ~ '' ~ (Please read the precautions on the back before filling this page)

5 10 15 The central part of the Department of Anger and Freedom. ^ Nc-T. Elimination of cooperation, social rules ...?: 20 ~ ---... Description of the invention ('孓 5 去 运 异 单元 3, 一 资料 料 单元 6 ° '4, one round-out unit 5 and one controlling the round-in unit i are shown) receiving -_ data blocks from Yilu, slave-external devices (not shown in the figure earlier than Yuan 1 series can be operated, can be worshipped ^ wheel The input data (Din) is sent to the conversion operation of the 运 -type transport pipe Λ to input the input data 3. Open Early Fan 2 or go to the multiplication unit. The butterfly type arithmetic unit 2 includes-multiplexing cry 22. The butterfly circuit 22 generates two input two and one butterfly circuit. The worker 21 has a sum and a difference of the materials. The multi-connected to the round unit 丄 and ㈣; ^^ 6's selection input and be. The control unit 6 inputs data from the data input terminal of the Duoqiao 21 4) or data from the material input ^ from the input material 1 and will be Xi, Deng pin times η, the inventory state is early 4, The selection data is provided to the butterfly circuit 22 and the enabling circuit 22 executes the butterfly operation. The output of the "4" dust circuit 22 is stored in the bezel temporary H list it 4 or sent to the output unit 5 . The multiplying material 3 includes a round-selection multi-H__addition / addition circuit 32, a multiplier circuit 33, a coefficient CM, and a] 哕: a multiplexer 35. The coefficient function 34 includes a plurality of weighting coefficients for inputting one of the operands 33 of the multiplexer circuit 33, including the weighting coefficients for the magnification conversion shown in the six A and six B figures. The multiplication: Yunyi early 3 can perform internal multiplication operations, multiplication operations after addition, and subtraction operations after multiplication. Input data from the input unit worker such as two or data from the data register unit 4 is sent to the addition / subtraction page 15 National Standard (CNS) A4 specification (210X297 mm)

490634 A7 B7 Intermediate rate ii Cooperation 五 t 20 V. Description of the invention (o) The circuit 32 or the multiplexer 31 is selected at the input, and the multiplication unit 3 can be enabled to perform the desired arithmetic operation. The rounds of the addition / subtraction circuit 32 and the multiplier circuit 33 are sent to the output selection multiplexer 35, which can be stored in the data register unit 4. The output of the multiplier circuit can also be sent directly to the output unit 5. As for the multiplication unit; 3 how to perform internal multiplication, multiplication after addition, or subtraction after multiplication, as already described in the aforementioned US patent case, for the sake of brevity, it will not be repeated Overlay description. The data register unit 4 is a four-port register with two write ports (wpl, wp2) 10 and two capture ports (RP1'RP2). The first group of read and write (RPl'WPl) is connected to the butterfly type arithmetic unit 2 and the second group of read and write ports (RP2, WP2) is connected to the multiplication unit 3. The data register unit 4 functions to store the data from the butterfly-type arithmetic unit 2 彳 the multiplication operation I3, and further functions to provide data 15 to them. This output is early & 5 is a multi-smart device, whose end view is DCT or is executed to transfer the output of the butterfly circuit 22 or the county circuit 33. Finally, the control unit 6 is responsible for the report. Xixi is temporarily crying — ^ ^ Bay controls the coefficient ROM 34 and the temporary storage state of the asset 4: | Buy / write operation, multiplexer 35 . The control sheet is also responsible for controlling the operation of the remaining components of different DCT / T-removing devices. Second, it is responsible for controlling the eighth and ninth figures. The eighth and ninth figures are the preferred embodiments of the present invention depicting the operation of the device in the M and IDCT methods. The ^ figure. In the present invention, on the 16th page of this paper, the paper size of the paper size (cm) A4j ^ m (210 ^ 29¾ 490634 A7 B7 V. Description of the invention (\\ V) 5 10 15 ΛΒ-t. Consumer Cooperative Cooperative 20% 20 When the data block (N) encounters two-dimensional DCT / IDCT, the magnification conversion is one-dimensional conversion · -.....-------------- ---- The data was obtained after the first round of one-dimensional DCT / IDCT operation. The magnification ......-............ ........ ... One .......................... Converting one-dimensional conversion data and then encountering the second round of one-dimensional DCT / IDCT operation. The two-dimensional DCT / IDCT data can be obtained In the DCT / IDCT device of the seventh figure, the first stage of the first round of one-dimensional DCT / IDCT operation is executed immediately upon receiving the input data block (N). The two-dimensional DCT / IDCT data system Obtained from the output of the sixth stage of the second round of one-dimensional DCT / IDCT operation. During the two-dimensional DCT / IDCT, the result of the first round of one-dimensional DCT / IDCT operation of the data block (N) is stored in the Data register unit 4. Since the original data block is input in a row, the transformation obtained from the first round of dimensional DCT / IDCT operations The material block must be transposed and can be processed in a row. The result of the first round of one-dimensional dct / idct operation of the data block (N) is required to be stored in the data register unit 4. The data register unit The structure of 4 allows the butterfly-type arithmetic unit 2 and the multiplication operation 3 to fetch and write personal data in it on the same day, thereby enabling the butterfly, operation list it 2 and recording operation material 3 to be processed in parallel pipelines. The following is a detailed description of how the device in Figure 7 performs the DCT and industrial DCT methods of the preferred embodiment of the present invention. Μ Please refer to Figures 7 and 8 again. In this first round of one-dimensional dct transport of 8x8 pixel blocks, The sixty-four pixel data are sequentially provided in a row manner (or in a column manner) to the enthusiasm input as early as 7L 1. The control unit 6 controls the input unit;] _ sends the round mushroom retention -. ^ ^ Do not enter the pixel data (Din) to the butterfly i ^ r single 702, 俾 can enable the butterfly torture swordsmanship 'Tan Yun Yi early Yuan 2 implementation including page 17 of this paper size 剌Towel _ （准 （CNS） A4 Specification (诮 Please read the precautions on the back before filling in this page)

、 1T m ----- 490634 A7 B7 V. Description of the invention (\ $) 5 10 15 20 The first-level operation of the DCT rapid algorithm of four butterfly operations per row (or column). The control unit 6 then controls the data register unit 4 so that the first-stage output data from the butterfly-type arithmetic unit 2 is stored in the data register unit 4 via the write port (WP1). When the predetermined first-level output data has been stored in the data register unit 4, the control unit 6 controls the data register unit 4 to transmit the predetermined first-level output data through the read port (RP2). Supplied to the multiplication unit 3, the multiplication operation unit 3 may start to perform the second-level operation of the DCT rapid algorithm including the multiplication operation of two additions of each row (or column), and the The butterfly-type operation unit 2 continues to perform the first-level operation of the DCT rapid algorithm. The control unit 6 again controls the data register unit 4 to store the second-stage output data from the multiplication unit 3 in the data register unit 4 via the write port (WP2). After the butterfly-type arithmetic unit 2 has completed the first-level operation of the DCT rapid algorithm, the control unit 6 controls the data register unit 4 to pass the first port through the read port (Rpi) in a predetermined order. The second-stage and second-stage output data are supplied to the butterfly-type arithmetic unit 2. The third stage of the DCT rapid algorithm that enables the butterfly-type arithmetic unit 2 to perform four butterfly-type operations per row (or column) is enabled. Operation. The control unit 6 again controls the data register unit 4 to store the third-level output data from the butterfly-type arithmetic unit 2 in the data register unit 4 through the write port (w ^). When the predetermined third-level output data has been stored in the 5Hai material storage register unit 4, the control unit 6 controls the data to be temporarily stored = Shan Fan 4 uses the reading port (RP2) to store the predetermined first-stage data. The third round consists of ^ left i, should go to the multiplication unit 3, you can enable the multiplication unit 3 Page 18-Sang! (Please read the two notes on the back page and fill in this page first), νφ This paper is suitable for CNS) A4 size (210X297mm) -__ 490634 A7 B7 V. Description of the invention 〇 5 10 15 20 Start to include each line (or Column) of the three operations of the DCT rapid algorithm of the multiplication operation after the three additions, and the butterfly-type arithmetic unit 2 continues the third-level operation of the DCT rapid algorithm. The control unit 6 controls the data register unit 4 to store the fourth-level output data from the computing unit 3 in the data register list _ through the writing port (wp2). After the butterfly operation unit 2 has completed the second-level operation of the milk rapid play ^, the control unit 6 controls the data register list_ 2 through the read port (RP1) to the third level And the fourth-stage rotation data ^ pre == sequentially supplied to the butterfly-type computing material 2, which can enable the butterfly-type early 2 to execute the other four butterfly-type operations that include each row (or column). Fifth level operation. The control unit 6 again controls the ft temporary storage $ zaowu4 to store the fifth-level output data from the butterfly-type operation unit 2 in the data register unit 4 the fifth level through the writing port (WP1). The output data is used as the first-round-dimensional DCT operation to multiply the one-dimensional conversion data. ^ ^ Unlike the two-dimensional ㈣ method disclosed in the aforementioned US patent case, the sixth-stage operation of the DCT rapid algorithm is in the first round = == 'omitted. Therefore, when the magnification conversion-dimensional conversion data Ϊ: coincidence register unit 4 is controlled, the control unit 6 controls the data 俨 = Where 4 through reading 璋 (RP1) sequentially outputs the rate in another direction Conversion-dimensional conversion data to the butterfly-type arithmetic unit 2, for example, ^ (or row), thereby enabling the butterfly-type arithmetic unit 2 to perform the first-order operation of the DCT rapid algorithm of the first round of one-dimensional DCT operation. . Second-dimensional DCT operation of the second to fifth-level operations of the DCT rapid algorithm. Page 19 (CNS) Am ^ (210X 297 ^) (Please read the precautions on the back before filling this page): Pei

、 1T — 4 ^ 0634 A7 B7 '* ·· ~ ——————- V. Description of the invention () 5 10 15 In the Ministry of Economic Affairs ^ standard ^-. ^ 5 ^. Consumer Cooperative Co., Ltd. Yin Fan 20, related to The second to fifth stage operations of the DCT rapid algorithm of the first-round-dimensional DCT operation are performed in the same form. Thereafter, the control unit 6 register unit 4 stores the fifth-level output data from the butterfly-type Lianyi 7L 2 in the data register unit 4 through the write port (wpi). The fifth-stage rotation data is used for the second-round one-dimensional DCT 4 conversion and two-dimensional conversion data. 4 — ^ Then, the control unit 6 controls the data register unit 4 to supply the magnification conversion two-dimensional conversion data to the multiplication unit 3 through the Γ access port (RP2), and the multiplication unit 3 can be enabled according to This group is shown in the sixth a diagram and stored in the coefficient ROM 34 with a weighting coefficient to perform the second round of one including eight internal multiplication operations per (or row): ... The sixth-level operation of the different method is quickly performed, so as to obtain the two-dimensional conversion data of the pixel data (Din). Finally, the g-controlling unit 6 controls the output unit 5 to receive the two-dimensional conversion data from the multiplication circuit 3: 3 of the multiplication unit 3, and can provide two devices for the two-dimensional conversion data (not shown). ^ Please refer to Figures 7 and 9 again. During the first round of one-dimensional IDCT operation, sixty-four transformation data of an 8XS transformation data block were sequentially supplied in columns (or rows). Go to the input unit 1. w One, the round-robin unit i sends the input conversion data (Din) to the multiplication unit 3, and can enable the multiplication unit 3 to perform a DCT including eight internal multiplication operations per column (or row). The first-level operation of the rapid algorithm is the one-dimensional I dct method disclosed in the U.S. patent case mentioned above. What's more, the first round of the IDCT rapid algorithm of the first one-dimensional DCT operation is the first 20 pages of paper A-size rule 'i] g] Home standard (⑽) A4 size (21 () > < 297 male sauce) (Please read the precautions on the back before filling out this page) Yi Pei-、 11 -1¾ " + ^ u〇J4 Description of the invention (A) A7 B7 5 10 15 λ 榀 挲 in the sludge department. T elimination cooperative cooperative system 20 According to the group in the sixth B 11 towels * and _ The weighting coefficients stored in the coefficient IDCT 1 are executed, and the second round of one-dimensional method operation is allowed; the omission of the first-stage operation of the 1DCT rapid algorithm is calculated. The multiplication π is earlier than π3 at this time, and the output magnification converts the first-stage output data. The list s 6 controls this: # 料 暂存 科 S The quilting of the multiplication unit 3 ~ f Qian Yumu enters Germany, the U-converter of the early x-level output data is through the writer: 2) storage In the data register unit 4. At the magnification conversion stage, the data is stored in the data register unit 4㈣, and the control controls the data register unit 4 through the reading port (then the available magnification conversion first-stage output data is supplied to The butterfly-type operation 2 can enable the butterfly-type operation unit 2 to perform a second-level operation of the IDCr rapid algorithm including four butterfly-type operations per column (or Ding). The control unit 6 controls the data again. The register unit 4 stores the second-stage output data from the butterfly-type arithmetic unit 2 in the data register unit 4 through the write port (WP1). When the predetermined second-stage output data has been stored in the When in the data register unit 4, the control unit 6 controls the data register unit 4 to supply the predetermined second-level output data to the multiplication unit 3 through the read port (RP2). The multiplication unit can be executed; 3 starts to perform the DCT fast / beijing second-level operation including the three multiplication and subtraction operations of each column (or row), and the butterfly-type arithmetic unit 2 continues to perform the: EDCT rapid algorithm second The control unit 6 controls the > material register unit 4 and stores the third-level output data from the multiplication and transport unit 3 in the data register unit 4 through the write port (Wp2). The butterfly-type computing unit 2 has completed the execution of the DCT operation. Page 21 The paper size is suitable for China • Standard (CNS) A4 (21Q X 297); (Please read the notes on the back first (Fill in this page again), τ Γ fa + ^ u〇J4 A7 five --------, invention description 5 10 15 ¾ ¾ printed by the central government's consumer cooperation cooperation 20 save the piano: after surprise, the The control unit 6 controls the data temporarily = early 7 " 4 through the material (then supply the second-level and second-level output data to the butterfly-type calculation sheet in a dare order) None: execute the data containing each column (or row). The second-level operation of the second-level algorithm = the rapid calculation algorithm of Gongmachi. The control unit is added to the 4th stage, and the data of the fourth-level rotation is stored in the data register = the second level. When the predetermined fourth-level output is output, The data has been stored in the data temporary ^ early Wu 4㈣, the control unit 6㈣ the data register 4 through = ㈣ fourth-level output data If the material is supplied to the multiplication unit 3 '俾, the multiplication unit 3 can start to perform the fifth-level operation of the idct rapid algorithm including two columns (or rows) which are multiplied and subtracted. ㈣_ type The operation unit 2 continues to perform the IDCT reading operation. The charm element 6 then makes the data stock 4 and stores the fifth-level output data from the multiplication operation unit 3 in the data through the write bee (wp2). In the register unit 4. After the butterfly operation unit it 2 has completed the fourth and j calculations of the idct rapid algorithm, the control unit 6 controls the data register unit 4 through the reading port. (RP1) Supply the fourth-level and fifth-level output data to the butterfly-type transport order 7C 2 with predetermined materials, and enable the butterfly-type arithmetic unit 2 to execute the other four including each column (or row). The sixth-level operation of the Gongling rapid algorithm of a butterfly-type operation. The control unit 6 controls the data register unit 4 to store the sixth-stage rotation data, and the sixth-stage output data serves as the first-dimensional IDCT operation of the magnification conversion-dimensional conversion data. Page 22 The paper size is appropriate (read the precautions on the back and then fill out this page) 4 V. Description of the invention A? Β7 5 10 15 Jk il Λ Λ Consumer Cooperatives 卬 t 20 tubes, as described in the previous section ' The second-stage IDCT of the second round of one-dimensional IDCT calculations is performed in the idgt method of the preferred embodiment of the present invention by f1. When the magnification conversion one-dimensional conversion data is stored in the data, the When within Zhaidan 70 4, the control unit 6 controls the data register unit 4 to sequentially output the magnification-converted one-dimensional conversion data to the butterfly-type arithmetic unit 2 through the reading port (RP1) in another direction. For example, in a row manner (or a column), thereby enabling the butterfly-type arithmetic unit 2 to perform the second-stage operation of the second round of the one-dimensional DCT operation different algorithm DCT rapid algorithm. The second round of dimensional maintenance DCT calculations is performed in the third round. The third to sixth stages of the rapid algorithm are then compared with the first round of one-dimensional DCT calculations. Stage operations are performed in the same form. Thereafter, the control unit 6 controls the output unit 5 to receive the sixth-level output data from the butterfly-type circuit 22 of the butterfly-type arithmetic unit 2 as the two-dimensional conversion data, and may provide the sixth-level output data to an external device. (Not shown). The tenth figure depicts another two-dimensional DCT / IDCT method / DCT / IDCT device for implementing a preferred embodiment of the present invention. The structure of the DCT / DCT device is based on the one described in U.S. Patent No. 5,471,412. The DCT / IDCT device of the tenth figure can perform a two-dimensional DCT / IDCT cycle and parallel pipeline processing of an 8x8 data block, and is shown to include two first and second rounds of one-dimensional DCT / IDCT processing units. 〇1,102 and a control unit 103. The first round of one-dimensional DCT / IDCT processing unit 101 includes: an input unit 1011, like a demultiplexer; a butterfly-type computing unit 1012 'which includes multiplexing ^ § 1012 1 and-butterfly profile Circuit 1012 2; a multiplication unit 1013, which includes a round-in selection multiplexer 1013, page 23 This paper is compliant with Sichuan National Standard (CMS) A4 specification (210X 297 mm) (please Please read the notes on the back before filling in this card)) The Ministry of Economics and Economics folder «.if ^ ht Consumption Report is not included 490634 Λ7 ----------------------- ---B7 V. Description of the invention (2 \) ~ S ~ ^ ~ --- An addition / subtraction circuit 10132, a multiplier circuit 1〇133, a coefficient R two then 4, and an output selection multiplexer 1 〇135; and _ temporary storage of data, unit (A) 1014, which is responsible for storing the results of the first round of one-dimensional dct / work π different levels of results and also serves as a supply of input data to discuss 5 The second round of one-dimensional Liyi / Gongmachi processing unit worker 02 transposed memory, the one-dimensional DCT / industrial DCT processing unit 102 includes: a butterfly-type computing unit 1021, which includes a multiplexer 1〇21; ί and a butterfly circuit, The multiplication unit 10¾2 includes an input selection multiplexer 10221, an addition / subtraction circuit 1022, a multiplier circuit 1023, a series of 10-digit ROM 11042, and an output selection multiplexer. Device 1022; a data register unit (B) 1023; and an output unit 1024, like a multiplexer. Because the sixth-level operation of the DCT rapid algorithm is omitted in the first two-dimensional Xdct operation, and because the first-level operation of the rapid DCT algorithm is in the second one-dimensional DCT operation Omitted, the multiplier circuits 15 10133, 10223 need individual coefficients r0m 10134, 10224. In particular, the coefficient ROM 10I3 4 contains al, a2, bl, b2, and b3 during the DCT process, and contains ql, q2, q3, rl, r2, and Pi, j (i, j = 〇 to 7). The coefficient ROM 10224 includes ai, a2, bl / b2, b3, and 20 CiAj (i, j = 0 to 7) during the DCT process, and includes ql, q2, q3, rl, and r2 during the DCT process. The control unit 103 is responsible for controlling the read / write operations of the coefficient ROMs 10134, 10224 and the data register units ι14, 1023, and it is also responsible for controlling different multiplexers 10121, 10131,10135,10211,10221,1024 ° The 24th page of this control sheet is suitable for China 0 ?: Standard — ([阳] 乂 4 Specifications (21〇: > < 1 ^ ali) " '(Please first (Read the notes on the back and fill out this page)

490634 The central government of the Ministry of Economic Affairs has cooperated with the government to cooperate with the industry. Ii- 印 繁 Λ7 B7 V. Description of invention (#) Yuan 103 is also responsible for controlling the first and second rounds of one-dimensional DCT / IDCT processing units 101, 102. Timing of operation of the remaining components. Please refer to the tenth and eleventh figures. When the device performs two-dimensional DCT processing, the first processing unit 101 executes the first five stages of the DCT rapid algorithm 5 of the first figure 'to be supplied to the first The magnification conversion of the two processing units 102 converts the one-dimensional conversion data. The second processing unit 102 then executes the six-level operation of the DCT rapid algorithm of the first figure to obtain the two-dimensional conversion data transmitted from the output unit 1024 to an external device (not shown). When the device performs two-dimensional DCT processing, the first processing unit 101 executes all six-level operations of the IDCT rapid algorithm of the tenth and third images to obtain a magnification conversion supplied to the second processing unit 102. Dimension conversion data. The second processing unit 102 then executes the last five stages of the IDCT rapid algorithm of the third figure to obtain the two-dimensional conversion data transmitted by the output unit 1024 to the external device (not shown). 15 The device of the tenth figure has a processing speed that is twice that of the device of the seventh figure, thereby allowing a higher bit rate for rounds. Therefore, it has been shown that by using a set of magnification conversion weighting coefficients in the internal multiplication of the DCT rapid algorithm of the second round of one-dimensional DCT operations, that is, the sixth-level operation, the first round of one-dimensional DCT operation 2 DCT rapid algorithm sixth-level operation can be omitted. Similarly, 'in the internal multiplication of the IDCT rapid algorithm of the first round of one-dimensional DCT operation, that is, the first level operation, using a set of ratio conversion weighting coefficients, the IDCT of the second round of one-dimensional IDCT operation The first-level operation of the rapid algorithm can be omitted. Therefore, the two-dimensional DCT / IDC process uses a paper with the appropriate size for the 25th page; 1] China National Standards () 规格 4 specifications (21 × x297 mm) (Please read the precautions on the back before (Fill in this page), 11 ------ A7 _________________ B7 V. Description of the invention) One-dimensional DCT / IDCT operation that quickly performs six-level operations of different methods, and another one that has five-level operations of the rapid algorithm. Dimension dct / jdct operations to perform. Accordingly, one of the one-dimensional DCT / IDCT operations includes thirteen multiplication operations, and the other one-dimensional DCT / IDCT operation includes only five multiplication operations. Therefore, for an 8x8 data block, the total number of multiplication operations in the two-dimensional DCT / IDCT method of the present invention is reduced to 144 (Sxl3 + Sx5). Compared with the aforementioned US patent case, it reaches 31 % Reduction, which results in a significant increase in processing speed. Although the present invention has been described in conjunction with a preferred embodiment, it is understood that the invention is not limited to the disclosed embodiments and is intended to cover various changes and equivalents which are included in the spirit and scope of the invention The examples. I.!. 0! (Please read the notes on the back before filling this page) Order ^. ≫,:-/-| 部. 中 -3); For ΛΥΊ " $ '令' tl. ^-W Policy Page 26:;, Paper ruler CNS 210 x 297 mm)

Claims (1)

490634 Printed by the Consumer Standards Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs A8 B8 C8 D8 VI. Patent application scope 1. A two-dimensional DCT method that includes the first and second consecutive one-dimensional discrete cosine transform (DCT) operations. The first and second rounds of one-dimensional DCT operations use a six-stage operation DCT rapid algorithm to process continuous read input data of an 8x8 data block. It can generate continuous conversion data. The DCT rapid algorithm 5 includes several butterfly-type operations. The first, third and fifth levels of operations include the second and fourth levels of operations including several multiplication operations after addition, and the sixth level of operations including several internal multiplication operations. The two-dimensional DCT method includes the following Steps: (a) Provide an input unit to receive input data; 10 * (b) Control the input unit to provide the input data to a butterfly-type computing unit, enabling the butterfly-type computing unit to execute the first round of one-dimensional DCT The first-level operation of the DCT rapid algorithm of the operation; (C) Control a data register unit to store the first-level output data from the butterfly-type arithmetic unit; 〃 15 (d) Control the data register unit to provide A predetermined first-stage output data is sent to a multiplication unit. When the predetermined first-stage output data has been stored in the data register unit, the multiplication unit is enabled to execute the first step of the DCT rapid algorithm. Second-level operation; (e) controlling the data register unit to store second-level output data from the multiplication unit 20; (f) controlling the data register unit to provide the first-level and second-level data in a predetermined order Stage output data to the butterfly-type arithmetic unit. The butterfly-type arithmetic unit can be enabled to execute the DCT rapid algorithm after the butterfly-type arithmetic unit has completed the first stage operation of the DCT rapid algorithm. Paper size applies to Chinese National Standard (CNS) A4C (210X297 mm) (Please read the notes on the back before filling out this page) 490634 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs A8 B8 C8 D8 (G) controlling the data register unit to store the third-level output data from the butterfly-type computing unit; (h) controlling the data register unit to Provides a predetermined third-level output 5 output data to the multiplication unit. The multiplication unit can be enabled to execute the DCT rapid algorithm when the predetermined third-level output data has been stored in the data register unit. (I) control the data register unit to store the fourth-level output data from the multiplication unit; l (j) control the data register unit to provide the third register in a predetermined order Level 4 and Level 4 output data to the butterfly-type arithmetic unit. After the butterfly-type arithmetic unit has completed the third-level operation of the DCT rapid algorithm, the butterfly-type arithmetic unit can be enabled to execute the first step of the DCT rapid algorithm. Five-level operation; 15 (k) Control the data register unit to store the fifth-level output data from the butterfly-type arithmetic unit. The fifth-level output data functions as one-dimensional conversion data of rate conversion; (l) Control the data The register unit provides the magnification conversion one-dimensional conversion data to the butterfly-type operation unit in another direction, which enables the butterfly 20-type operation unit to perform the second round of one-dimensional DCT operation D. First-level operations of the CT rapid algorithm; (m) Repeat steps (C) to (j) to perform the second to fifth-level operations of the DCT rapid algorithm of the second one-dimensional DCT operation; (η) Control the data register unit to store the private paper size from page 28 of the butterfly-type calculation sheet. Applicable to China National Standard (CNS) Α4 Regulation (210 × 297 mm) (Please read the precautions on the back before filling this page). Order 490634 A8 B8 C8 ____________ — D8, the fifth-level output data of the patent application scope element, the fifth-level output data functions as the two-dimensional conversion data of magnification conversion; (〇) controlling the data register unit to provide the two-dimensional conversion data Converting the poor data to the multiplication unit can enable the multiplication unit to perform the second step of the one-dimensional DCT operation of the DCT rapid algorithm according to a set of coefficients for weight conversion stored in the coefficient ROM of the multiplication unit. Six-level operation to obtain the two-dimensional conversion data corresponding to the input data. The multiplying weighting coefficients are the sixth-level addition of the first and second rounds of one-dimensional DCT calculations of the DCT rapid algorithm. Multiplication coefficient; and (P) the control unit receives an output from the two-dimensional conversion means the multiplication data. 2 · A two-dimensional DCT method based on the one-level and six-level discrete discrete cosine transform (DCT) rapid algorithm. The six-level DCT rapid algorithm includes first, third, and fifth-level operations that include several butterfly operations. The second-level and fourth-level operations including several multiplication operations after addition, and the sixth-level operations including several internal multiplication operations. The two-dimensional DCT method includes the following steps: Printed by the Consumer Cooperative (please read the notes on the back before filling this page) (a) Store a set of ratio conversion weighting coefficients in the coefficient r0m of a multiplication unit. The ratio conversion weighting coefficients are in the first round The product of the one-dimensional to 20 conversion and the sixth-stage weighting coefficient of the DCT rapid algorithm in a second round of one-dimensional conversion; (b) controlling a butterfly-type arithmetic unit and the multiplication arithmetic unit to perform the DCT on the rounder data The first to fifth level operations of the rapid algorithm to obtain the one-dimensional conversion data of the magnification conversion; page 29 This paper is applicable to the country ^ # $ T ~ CNS Α4Λ #-(210 X297 / ^ ") ~ 490634 Zhongli Standard Bureau, Ministry of Economic Affairs Printed by the Industrial and Consumer Cooperatives A8 B8 C8 D8 6. The scope of patent application (C) controls the butterfly type arithmetic unit and the multiplication unit to perform the first to fifth stage operations of the DCT rapid algorithm on the one-dimensional conversion data of the magnification conversion To obtain the two-dimensional conversion data of the magnification conversion; and (d) control the multiplication unit to execute the sixth stage of the DCT rapid algorithm on the two-dimensional conversion data of the magnification conversion according to the multiplication factor of five times in the coefficient ROM The calculation is performed to obtain the two-dimensional conversion data corresponding to the input data. 3-A method of reducing the multiplication of a two-dimensional discrete cosine transform (DCT) device that continuously performs the first and second rounds of one-dimensional DCT 10 operations, each one of which is one-dimensional The DCT operation includes a six-level operation DCT rapid algorithm to process continuous input data of an 8x8 data block, which can generate continuous conversion data. The DCT rapid algorithm includes several butterfly-type arithmetic units executed by the two-dimensional DCT device. The first, third, and fifth stages of butterfly-type operations include a plurality of second and fourth stages of operations performed by the multiplication operation performed by the multiplication unit of the two-dimensional DCT 15 device, and the included number A sixth-level operation of the internal multiplication performed by the multiplication operation unit, the method includes the following steps: (a) storing a set of multiplication conversion weighting coefficients in the coefficient ROM of the multiplication operation unit, and the multiplication conversion weighting coefficient is The product of the sixth and sixth weighting coefficients of the first and second rounds of a 20-dimensional DCT rapid calculation algorithm; (b) the butterfly-type arithmetic unit has completed the first round of one-dimensional DCT calculations After the fifth-level operation of the DCT rapid algorithm to obtain the one-dimensional conversion data of the magnification conversion, control the butterfly-type arithmetic unit to another page 30 (please read the precautions on the back before filling this page) This paper scale applies to China National Standard (CNS) A4 Specification (2 丨 0X297mm) 490634 ABCD Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 6. Application for Patent Scope Direction The second round of one-dimensional DCT calculation is performed on the magnification conversion one-dimensional conversion data The first-level operation of the DCT rapid algorithm; and (C) the fifth-level operation of the DCT rapid algorithm of the second-round one-dimensional DCT operation has been completed in the butterfly-type arithmetic unit to obtain a magnification conversion of 5 · 2D After the DCT converts the data, the multiplying unit is controlled to perform the sixth-level operation of the DCT rapid algorithm of the second round of one-dimensional DCT operation on the magnified two-dimensional converted data according to the magnification conversion weighting coefficient in the coefficient ROM. This results in two-dimensional conversion data corresponding to the input data. 10 4. A two-man DCT method that includes successive first and second rounds of one-dimensional inverse discrete cosine transform (DCT) operations. Each first and second round of one-dimensional IDCT operations uses a six-level operation IDCT to quickly An algorithm to process continuous input data of an 8x8 data block can generate continuous conversion data. The IDCT rapid algorithm includes a first stage 15 operation including several internal multiplication operations, and a second, first, and second butterfly operations including several butterfly operations. Fourth and sixth level operations, and third and fifth level operations including several multiplication and subtraction operations, the two-dimensional DCT method includes the following steps: (a) providing an input unit to receive input data; (b) ) Control the input unit to provide the input data to a multiplication operation 20 units. Enable the multiplication operation unit to perform the first round of one-dimensional DCT based on a set of weight conversion coefficients stored in the coefficient ROM of the multiplication operation unit. The first-level operation of the IDCT rapid algorithm of the calculation. The ratio conversion weighting coefficients are the products of the first-level weighting coefficients of the IDCT rapid algorithm of the first and second rounds of one-dimensional DCT operations. 1 page of this paper applies Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the notes on the back before filling out this page) 490634 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs AS B8 C8 D8 The patent scope (C) controls a data register unit to store the first-level output data of the magnification conversion from the multiplication unit; (d) controls the data register unit to provide the magnification-converted first-level output data to a butterfly type The arithmetic unit can enable the butterfly-type operation unit to execute the second-stage operation of the IDCT rapid algorithm of the first round of one-dimensional DCT operation; (e) control the data register unit to store the data from the butterfly-type operation. The unit's second-level output data; (f) controlling the data register unit to provide a predetermined second-level 10 output data to the multiplication unit, so that the predetermined second-level output data has been stored in the data The register unit is enabled to enable the multiplication unit to perform the third-level operation of the industrial DCT rapid algorithm; (g) controlling the data register unit to store the multiplication operation list (H) control the data register unit to provide the second-level and third-level output data to the butterfly-type arithmetic unit in a predetermined order, which can be completed in the butterfly-type arithmetic unit After performing the second-level operation of the IDCT rapid algorithm, the butterfly-type arithmetic unit is enabled to perform the fourth-level operation of the industrial DCT rapid algorithm; 20 (i) controlling the data register unit to store the data from the butterfly-type arithmetic unit; (J) control the data register unit to provide a predetermined fourth-level output data to the multiplication unit, so that the predetermined fourth-level output data has been stored in the data temporary The multiplication is enabled in the controller unit on page 32 (please read the precautions on the back before filling in this page) This paper size applies the Chinese National Standard (CNS) A4 specification (2iOX: 297 mm) Central Standard of the Ministry of Economic Affairs Printed by the Bureau ’s Consumer Cooperatives ^ U634 AS B8 C8 --------_ D8 VI. Patent application scope-An arithmetic unit performs the fifth-level operation of the DCT rapid algorithm of the industry; (k) controls the temporary storage of the data Device The unit stores the fifth-level output data from the multiplication unit; (l) controls the data register unit to provide the fifth-fourth and fifth-level output data to the butterfly-type arithmetic unit in a predetermined order; After the butterfly-type operation unit has finished executing the fourth-level operation of the IDCT rapid algorithm, the butterfly-type operation unit is enabled to perform the sixth-level operation of the industrial DCT rapid algorithm; (m) control the data register unit俾 It can store the one-dimensional conversion data of the magnification conversion generated by the butterfly type 10 different units in step (1); (η) control the data register unit to provide the magnification conversion one-dimensional conversion data to the butterfly in another direction Type computing unit 俾 can enable the butterfly type computing unit to perform the second round of one-dimensional IDCT operations] [second-level operations of the DCT rapid algorithm; 15 (〇) repeat steps (e) to (1) to execute The third to sixth stage operations of the second round of one-dimensional DCT arithmetic; and (P) after step (0), controlling an output unit to receive the sixth stage output from the butterfly-type arithmetic unit Data as correspondence Conversion of two-dimensional data of the input data. 20 5 · A two-dimensional industrial DCT method that reverses the discrete cosine transform (ICDT) rapid algorithm based on one-level and six-level operations. The IDCT rapid algorithm includes a first-level operation that includes several internal multiplication operations, and includes several butterfly shapes. The 2nd, 4th, and 6th-level operations of the operation, and the 3rd and 5th-level operations that include several multiplication and subtraction operations. The two-dimensional IDCT method includes the following steps. Page 33 Applicable to this paper scale China National Standard (CNS) (2Γ〇Χ 297mm Y ^ ^ " (Please read the notes on the back before filling this page) 5. Patent application 5 10 15 Printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs, a 20-level operation IDCT rapid algorithm to process a continuous 8XS data block. ^ Input data can generate continuous conversion data. It includes a first-level operation including a plurality of internal multiplication operations performed by the multiplication unit of the two-dimensional DCT device, a second operation including a butterfly operation performed by a butterfly-type operation unit of the two-dimensional idct device, : Le Fourth and Sixth level operations, and third and fifth level operations including several multiplication and subtraction operations performed by the multiplication unit, the method includes the following: Step ^ (a) stores a set of magnifications The conversion weighting coefficient is in the coefficient rom of the / multiplication unit. The magnification conversion weighting coefficient is the weighting coefficient of the first-stage one-dimensional conversion of w and the second-stage one-dimensional conversion of DCT. Product; (b) controlling the multiplication unit to use the conversion factor weighting coefficient in the coefficient ROM to perform the first-level operation of the industrial DCT rapid algorithm on the input data, thereby obtaining the conversion factor Level output data; (c) controlling the butterfly-type arithmetic unit and the multiplication operation unit to perform the second-to-sixth-level operations of the IDCT rapid algorithm on the magnification conversion and first-level output data to obtain the one-dimensional conversion data of the magnification conversion; And (d) controlling the butterfly-type arithmetic unit and the multiplication arithmetic unit to perform second to sixth stage operations of the DCT rapid algorithm on the magnification conversion one-dimensional conversion data to obtain a two-dimensional conversion corresponding to the input data data. 6. A method for reducing multiplication of a one-dimensional inverse discrete cosine transform (IDCT) device. The two-dimensional DCT device continuously performs first and second rounds of one-dimensional DCT operations, one for each of the first and second rounds. Dimensional idCT calculation uses page 34. This paper size is applicable to China National Standard (CNS) person 4 specification (21 × 297 mm) (Please read the precautions on the back before filling this page) 490634 AS B8 C8 D8 Patent application scope 5 10 15 〃⑷ Storage-group magnification conversion weighting factor is in the coefficient ROM 0 of the multiplication unit, the magnification conversion weighting factor is the IDCT rapid calculation of the first dimension of the first dimension operation The first-level weighting coefficient ^ product of the method, (b) controlling the multiplication unit to perform the first round of one-dimensional 100 (one difference) on the input data according to the conversion coefficient of the weight within the coefficient r0m. The first-level operation of the IDCT rapid algorithm, thereby obtaining the first-level output data of the magnification conversion; (C) controlling the butterfly-type arithmetic unit to perform the first round of one-dimensional DCT operation on the first-level output data of the magnification conversion. The second-level operation of the IDCT fast fan algorithm; and (d) the butterfly-type operation unit has completed the sixth-level operation of the first-dimensional one-dimensional DCT operation of the rapid DCT algorithm to obtain a one-dimensional conversion. After the data is converted, control the butterfly-type arithmetic unit to perform the second-level operation of the DCT rapid algorithm of the second round of one-dimensional IDCT operation on the magnification-converted one-dimensional conversion data. (Please read the precautions on the back first Complete this page) - •, tr Ministry of Economic Affairs Bureau of Standards Employees Co-op India with page 53 of A'4 specifications with China National Standard (CNS) (210X297 mm)