TW488011B - Iridium composite barrier structure and method for same - Google Patents
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488011 ____________—------ —------------------ — 五、發明說明(1) 〜—一 一 本發明大體上有關積體電路(ICS)之製造, :關使 j銀(Ir)、组(Ta)及氧之複合膜之導電性電極V璧的製 鉑(1= ί其他責金屬係使用於積體電路鐵带I·生雷容器 中。貝金屬t使用係因於其特有之抗化學^生此種性質 尤其為南溫軋退火條件所需,諸如鐵電性電0哭之製造中 :匕:此:,可忽略貴金屬及鐵電性材料::鈣鈦礦金 屬氧化物之間的化學相互作用。 。己埯趲 詳言之’前述貴金屬係作為藉由鐵電性材料分 性電極對。該電極之一或兩個經常進接於電晶體咖導電 電聯於該積體電路之導電性軌跡。如眾所周知,二麵,或 性裝置可根據施加於該電極之電壓而偏極化,電Y等織電 之間的關係係表現於遲滯迴線。使用於記憶體^ =及電髮 經偏極化之鐵電性裝置可用以表示"1 "或,,〇 。^ 中時 裝置經常稱為鐵-RAM或FRAM。鐵電性裝置係為常,每°己憎 即,即使自包埋該鐵電性裝置之積體電路去除電力吐。 置仍保持經偏極化。 ’鸪裝 、使用金屬存有問題,即使是責金屬亦然。Pt或許曰 為使用之貴金屬,使氧擴散,尤其是在高溫退大^最廣 氧於Pt内之擴散導致相鄰障壁及基材產生氧化。讀每中Q 材一般係為矽或二氧化矽。氧化使得該鉑與相鄰^相鄰基 黏著性變差。氧化亦干擾相鄰基材層之間的電導係之間的 基材尤其易產生因氧擴散所致之問題。最後,導敫3矽 欠具有铁 488011488011 ____________ ------- -----------------------5. Description of the invention (1) ~-One by one, the present invention relates generally to integrated circuits (ICS ) Manufacture of platinum: (1 = ί Other responsible metals are used in integrated circuit iron belts I · Thunder) for making silver (Ir), group (Ta) and oxygen-conducting electrode V 璧 of the composite film of oxygen In the container, the use of shell metal t is due to its unique chemical resistance. This property is especially required for the annealing conditions in the south temperature rolling, such as in the manufacture of ferroelectric electricity. Dagger: This: Ignore precious metals and Ferroelectric materials :: chemical interactions between perovskite metal oxides. 埯 趱 has said in detail that the aforementioned noble metal is used as a discrete electrode pair by ferroelectric materials. One or two of these electrodes are often It is connected to the conductive track of the transistor and the electrical connection to the integrated circuit. As is well known, the two sides, or the device can be polarized according to the voltage applied to the electrode, and the relationship between the Y and other weaves It is expressed in the hysteresis loop. The ferroelectric device used in the memory ^ = and the polarized polarization of the electric hair can be used to indicate " 1 " Devices are often referred to as ferro-RAM or FRAM. Ferroelectric devices are common, and every degree is hate, that is, even if the power circuit is removed from the integrated circuit that embeds the ferroelectric device. The device remains polarized. There is a problem with outfitting and using metal, even if it is a responsible metal. Pt may be said to be a precious metal used to diffuse oxygen, especially at high temperatures. The diffusion of the most widespread oxygen in Pt causes adjacent barriers and substrates. Oxidation occurs. It is generally read that the Q material is silicon or silicon dioxide. Oxidation makes the platinum and the adjacent ^ adjacent groups have poor adhesion. Oxidation also interferes with the conductivity between adjacent substrate layers. Materials are particularly susceptible to problems caused by oxygen diffusion. Finally, silicon 3 has less iron 488011
五、發明說明(2) 差β己憶性之鐵電性裝置。或該積體電路退火過程之溫度兩 受到限制,以防止該鐵電性裝置降解。 :又而V. Description of the invention (2) Ferroelectric device with poor β-memory. Or the temperature of the integrated circuit annealing process is limited to prevent the ferroelectric device from degrading. : Again
已嚐試各種策略,以改善使用責金屬作為積體電路掣造 中之導電膜所產生之層間擴散、黏著性及電導係數問題。 鈦(Π)、二氧化鈦(τ1〇2)、及氮化鈦(ΤιΝ)層係夾置於貴 金屬及矽(S 1 )基材之間,以抑制氧之層間擴散,。然而,丁 i 層通常僅於低於6 0 0攝氏度數之退火溫度下有效。於6〇〇 氏度數退火之後,鉑擴散貫穿該鈦層,與矽反應,而來 矽化物。此外,該鉑無法終止氧擴散。於高溫退火之後, 可於矽表面上形成二氧化矽薄層,隔絕矽與該電極之間 链金屬膜之退火所產生的 成。此兩問題皆與鉑與相鄰 熱膨脹及應力有關。已知覆 力,而抑制小丘形成。 其他問題係為剝離及小丘形一 積體电路層於南溫退火期間之 蓋鉑膜之鈦層可降低鉑膜之應 銥已用於嚐試解決氧之層間擴散問題。銥具有化風 性’具有高熔點。與鉑比較之下’銥較可對抗氡化; 散。此外,即使經氧化,氧化銀仍保持導電十生。 與鈦相鄰時’該銥/鈦障壁對於氧之層間擴散 今Various strategies have been tried to improve the interlayer diffusion, adhesion, and conductivity problems caused by the use of metal as a conductive film in the fabrication of integrated circuits. Titanium (Π), titanium dioxide (τ102), and titanium nitride (TiN) layers are sandwiched between the noble metal and the silicon (S 1) substrate to suppress interlayer diffusion of oxygen. However, the Ti layer is usually only effective at annealing temperatures below 600 degrees Celsius. After annealing at 600 degrees, platinum diffuses through the titanium layer and reacts with silicon to form silicide. In addition, this platinum cannot stop oxygen diffusion. After annealing at high temperature, a thin layer of silicon dioxide can be formed on the silicon surface to isolate the formation of the chain metal film between the silicon and the electrode. Both of these issues are related to platinum and adjacent thermal expansion and stress. Overlay is known to suppress hillock formation. Other problems are peeling off and the hillock-shaped integrated circuit layer during the south temperature annealing. The titanium layer of the platinum film can reduce the application of the platinum film. Iridium has been used to try to solve the interlayer diffusion problem of oxygen. Iridium is weatherable 'and has a high melting point. Compared with platinum, 'iridium is more resistant to tritium; In addition, even after oxidation, silver oxide remains conductive for ten years. Adjacent to titanium ’the interlayer diffusion of this iridium / titanium barrier to oxygen
透性a然而,銀可擴散穿透鈦。與链相同地,銥盘 氧化石夕極具反應性…b ’雙層銥 鈦障或 非理想之障壁金屬。 从化斌障壁卫 月5日申請之共待審申請 極/障壁結構及其方法,,揭Permeability a However, silver can diffuse through titanium. Like chains, iridium disks are extremely reactive ... b 'double iridium titanium barrier or non-ideal barrier metal. Conghua Bin Barrier Guard applied for the pending application on the 5th, pole / barrier structure and method,
Zhang等人所發明而於1Q99年3 案編號0 9 / 2 6 3,5 9 5 π银導電性電Invented by Zhang et al. 1Q99 3 case number 0 9/2 6 3, 5 9 5 π silver conductive electricity
488011 :五、發明說明(3) I示一種多層銥/鈕膜,其可對抗層間擴散。 | 較佳係發展備擇方法,以於積體電路製造中使用銥作為 ί導體、導電性障壁、或電極。較佳係使用銥,而不與底層 j 矽基材相互作用。 較佳係銥膜可經改變,以改善層間擴散性質。此外,較 丨佳係此種改善型銥膜與夾置膜層疊,以防止銥與矽基材相488011: V. Description of the invention (3) I shows a multilayer iridium / button film which can resist interlayer diffusion. | Better is to develop alternative methods to use iridium as a conductor, conductive barrier, or electrode in integrated circuit manufacturing. It is preferred to use iridium without interacting with the underlying silicon substrate. The preferred iridium film can be modified to improve interlayer diffusion properties. In addition, a better iridium film of this type is laminated with an interlayer film to prevent the iridium from colliding with the silicon substrate.
I 互作用。較佳係該包括銥層之多層膜可對抗氧於高退火溫 度下之層間擴散。另一較佳狀況係包括銥之多層膜不產生 剝離問題及小丘形成。 較佳係可產製經改變之銥膜,其於高溫及氧環境條件下 退火之後,仍保持導電性。 是故,提出一種使用於積體電路之高溫安定性導電性障: 壁層。該障壁係包括一底層矽基材、第一障壁膜一包括覆 盍該基材之组(Ta)、及一银-组-氧(Ir-Ta-0)複合膜—覆 蓋該第一障壁膜。該Ir-Ta-Ο複合膜於氧環境中於高溫退 火過程之後,仍保持導電性。此外,該銥複合膜對抗小丘 之形成,且對抗剝離。 | 於本發明某些態樣中,第二障壁膜--包括貴金屬--覆蓋 該銥-钽-氧複合膜。該第二障壁膜改善該銥-钽-氧相對於 後續沉積層之界面,而限制氧擴散至該銥-钽-氧膜内。 該第一障壁膜一般係選自材料钽、氮化矽钽(TaSiN)、 及氮化钽(TaN)。該第一障壁層具有介於約10至1〇〇毫微米 (nm)範圍内之厚度。 本發明某些態樣中,該障壁係使用於鐵電性裝置中之電I interaction. Preferably, the multilayer film including an iridium layer is resistant to interlayer diffusion of oxygen at high annealing temperatures. Another preferable condition is that the multilayer film including iridium does not cause peeling problems and hillock formation. It is preferred to produce a modified iridium film that remains conductive after annealing under high temperature and oxygen environmental conditions. Therefore, a high-temperature stable conductive barrier used in integrated circuits is proposed: a wall layer. The barrier system includes a bottom silicon substrate, a first barrier film, a group (Ta) covering the substrate, and a silver-group-oxygen (Ir-Ta-0) composite film—covering the first barrier film. . The Ir-Ta-O composite film remained conductive even after being subjected to a high-temperature annealing process in an oxygen environment. In addition, the iridium composite film resists the formation of hillocks and resists peeling. In some aspects of the invention, a second barrier film, including a precious metal, covers the iridium-tantalum-oxygen composite film. The second barrier film improves the interface of the iridium-tantalum-oxygen with respect to the subsequent deposited layer, and limits the diffusion of oxygen into the iridium-tantalum-oxygen film. The first barrier film is generally selected from materials of tantalum, tantalum silicon nitride (TaSiN), and tantalum nitride (TaN). The first barrier layer has a thickness in a range of about 10 to 100 nanometers (nm). In some aspects of the present invention, the barrier is used in a ferroelectric device.
第7頁 488011 丨五、發明說明(4) |極。之後,以鐵電性膜覆蓋該銥-钽-氧膜。或該第二障壁 i I層係夾置於該銥-钽-氧膜及該鐵電性膜之間。由貴金屬製 造之導電性金屬膜、前述银複合膜、或其他多層導電性頂 層電極係覆蓋該鐵電性膜。該鐵電性膜可於該頂層及銥-组-氧電極之間儲存電荷。 I 詳言之,該銥複合膜係包括以下材料。或為銥、鈕、及 ! 氧、或為銥、钽、及Ir02、或銥、钽、及Ta2 05或Ir02及 T a2 05、或I r02、T a2 05、銀及组、或錶及T a2 05或组及I r 02、 或Ir02、Ta2 05及銥、或Ir02、Ta2 05及钽。此外,前述銥複 合膜類係包括Ta2 05及(Ta,0)之τ -相變體。該銥-钽-氧複 合膜一般係具有介於約1 0至5 0 0毫微米範圍内之厚度。 亦提出一種覆蓋積體電路基材之高溫安定性導電性障壁: 層之方法,該方法包括步驟有: a) 沉積覆蓋該基材之第一障壁層,包括钽;及 b) 沉積覆蓋該第一障壁層之銥-钽-氧複合膜,以形成可 對抗其與該基材之相互作用的多層結構。 該銀-组-氡複合膜及第一障壁層係藉由沉積方法沉積, 選自物理氣相沉積(PVD)、化學蒸汽沉積(CVD)、及金屬有 機化學蒸汽沉積(M0CVD)。本發明之部分態樣中,步驟b) 係包括於介於約2 0 0至4 0 0瓦範圍内之功率下共同濺射銥及 钽靶極,濺射於該钽靶上之功率係大於或等於濺射於該銥 靶之功率,而其中該氬相對於氧之比例係約1 : X,其中X係 大於或等於1。 1 本發明部分態樣於步驟b )之後包括另一步驟:Page 7 488011 丨 V. Description of the invention (4) | Thereafter, the iridium-tantalum-oxygen film is covered with a ferroelectric film. Or the second barrier layer I I is sandwiched between the iridium-tantalum-oxygen film and the ferroelectric film. A conductive metal film made of a noble metal, the aforementioned silver composite film, or other multilayer conductive top layer electrodes cover the ferroelectric film. The ferroelectric film can store charges between the top layer and the iridium-group-oxygen electrode. I In detail, the iridium composite film system includes the following materials. Or iridium, button, and! Oxygen, or iridium, tantalum, and Ir02, or iridium, tantalum, and Ta2 05 or Ir02 and T a2 05, or Ir 02, T a2 05, silver and group, or table and T a2 05 or group and Ir 02, or Ir02, Ta2 05 and iridium, or Ir02, Ta2 05 and tantalum. In addition, the aforementioned iridium composite film system includes τ-phase variants of Ta205 and (Ta, 0). The iridium-tantalum-oxygen composite film generally has a thickness in the range of about 10 to 500 nanometers. Also proposed is a method for covering a high-temperature stable conductive barrier: layer of a circuit substrate, the method comprising the steps of: a) depositing a first barrier layer covering the substrate, including tantalum; and b) depositing the first barrier layer A barrier layer of iridium-tantalum-oxygen composite film to form a multilayer structure that can resist its interaction with the substrate. The silver-group-rhenium composite film and the first barrier layer are deposited by a deposition method and are selected from the group consisting of physical vapor deposition (PVD), chemical vapor deposition (CVD), and metal organic chemical vapor deposition (MOCVD). In some aspects of the present invention, step b) includes co-sputtering an iridium and tantalum target at a power in the range of about 200 to 400 watts. The power sputtering on the tantalum target is greater than Or equal to the power of sputtering on the iridium target, and the ratio of argon to oxygen is about 1: X, where X is greater than or equal to 1. 1 Some aspects of the present invention include another step after step b):
第8頁 488011 五、發明說明(5) | C )沉積覆蓋該銥-鈕-氧複合膜之第二障壁層,包括責金 I 屬,以使該第二障壁層可對抗氧擴散至該銥-鈕-氧膜中, 改善該銥-钽-氧膜相對於後續沉積材料之界面。該第二障 壁膜係選自銥、釕、I r 02、鉑(P t)、及R u 02,具有介於約 1 0至2 0 0毫微米範圍内之厚度。步驟c )係包括經由沉積方 法沉積該第二障壁層,選自物理氣相沉積(PVD )、化學蒸 汽沉積(CVD)、及金屬有機化學蒸汽沉積(M0CVD)。 欲形成鐵電性電容器時,於步驟c)之後另外包括: d) 沉積覆蓋該銥-钽-氧複合層之一鐵電性材料;及 e) 沉積覆蓋該鐵電性材料之一導電性頂層電極,以形成 一鐵電性電容器.-。 圖式簡單說明 :: 圖1 - 3係說明使用於一積體電路之完全高溫安定性導電 性障壁層之步驟。 圖4係說明本發明銥複合膜之薄膜電阻性質。 圖5係說明本發明銥複合膜在氧環境中於低於攝氏6 5 0度 之各種退火溫度下歷經5分鐘之X -射線繞射(XRD)光譜。 圖6係說明本發明銥複合膜在氧環境中於高於攝氏6 5 0度 之各種退火溫度下歷經5分鐘之X -射線繞射(XRD)光譜。 圖7係為本發明覆蓋矽基材之銥-钽-氧膜之剖面圖。 圖8係為說明·用以形成高溫安定性導電性障壁層--諸如 使用於鐵電性電容器中--之方法的步驟之流程圖。 圖9係為說明使用本發明導電性障壁銥複合膜以形成鐵 電性電容器之步驟的流程圖。Page 8488011 V. Description of the invention (5) | C) Deposition of a second barrier layer covering the iridium-button-oxygen composite film, including metal I, so that the second barrier layer can resist oxygen diffusion to the iridium In the button-oxygen film, the interface of the iridium-tantalum-oxygen film with respect to the subsequent deposited material is improved. The second barrier film is selected from iridium, ruthenium, Ir 02, platinum (Pt), and Ru 02, and has a thickness in a range of about 10 to 200 nm. Step c) includes depositing the second barrier layer by a deposition method, selected from the group consisting of physical vapor deposition (PVD), chemical vapor deposition (CVD), and metal organic chemical vapor deposition (MOCVD). When a ferroelectric capacitor is to be formed, after step c), it further includes: d) depositing a ferroelectric material covering one of the iridium-tantalum-oxygen composite layer; and e) depositing a conductive top layer covering the ferroelectric material Electrode to form a ferroelectric capacitor.-. Brief description of the drawing :: Figures 1-3 illustrate the steps of a completely high temperature stable conductive barrier layer used in an integrated circuit. FIG. 4 illustrates the sheet resistance properties of the iridium composite film of the present invention. FIG. 5 illustrates the X-ray diffraction (XRD) spectrum of the iridium composite film of the present invention at various annealing temperatures below 650 ° C for 5 minutes in an oxygen environment. FIG. 6 illustrates an X-ray diffraction (XRD) spectrum of the iridium composite film of the present invention in various oxygen atmospheres at various annealing temperatures higher than 650 ° C for 5 minutes. FIG. 7 is a cross-sectional view of an iridium-tantalum-oxygen film covering a silicon substrate of the present invention. Fig. 8 is a flowchart illustrating the steps of a method for forming a high-temperature stable conductive barrier layer, such as used in a ferroelectric capacitor. Fig. 9 is a flowchart illustrating a procedure for forming a ferroelectric capacitor using the conductive barrier iridium composite film of the present invention.
第9頁 488011 五'發明說明(6) 較佳具體實例詳述 圖1 - 3係說明使用於一積體電路中之完全高溫安定'性導 電性障壁層之步驟。詳言之,該導電性障壁可作為鐵電性 電容器中之電極。圖1係說明導電性障壁1 0,包括一基材 、覆蓋基材12之第一障壁膜14—包括鈕(Ta)、及覆蓋第 一障壁膜14之錶-組-氧(Ir-Ta-Ο)複合膜16。該鉉-短-氧 複合獏即使於氧環境中歷經高溫退火過程,仍保持導電 性。 基材1 2係選自材料石夕、多晶石夕、二氧化石夕、及石夕-鍺化 合物,以使第一障壁層1 4防止銥矽化物之形成。第一障壁 膜14係選自材料.组、氮化矽鈕(TaSiN)及氮化鈕(TaN)。第· 一障壁層1 4係具有介於約1 0至1 〇 〇毫微米(nm)範圍内之厚:: 度18。 圖2係表示圖1之導電性障壁膜1 〇的另_態樣。導電性障 壁層10另外包括一第一障壁膜3〇,包括貴金屬,而覆蓋银 -组氧複合膜16。第二障壁膜3〇改善該銥〜鈕—氧膜丨6相對 於後續沉積層(未示)之界面,而限制氧擴散進入銥-鈕-氧 膜16。 第二障壁膜30係選自材料氧化銥(Ir〇2)、氧化釕 (Ru02)、飯、鉑(Pt)、及釕(ru)。第二障壁膜具有介於 約10至2 0 0毫微米範圍内之厚度32。 、 、 圖3係說明作為鐵電性電容器4 〇之一部分的圖1或2之導 電性障壁層10。鐵電性電容器4〇另外包括覆蓋銥—鈕—氧膜 16之鐵電性膜42。本發明部分態樣中,第二障壁層3〇 (未、Page 9 488011 Description of the five 'invention (6) Detailed description of the preferred embodiment Figures 1-3 illustrate the steps of a completely high temperature stable conductive barrier layer used in an integrated circuit. Specifically, the conductive barrier can be used as an electrode in a ferroelectric capacitor. FIG. 1 illustrates a conductive barrier 10, including a substrate, a first barrier film 14 covering the substrate 12, including a button (Ta), and a table-group-oxygen (Ir-Ta- 〇) composite film 16. The rhenium-short-oxygen composite rhenium maintains conductivity even after undergoing a high-temperature annealing process in an oxygen environment. The substrate 12 is selected from the group consisting of materials Shi Xi, polycrystalline Shi Xi, Shi Di Xi, and Shi Xi-germanium compound, so that the first barrier layer 14 prevents the formation of iridium silicide. The first barrier film 14 is selected from the group consisting of materials, groups, silicon nitride buttons (TaSiN) and nitride buttons (TaN). The first barrier layer 14 has a thickness in the range of about 10 to 100 nanometers (nm): 18 degrees. FIG. 2 shows another aspect of the conductive barrier film 10 of FIG. 1. The conductive barrier layer 10 further includes a first barrier film 30, which includes a noble metal, and covers the silver-oxygen composite film 16. The second barrier film 30 improves the interface between the iridium-button-oxygen film 6 and the subsequent deposited layer (not shown), and restricts the diffusion of oxygen into the iridium-button-oxygen film 16. The second barrier film 30 is selected from the group consisting of iridium oxide (IrO2), ruthenium oxide (Ru02), rice, platinum (Pt), and ruthenium (ru). The second barrier film has a thickness 32 in a range of about 10 to 200 nanometers. Fig. 3 illustrates the conductive barrier layer 10 of Fig. 1 or 2 as a part of the ferroelectric capacitor 40. The ferroelectric capacitor 40 further includes a ferroelectric film 42 covering the iridium-button-oxygen film 16. In some aspects of the present invention, the second barrier layer 30 (not,
488011 五、發明說明(7) 不)係覆盖银複合膜1 6。導電性金屬膜4 4覆蓋鐵電性膜 42。如此,鐵電性膜42可於頂層電極44及銥—鈕—氧電極16 之間儲存電荷並保持極性。頂層電極4 4係為貴金屬,多層 電極’而银複合膜1 6係為本發明備擇態樣。 圖4係說明本發明鈒複合膜之薄膜電阻性質。於一石夕基 材上沉積1 0 0毫微米之鈕膜,於該鈕膜上覆蓋3 〇 〇毫微米銥 組氧膜。只驗結果顯示遠銀—组—氧/组/石夕結構可承受至 少攝氏1 0 0 0度之氧退火歷經5分鐘,而不形成小丘或剝 離。由攝氏500度至550度,該薄獏電阻微幅增加,而於高 於攝氏6 0 0度時開始降低。於攝氏8 5 〇度下得到最小值,高 於攝氏9 0 0度時,—該薄膜電阻開始升高。然而,對應於攝 氏1 0 0 0度之薄膜電阻仍低於退火前之薄膜電阻。即,該銥 -鈕-氧膜於1000度氧退火歷經5分鐘時仍保持導電性。 本發明所使用之符號"/"界定一膜層,故銥/鈕係為覆蓋 钽膜之銥膜層。本發明所使用之符號,’-”界定元素之組合 物或混合物,使银-钽膜係為包括銀及組元素之複合膜。 圖5係說明本發明銥複合膜於氧環境中於低於攝氏6 5 〇度 下之各種退火溫度下歷經5分鐘之X -射線繞射(XRD)光譜。 初沉積之銥複合膜係包括極細之多晶銥。未出現I r〇2及 T a2 05尖峰,但其可能存在於非晶狀態。於低於攝氏6 5 0度 之氧退火期間.,未發現結晶之组氧化物尖峰,而強度之增 加係對應於I r02。此種觀察顯示I r〇2開始結晶,而存在之 結晶的晶粒大小漸增。 圖6係說明本發明銥複合膜於氧環境中於高於攝氏6 5 0度488011 V. Description of the invention (7) No) Covers the silver composite film 16. The conductive metal film 4 4 covers the ferroelectric film 42. In this way, the ferroelectric film 42 can store a charge between the top electrode 44 and the iridium-button-oxygen electrode 16 and maintain the polarity. The top electrode 4 4 is a noble metal, and the multi-layer electrode 'is an alternative aspect of the present invention. FIG. 4 illustrates the sheet resistance properties of the rhenium composite film of the present invention. A button film of 100 nanometers was deposited on a stone substrate, and the button film was covered with a 300 nanometer iridium group oxygen film. Only the test results show that the far silver-group-oxygen / group / stone xi structure can withstand oxygen annealing at least 100 degrees Celsius for 5 minutes without forming hillocks or peeling. From 500 ° C to 550 ° C, the resistance of this thin plate increases slightly, but begins to decrease when it is higher than 600 ° C. The minimum value was obtained at 850 ° C, and above 900 ° C, the film resistance began to increase. However, the sheet resistance corresponding to 100 ° C is still lower than the sheet resistance before annealing. That is, the iridium-button-oxygen film maintained electrical conductivity after 1000 minutes of oxygen annealing for 5 minutes. The symbol " / " used in the present invention defines a film layer, so the iridium / button is an iridium film layer covering a tantalum film. The symbol used in the present invention, '-' defines a composition or mixture of elements, so that the silver-tantalum film is a composite film including silver and group elements. FIG. 5 illustrates that the iridium composite film of the present invention is less than X-ray diffraction (XRD) spectra at various annealing temperatures at 650 ° C over 5 minutes. The initially deposited iridium composite film system includes extremely fine polycrystalline iridium. I rO2 and T a2 05 peaks did not appear However, it may exist in an amorphous state. During oxygen annealing below 650 degrees Celsius, no crystalline group oxide peak was found, and the increase in intensity corresponds to I r02. This observation shows I r〇 2 began to crystallize, and the crystal grain size of the existing crystals gradually increased. Figure 6 illustrates that the iridium composite film of the present invention is higher than 65 ° C in an oxygen environment.
第11頁 488011 丨五、發明說明(8) --- 下之各種退火溫度下歷經5分鐘之X -射線繞射(XRD)光譜。 高於攝氏70 0度時,同時發現結晶之τ〜〇5及理想配比:之 I r〇2尖峰。此種現象係對應於薄膜電阻之降低。於較高溫 度下,I r 〇2尖峰持續增高,而I Γ尖峰則降低。高於攝氏 9 0 0度時,I r尖峰之強度極弱,而未發現丨Γ〇2尖峰中之強 度增加。此等情況符合於高於攝氏8 5 〇度時之薄膜電阻增 加。高於攝氏7〇〇度時未發現τ'〇5尖峰之強度變化。此曰 外’未發現矽化鈕或矽化銥,表示銥複合膜之障壁性質未 降低。 圖7係為本發明覆蓋矽基材之銥-鈕-氧膜之剖面圖。圖7 係證明薄膜於攝氏9 5 0度氧退火歷經5分鐘後之整體性。未 形成小丘,且各膜層之間未產生剝離。 二 圖8係為說明形成高溫安定性導電性障壁層諸如使用於 鐵電性電容器中者之方法的步驟之流程圖。步驟1 0 0係提 供一積體電路基材。該基材係選自材料矽、多晶矽、二氧 化石夕、及矽〜鍺化合物。步驟丨0 2係沉積第一障壁層,包括 覆蓋該基材之鈕(Ta)。步驟102係包括沉積第一障壁,選 自材料輕、氮化矽组(TaSi 及氮化鈕(TaN)。步驟1 〇2係 包括經由選自化學蒸汽沉積、物理氣相沉積及金屬有機化 學蒸汽沉積之沉積方法而沉積第一障壁層。本發明部分態 樣中’步驟1 〇 2係包括於約略室溫下沉積該第一障壁層。 步驟102亦包括沉積該第一障壁層直至厚度介於約1〇至1〇〇 毫微米範圍内。 ' Λ I 步驟1〇4係沉積銥-组—氧(Ir-Ta-0)複合膜,覆蓋該第二Page 11 488011 丨 V. Description of the invention (8)-X-ray diffraction (XRD) spectrum at various annealing temperatures below 5 minutes. When it is higher than 70 degrees Celsius, a peak of τ ~ 〇5 and an ideal ratio of I r〇2 are found at the same time. This phenomenon corresponds to a reduction in sheet resistance. At higher temperatures, the Ir02 spike continued to increase, while the IΓ spike decreased. Above 900 ° C, the intensity of the Ir spike was extremely weak, and no increase in the intensity of the ΓΓ02 spike was found. These conditions correspond to an increase in sheet resistance above 850 ° C. No change in the intensity of the τ'05 peak was observed above 700 ° C. No siliconized button or iridium silicide was found here, indicating that the barrier properties of the iridium composite film were not reduced. 7 is a cross-sectional view of an iridium-button-oxygen film covering a silicon substrate according to the present invention. Figure 7 demonstrates the integrity of the film after 5 minutes of oxygen annealing at 950 ° C. No hillocks were formed, and no peeling occurred between the film layers. Fig. 8 is a flowchart illustrating the steps of a method for forming a high-temperature stable conductive barrier layer such as that used in a ferroelectric capacitor. Step 100 is to provide an integrated circuit substrate. The substrate is selected from the group consisting of materials silicon, polycrystalline silicon, dioxide dioxide, and silicon-germanium compounds. Step 0 2 is to deposit a first barrier layer including a button (Ta) covering the substrate. Step 102 includes depositing a first barrier rib selected from the group consisting of light material, silicon nitride (TaSi and nitride button (TaN). Step 102) includes passing through a group selected from chemical vapor deposition, physical vapor deposition, and metal organic chemical vapor. The first barrier layer is deposited by a deposition method. In some aspects of the present invention, step 1 102 includes depositing the first barrier layer at about room temperature. Step 102 also includes depositing the first barrier layer until the thickness is between In the range of about 10 to 100 nanometers. 'Λ I Step 104 deposits an iridium-group-oxygen (Ir-Ta-0) composite film to cover the second
第12胃 488011 ;五、發明說明(9) I障壁層。步驟104係包括經由選自化學蒸汽沉積、物理氣The twelfth stomach 488011; V. Description of the invention (9) I barrier layer. Step 104 includes via a process selected from chemical vapor deposition, physical gas
I I相沉積及金屬有機化學蒸汽沉積之沉積方法而沉積該銥-I I phase deposition and metal organic chemical vapor deposition are used to deposit the iridium-
I I钽-氧複合膜。本發明部分態樣中,步驟1 04係包括於約略 !室溫下沉積該銥-鈕-氧複合膜。步驟1 0 4包括該銥-鈕-氧 複合膜係選自以下材料: 鈒、钽、及氧; 銀、钽、及Ir02 ; 鈒、組、及Ta2 05 ;I I tantalum-oxygen composite film. In some aspects of the present invention, step 104 includes depositing the iridium-button-oxygen composite film at approximately room temperature. Step 104 includes the iridium-button-oxygen composite film selected from the following materials: hafnium, tantalum, and oxygen; silver, tantalum, and Ir02; hafnium, group, and Ta2 05;
Ir02 及Ta205 ;Ir02 and Ta205;
Ir02、Ta205、銥及鈕; 鋒及组; 、 銥及Ta205 ; r 钽及Ir02 ; I Ir02、Ta2 05 及銥; I r02、Ta2 05 及组;且 其中前述材料中之T a2 〇5係包括T a2 〇5及(T a,Ο)之r -相變 體。步驟104係包括沉積該銀-组-氧複合膜至介於約10至 500毫微米範圍内之厚度。 步驟1 0 6係為一產物,形成可對抗與該基材之相互作用 |的多層結構。 本發明之部分態樣中,步驟1 0 4包括經由物理氣相沉積 沉積該銥-鈕-氧複合膜。詳言之,於氧環境中使用個別銥 及鈕靶極進行直流電共同沉積。已知所有濺射方法一般皆 使用氬(Ar),而本發明部分態樣中,氧與氬同時使用。此Ir02, Ta205, iridium and button; front and group;, iridium and Ta205; r tantalum and Ir02; I Ir02, Ta2 05 and iridium; I r02, Ta2 05 and group; and T a2 〇5 in the aforementioned materials includes T a2 05 and (T a, 0) r-phase transitions. Step 104 includes depositing the silver-group-oxygen composite film to a thickness ranging from about 10 to 500 nanometers. Step 106 is a product that forms a multilayer structure that resists interaction with the substrate. In some aspects of the invention, step 104 includes depositing the iridium-button-oxygen composite film via physical vapor deposition. In detail, individual iridium and button targets are used for co-deposition in an oxygen environment. It is known that all sputtering methods generally use argon (Ar), and in some aspects of the present invention, oxygen and argon are used simultaneously. this
第13頁 488011 五、發明說明(10) 外’步驟1 0 4係包括於介於約2 0 0至4 0 0瓦範圍内之功率 下,共同濺射銥及钽,其中氬相對於氧之比例係約為1 : x ’其中X係大於或等於1。該钽靶上之功率係大於或等於 該銥靶上之功率。本發明部分態樣中,多個資源靶極係選 自靶極材料銥、钽、銥與钽之複合材料、銥與氧之複合材 料、及鈕與氧之複合材料。當該資源靶極包括氧時,可形 成銀-組-氧膜,即使濺射並非於氧環境下進行亦然。 或步驟1 0 4包括於氬環境中,使用單一複合資源,經由 物理氣相沉積、直流電或RF (射頻)濺射而沉積該銥-钽-氧 複合膜。該銥_钽複合資源靶極係選自材料Ta-Ir02、Page 13 488011 V. Description of the invention (10) Outside step 10 4 involves co-sputtering iridium and tantalum at a power in the range of about 200 to 400 watts, where argon is opposite to oxygen. The ratio is about 1: x 'where X is greater than or equal to 1. The power on the tantalum target is greater than or equal to the power on the iridium target. In some aspects of the present invention, the plurality of resource targets are selected from the target materials iridium, tantalum, a composite material of iridium and tantalum, a composite material of iridium and oxygen, and a composite material of button and oxygen. When the resource target includes oxygen, a silver-group-oxygen film can be formed, even if sputtering is not performed in an oxygen environment. Or step 104 includes depositing the iridium-tantalum-oxygen composite film through physical vapor deposition, direct current or RF (radio frequency) sputtering using a single composite resource in an argon environment. The iridium-tantalum composite resource target is selected from materials Ta-Ir02,
Ir'Ta205、Ir02/T、a2〇5、Ir/Ta/Ir02/Ta2 05、Ir- Ir02-Ta205、 Ir-Ta-Ir02、Ir-Ta-Ta205、Ta-Ir02-Ta2〇5。如前文所述,二 本發明部分態樣中,步驟1 0 4之錢射方法亦包括使用q2及 Ar 〇 本發明部分態樣中’步驟1 0 4係包括於介於約攝氏㈣〇及 1 0 0 0度之範圍内的溫度下退火歷經約1至3 〇分鐘之期間。 如此,該複合膜結構被安定化,而保持良好之電導係數 本發明部分態樣係於步驟1 〇 4之後包括另一步驟/步驟 105(未示)係沉積第二障壁層,包括覆蓋該銥—鈕—氧^合 膜之貴金屬,使該第二障壁層可對抗氧擴散至該銥—麵:氧 膜内,改善該銥-钽-氧膜相對於後續沉積材料之界面。+ 驟105包括沉積第二障壁膜,選自銥、釕、ιΓ〇7、挺 (Pt)、及Ru〇2。步驟係包括沉積該第二障壁層交介於 約10至2 0 0毫微米範圍内之厚度。該第二障壁層係經;由選Ir'Ta205, Ir02 / T, a205, Ir / Ta / Ir02 / Ta205, Ir-Ir02-Ta205, Ir-Ta-Ir02, Ir-Ta-Ta205, Ta-Ir02-Ta205. As mentioned above, in some aspects of the present invention, the method of coin shooting in step 104 also includes the use of q2 and Ar. In some aspects of the present invention, 'step 1 0 4 is included between about 0 ° C and 1 ° C. Annealing at a temperature in the range of 0 0 0 degrees lasts for a period of about 1 to 30 minutes. In this way, the composite membrane structure is stabilized while maintaining a good electrical conductivity. Partial aspects of the present invention include another step / step 105 (not shown) after step 104 and deposit a second barrier layer, including covering the iridium The precious metal of the -button-oxygen film allows the second barrier layer to resist the diffusion of oxygen into the iridium-plane: oxygen film, and improves the interface of the iridium-tantalum-oxygen film with respect to subsequent deposited materials. Step 105 includes depositing a second barrier film selected from the group consisting of iridium, ruthenium, ιΓ07, Pt, and Ru〇2. The step includes depositing the second barrier layer at a thickness in a range of about 10 to 200 nanometers. The second barrier layer is meridian;
488011 — ----------------------- I五、發明說明(11) ^ — |自物理氣相沉積、化學瘵忒沉積及金屬有機化學蒸汽沉穑 i之沉積方法沉積。本發明部分態樣中,步驟105係包括於、 I約略室溫下沉積s玄第一障壁層。 、 !圖9係為説明使用本發明視頻障壁銥複合犋形成鐵電性 電容器之夕驟的流程圖。步驟20〇至2〇4係重複圖8之 丨丨100至104。如前文所述,步驟20 5 (未示)係沉積第二障劈 i膜,選自铱、釘、Ir〇2、麵(Pt)、及h〇2。後續盆他步 丨驟。步驟206係沉積鐵電性材料,覆蓋該銥、钽_氧複合 層。步驟208係沉積導電性頂層電極,覆蓋該鐵電性^ 料。步驟2 1 〇係為一產物,其中形成鐵電性電六器 提供一’其可用於形成鐵電性電'容谷器之電極。 該複合膜係匕括组及氧、及银。該银複合 i 擴散側該基材,於氣環境中對抗高溫退二。、有效地對抗氧 化组層下使用時,形成之導電性障壁亦抑制2 何底層矽基?二結I ’不形成降低電極界面特性之矽化銥 產物。該銥禝a祺於高溫退火過程中保持導電性,而對广 剝離及小立形成,即使於氧氛圍下亦然。前述銥複合獏$ 使用於製造#駐型記憶體,諸如金屬鐵電性金屬氧化物矽 (MFMOS)、金屬鐵電性金屬矽(MFMS)、金屬鐵電性絕緣體 二金屬絶緣體鐵電性^^^金屬鐵電性石夕 、器熱電紅外線感測器、光學顯示器、光學 切換兀件、壓雷械& π # π 么η。換旎器、及表面聲波(SAW)裝置。此外, 3玄銀才良3膜可俊田# ^、 於,、他问溫乳化環境。例如’航空太空 應用中使用於製造大箭推進器之材料。熟習此技藝者可明 488011 五、發明說明(12) 瞭其他變化及具體實例。488011 — ----------------------- I V. Description of the invention (11) ^ — | From physical vapor deposition, chemical hafnium deposition and metal organic chemistry Deposition by vapor deposition method i. In some aspects of the present invention, step 105 includes depositing a first barrier layer of suan at approximately room temperature. Figure 9 is a flowchart illustrating the steps of forming a ferroelectric capacitor using the video barrier iridium composite osmium of the present invention. Steps 20 to 204 are repeated from 100 to 104 in FIG. 8. As described above, step 20 5 (not shown) is to deposit a second barrier film i, selected from the group consisting of iridium, nails, Ir02, plane (Pt), and h〇2. Follow-up steps. In step 206, a ferroelectric material is deposited to cover the iridium, tantalum-oxygen composite layer. Step 208 is to deposit a conductive top electrode to cover the ferroelectric material. Step 2 10 is a product in which a ferroelectric electric device is formed. An electrode is provided which can be used to form a ferroelectric electric device. The composite film is composed of a set of oxygen, oxygen, and silver. The silver composite i diffuses the substrate against high temperature degradation in a gaseous environment. 2. When used effectively under the anti-oxidation layer, the conductive barrier formed also inhibits the underlying silicon base. Binary I 'does not form an iridium silicide product that reduces the interface characteristics of the electrode. The iridium oxide maintains conductivity during high-temperature annealing, and it can be peeled and formed into small stands, even under an oxygen atmosphere. The aforementioned iridium compound is used for manufacturing resident memory such as metal ferroelectric metal oxide silicon (MFMOS), metal ferroelectric metal silicon (MFMS), metal ferroelectric insulator and two metal insulator ferroelectric ^ ^^ Metal ferroelectric stone, thermoelectric infrared sensor, optical display, optical switching element, lightning arrester & π # π Mod η. Changer, and surface acoustic wave (SAW) device. In addition, 3 玄 银 才 良 3 膜 可 俊 田 # ^, Yu, He asked about temperature emulsification environment. For example, materials used in the manufacture of large arrow thrusters in aerospace applications. Those who are familiar with this art can know 488011 5. Invention description (12) Other changes and specific examples.
第16頁Page 16
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