TW479290B - Dielectric layer etching process to improve etch stop problem - Google Patents

Abstract

The inventive dielectric layer etching process contains following steps: providing a semiconductor substrate having a dielectric layer; performing plasma etching to etch part of the dielectric layer, the plasma etching using reaction gases containing at least carbon and fluorine and carrier gas and etching pressure of 20 to 30 mTorr to provide etching selectivity of etching dielectric layer with respect to the film layer underneath the dielectric layer. In a preferred example, the reaction gases for the dielectric layer etching further includes an oxygen-containing gas such as carbon monoxide or oxygen to improve etch stop problem. In other examples, the reaction gases can also include carbon-hydrogen-fluorine gas to increase coverage, isotropy and uniformity of the polymer formation and thus improve etching selectivity.

Description

479290 A7 B7 V. Description of the invention () Field of the invention: The present invention relates to a semiconductor process, and in particular, it relates to a process for etching a dielectric layer that improves the problem of etch stop and reduces material loss caused by plasma. Background of the Invention: Since the birth of the first integrated circuit components, the semiconductor industry has developed for nearly forty years, and the technology of semiconductor manufacturing has continued to progress to minimize the size of components on wafers; Advances in process technologies such as photolithography, lithography, etching, and heat treatment have increased the integration of components and circuits on integrated wafers. In terms of current process technologies, a single wafer can already accommodate tens of millions, or even Hundreds of millions of components, and advances in process technology have also allowed component sizes on integrated circuits to be reduced to sub-micron, or even deep sub-micron size ranges to achieve higher product Set goals. With densely arranged components, the distance between the various components on the wafer must also be relatively reduced, and the challenges in the process are also increased. See the first figure, taking the general process as an example, on the substrate 10 All kinds of element structures will be formed. After forming, for example, the gate electrode 1, the source / drain region 14 or other conductor structures on the substrate 10, all other element regions or It is the electrical connection of the conductor layer to the gate electrode 12 and the source / drain region 14, so this paper size applies the Chinese National Standard (CNS) A4 specification (210X29 * 7 mm) (please read the precautions on the back first) (Fill in this page)-Binding · Order 479290 A7 B7 V. Description of the invention ()

C must be filled with the conductive material 层 8 in the opening of the insulating layer 16 in a way to make contact (c ο n t a c t). For the contact forming the source / drain region 丨 4, the opening forming the contact must be defined in the insulating layer 16 and the opening in the source / drain region 14 must be accurately defined; however, in the component density Under increasing conditions, the size of the gate and other component areas is also shrinking, and the opening corresponding to the source / drain area i 4 is also shrinking. Therefore, the requirements for process accuracy and resolution have also increased, and The original tolerance of the manufacturing process (or pr 〇cesswind 0 w) is greatly reduced. Generally, in the lithography process used to define various patterns and the matching money engraving process, when the actual process is performed, not only the openings that are too small cannot be defined, but also the error in the definition of the position will occur. As shown in the figure, the position of the opening defined in the insulating layer 16 is shifted. In terms of the structure of the transistor, the area next to the gate 丄 2 is a lightly doped source / > and an electrode junction area (Hghtly doped soure / dHiri junction; LDD), or a source / drain junction. Area area (s〇Urce / draiii ju η cti 〇n) 1 4. Under the offset of the opening, the filled conductor 8 will make the gate electrode 12 and the immediate source / drain interface area 1 4 A short circuit occurs, which causes a change in the operating characteristics of the device, or causes a problem such as failure of the device. Therefore, in order to solve the above-mentioned problems, it is proposed in the traditional process that all paper sizes apply the Chinese National Standard (CNS) A4 specification (210X297 mm) (please read the precautions on the back before filling this page).

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The so-called self-traveling, such as the formation of two gates of electrical materials, will not lead to the formation of good characteristics, and 5. Description of the invention (seif-aligned contact (seif-aligned contact); It is not shown in the figure. It is formed on and above the side wall of the gate electrode 12. For example, silicon nitride with good insulation properties can cover the areas immediately adjacent to the two sides. Therefore, it is protected by a nitride layer. That is, the opening contacted by the source / drain interface region 14 has an error in the definition, which causes a problem of the short circuit between the source / drain interface region 14 and the gate. At the same time, there is also nitrogen at the gate surface of the contact. Covering the silicon layer to provide a shy effect and prevent accidental electrical connections; therefore, by applying the self-aligned contact as described above, the tolerance of the process can be increased to increase the controllability of the process and the yield of the product. β However, for self-aligned contact process applications, it is necessary to provide an etching selectivity relative to the underlying silicon nitride layer 20 when the dielectric layer 16 is etched. For current applications, the dielectric layer 16 Most of the materials used are silicon oxide or borophosphosilicate glass (BP SG) and other materials; in the traditional etching process, fluorocarbon gas is used, and a low pressure of less than 10 mTorr (m τ 0 Γ Γ) is used, for example, 7 mTorr or less to generate a plasma. The dielectric layer i 6 is etched. However, in the conventional dielectric layer etching process, in order to provide a selectivity to the silicon nitride layer 2 0 when the dielectric layer 16 of the oxidized stone is etched, a rich SiO 2 layer is used. A polymer-rich process is used to generate more polymer materials on the surface of the silicon nitride layer 20 during the etching process, so as to prevent the vaporized silicon layer 20 from being damaged by plasma etching; In this polymer-rich process, it is easy to accumulate too much polymer material, which accumulates in the finished paper. The Chinese National Standard (CNS) A4 specification (2 丨 0 > < 297 mm) f Please read the precautions on the back before filling in this page). Qin · 479290 A7 B7 V. Description of the invention () Within the opening that has been completely etched, the plasma etching cannot continue down, resulting in the etch stop (etch-st ο p) problem, and could not complete the definition of the opening and provide If you need to solve the above problems, you need to solve the problem of etching stop. In the traditional method, the etching process is often adjusted to a polymer-lean process, such as further reducing the pressure. In order to reduce the generation of polymer materials and avoid the phenomenon of etching stop caused by excessive polymer accumulation, in the process of thin polymer, it is easy to make nitride due to the lack of polymer protection on the surface of the atmospheric silicon layer 20. The silicon layer is damaged by the plasma, resulting in the loss of the silicon nitride material, which reduces the reliability of the process, and also makes the process a major challenge in the control of the process due to the above-mentioned problem of etching stop and the loss of material caused by the plasma. Object and Summary of the Invention The object of the present invention is to provide a dielectric layer etching process. Another object of the present invention is to provide a dielectric layer etching process, which provides the etching selectivity of the dielectric layer with respect to the underlying film layer when the dielectric layer is etched and the reaction pressure is adjusted. Another object of the present invention is to provide a dielectric layer etching process to solve the problem of the etching stop of the traditional process and the material damage caused by the plasma. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (21〇 ×: 297 cm) (Please read the notes on the back before filling out this page)-Binding · Ordering x Description of the invention (Problem missing. Another object of the present invention is to provide a dielectric layer etching process for magic horses. Increase the controllability and tolerance of the process. The dielectric layer etching process in the present invention can mainly include the following steps: firstly, a semiconductor substrate can be provided with a dielectric layer on the substrate; and then plasma can be engraved with the last name The dielectric layer, the reaction gas at the time of electro-stimulation, at least contains a fluorocarbon gas and a carrier gas. The pressure of the plasma etching, shielding, and fruit erosion is about 20 to 30 millitorr to provide an etching medium. In the case of the electrical layer, the phase μ _ ^ ′ is relative to the etching selectivity of the underlying film layer. In a preferred embodiment, the reactive gas in the etching process of the upper dielectric layer further includes a gas containing Oxygen gas, such as ^ ^ ^ ^ columns such as carbon monoxide Or oxygen, etc., to further improve the problem of etching stop. In the application of different embodiments, a gas can be added and a fluorocarbon gas can be added. ^ Yellow cap and isotropy formed with molecular substances on the next day. , And uniformity, etc., to improve the selectivity during etching. JL type brief description: The first figure shows a schematic diagram of an example of the opening offset in the conventional contact structure of the conductor structure. Shows the traditional dielectric layer etching process The schematic diagram of the cross-section after the self-aligned contact of the source / area is formed. This paper size applies to the Chinese National Standard (CNS) A4 specification (21〇ϋ 公 庆) (Please read the precautions on the back before filling this page) · Order 479290 A7 --- ^ ___-__ B7 V. Description of the Invention () The third figure printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs shows the silver engraving process of the dielectric layer in the present invention, which is applied to the self-aligning contact process A schematic cross-sectional view of an embodiment. A fourth cross-sectional view showing an embodiment of a dielectric layer post-etching process of the present invention applied to a borderless contact process. A fifth drawing * shows the present invention. A partial cross-sectional schematic diagram of an induction-combined high-density electrocavity reaction machine. Detailed description: ^ The purpose of the present invention is to provide a dielectric layer etching process, which is adjusted by the combination of reaction gas and reaction pressure. It can provide the etching selectivity of the dielectric layer relative to the underlying film during the etching of the dielectric layer. The dielectric layer etching process in the present invention can be applied to self-aligned contact (self_aHgnecl COntaeteSAC) and borderless contact (borderless contact) ) And other dielectric layer etching processes, in order to solve the problem of etching stop of the traditional process, eliminate the material loss caused by the plasma, and because of the increase in process controllability & the tolerance of the upgrade process and products Production efficiency and yield. Referring to the third figure, the steps of the dielectric layer etching process in the present invention. In this embodiment, a semiconductor substrate 30 is first provided, and the substrate 30 has a dielectric layer 38 and a dielectric layer 38 thereon. Most of the materials used are silicon oxide or borosilicate-filled glass (BPSG), etc .; the substrate 30 may have a transistor, a structure, which includes a gate electrode 3 2 and a source / drain region 34, and a transistor structure. A silicon nitride layer 36 is applied on the self-alignment process to cover the gate 32. ------------ 9¾! F Please read the notes on the back ¾ before filling out this page)-Order. Plus this paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 479290 A7 B7 V. Description of the invention (Generally speaking) 'To define the position where the source / drain region 3 and 4 contact holes are needed, a photoresist layer 40 will be formed on the dielectric layer 38, and the photolithography process will be used. The desired pattern is defined thereon as a mask for etching the dielectric layer 38. Plasma etching is then performed to etch the portion of the dielectric layer 38 that is not covered by the photoresist layer 40. The reaction gas for plasma etching may include a fluorocarbon gas and a carrier gas. Between 20 and 30 millitorr to provide the selective selectivity of the film layer below the dielectric layer 38 when the dielectric layer is touched, that is, relative to the nitrogen-cut layer 2 below the dielectric layer 38 ( ) And the etch selectivity of the silicon material of the pure 30 source / drain region 34 surface. In a preferred embodiment, the carrier gas used in the dielectric layer etching process may be a blunt gas. In an example, a pure gas such as argon and helium may be used. For example, a gas is used, and the flow rate is about 2 Between 50 and 4 50 sccm, ^ C m, more preferably between about 4 0 and 4 4 0 sccm, and the best example can be leaves ^ usccm ° The above fluorocarbon gas can use a variety of Different fluorocarbon gases, or a combination of evening gas, etc. In this example, Qi Wei, such as C4FS and cp-coal-like carbon, 4H, 13F6, etc., can be used as the combination; for the example when C4 F 8 is used , Its method, ^ ° liter "丨 The amount of L is between about 15 £ 2 and 1 sccm, a better example is about 1 ό + /-2 scm 'ISsccm 〇' The best example is about the above dielectric The paper dimensions of the gas and Xinggu parameters of the layer etching process are applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) (please read the precautions on the back before filling this page). Printed by the Bureau ’s Consumer Cooperatives 479290 A7 —— -——___ V. Description of the invention () Coordination with 'can produce enough under high pressure Protect the silicon nitride layer 20, (please read the precautions on the back before filling this page) and protect the polymer material on the surface of the source / drain region 3 4 silicon, and at the same time provide a good money engraving rate, which can be effective Avoids the problem of etching stop in the traditional process, and provides good etching selectivity through the protection of polymer materials. Prevents the loss of silicon nitride layer 36 or source / drain region i caused by the electro-polymerization process. 3 4 Loss of silicon material. In the preferred embodiment of the present invention, the reactive gas in the dielectric layer etching process can be added with an oxygen-containing gas, such as carbon monoxide (C0) or oxygen. The suspension problem caused by too much molecular substance further avoids the effect of suspension at the rest, and enables the etching of the dielectric layer 38 to continue until the entire contact hole 4 2 is formed. In the preferred embodiment, S ′ described above When oxygen is used, the flow rate is about 1 to 5 sccm; when carbon monoxide is used, the flow rate is about 5 to 15 s cc m, and the best example is about 10 sccm. In the present invention, Dielectric layer etching process can By a general plasma etcher. E.g. Applied Materials, Inc. (Applied Materials, Inc.

Reactors such as HDP5300, ips (inductive plasma source) manufactured by Santa Clara, California, u.S.A.). In a preferred embodiment, the energy of the electric source during plasma etching is between about 900 and 1 200 watts; the matching bias energy is about 100 to 2000 watts. In the better case, it is about 15 000 watts. This paper size is applicable to China National Standard (CNS) A4 specification (210X297, Gongqing 479290, A7, B7) V. Description of invention () In the current stage of semiconductor manufacturing, plasma etching can use inductively coupled high-density electropolymerization (inductively coupled) high-density p 1 asma) etching reaction machine, which can provide good selectivity and process flexibility at the same time, and can be applied to other post-etching processing steps after plasma etching. In addition to the above In addition to the machine, there are other high-density machines with high density c. Degrees, including remote plasma source (RPS) and electron-cyclotron resonance (ECR) and other machines; The definition of density plasma can be a situation where the ion density reaches at least 10 E 1 1 cm · 3 or more in a plasma-filled space. An example of the above-mentioned inductive coupling and high-density plasma etching reaction machine is This is an IPS (inductive plasma source) induction machine manufactured by American Applied Materials. The approximate reaction chamber structure and matching equipment are shown in the partial cutout in the fifth figure. As shown in the schematic diagram, the wafer to be processed 80 is carried by a cathode stage 82, and the cathode stage 82 is supplied with radio frequency (RF) energy provided by a first radio frequency energy source. A silicon ring surrounding the stage 82 8 6 can be controlled by an array of heating lamps 8 8, while the grounded silicon wall 90 is surrounded by the plasma processing area, and the silicon top cover 9 2 is covered by the plasma processing area. The silicon ring 86 and a part of the silicon top cover 92 can be used to remove fluorine generated by a fluorocarbon plasma or a fluorine-containing plasma; the process gas is supplied by one or more of the lower gas supply ends 9 4. Through the mass flow controller 9 The block 6 is supplied. In addition, the upper gas supply end can form a small gas dissipating head at the center of the silicon top cover 9 2 The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) (Please read the back first Please pay attention to this page and fill in this page)-Binding and binding 479290 Α7 Β7 V. Description of the invention ((shower head), vacuum pump system (not shown) is connected to the pump channel 98 located below the reaction chamber to maintain Reaction chamber at set pressure, system control The device i 00 controls the operation of the etching reaction machine and cooperating equipment.

Cy- In the previous architecture, the silicon top cover 92 is grounded, but the resistance and thickness of the semiconductor are adjusted and selected so that the approximately axial RF magnetic field can pass through the Shixi top cover 92, and the axial direction The RF magnetic field is generated by an internal induction unit 106 group 108 driven by RF energy supplies 110 and 112, respectively. In addition, a single RF energy supply can be used to replace the above design with an optional power splitter; other coil structures can be used, such as having a flat, 'spiral induction coil on the top cover' Transformer coupled plasma (TCP) reactor on 92. (Please read the precautions on the back before filling out this page) Printed system controller of the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs can control the mass flow controller 9 6, the heating lamp 8 8, 94, the cooling channel 96 The cold water supply, the throttle valve of the vacuum pump, and the energy supply source 84, 110, 112, the above functions can control the chemical composition of the etching to achieve the conditions in the following embodiments. The response parameters can be stored in the controller 100 using conventional magnetic, optical, or semiconductor memory devices, and read out by the controller 100 from the storage medium inserted therein. Generally, the magnetic field can be magnetized by the equipment supplier. Optical media, such as film or CDROM, provide the required parameters to be read by the controller 100. "This paper rule Chinese National Standard (CNS) A4 specification (210X297 mm) 479290 A7 B7 V. Description of the invention The electric capacity of the control surface to the energy capacity is the same as that of the surface and the surface of the table. The capacity of the table is determined by the DC voltage of the printed surface area of the employee's cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. At this time, the induced energy can generate an electropolymerization source region far from the wafer 80; the plasma source energy can be increased to increase the etching rate, and control the types and number of excited atomic groups; and the bias energy can be changed to make the ions Accelerate in the surface area with high energy or low energy, and then impact the wafer 80 with a predetermined energy. In addition, in addition to the above embodiments of the dielectric layer etching process of the present invention applied to self-aligned contact applications, the following The application of the present invention will be described with another embodiment applied to borderless contact. As shown in the fourth figure, the gate structure 5 2 of the semiconductor substrate 50 has a transistor on the semiconductor substrate 50. And the source / drain region, in a preferred embodiment, a silicide metal 54 is formed on the source / drain region, and different transistors or element regions are separated by, for example, field oxide regions. Areas 5 and 6 are isolated. In general, the application of so-called borderless contact refers to the formation of the conductor pattern of the contact area, which will not only be formed on the source / drain area to be connected, but also at the same time. Straddle the isolation region 56 to increase the process window and further increase the line width of the contacts and wires. The upper photoresist layer 62 is used as a mask, and the dielectric layer 60 is etched. Shape (Please read the notes on the back before filling this page) • Packing · 12 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 479290 A7 __B7__ V. Description of the invention ()-'·' ； ^ (Please read the precautions on the back before filling this page) When the contact hole 64 is formed, the dielectric layer 60 is mostly made of silicon oxide or borophosphite glass (BPSG) dream material f, but the isolation area 5 6 same With a silicon oxide material, in order to prevent the isolation region 56 from being damaged by the etching process, a protective silicon nitride layer 5 8 is generally covered thereon; therefore, during the etching of the dielectric layer 60, it is necessary to Provides good etchability compared to the silicon nitride layer 58. In this example, the plasma etching process of the present invention can also be applied, and the reaction conditions of each item can be the same as the above embodiment, and carbon is added to the reaction gas. Fluorine gas and carrier gas, and the plasma etching pressure is about 20 to 30 mTorr, and the same selective addition of oxygen-containing gas such as carbon monoxide or oxygen can be provided to etch the dielectric layer at 60, relative Etch selectivity relative to underlying silicon nitride layer 58. Eco-Luxury is produced in the preferred embodiment by the employee consumer cooperative. The reaction gas in this application example can be further added with argon fluorocarbon gas, such as C Η 2 F 2, CHF 3 in this example. Or a combination thereof, the flow rate is about 10 to 20 sccm in terms of use, and more preferably 15 sccm. With the addition of fluorocarbon gas and the proportion adjustment with respect to fluorocarbon gas, the formation of high-molecular substances in the process of engraving can have better coverage, isotropy, and uniformity, and improve the selectivity during etching. . The present invention is explained in the preferred embodiment as above, and is only used to help understand the implementation of the present invention. It is not intended to limit the spirit of the present invention. Familiarize yourself with this paper from the application of the Chinese National Standard (CNS). > < 297 public directors) 479290 A7 B7 V. Description of the invention () (Please read the notes on the back before filling out this page) After understanding the spirit of the invention, the domain artist will not depart from the spirit of the invention When it can be changed and retouched and equivalent changes replaced, the scope of patent protection shall be determined by the scope of the attached patent application and its equivalent fields. This paper size applies to China National Standard (CNS) A4 (210X 297 mm)

Claims (1)

479290 _ A8 B8 C8 D8 Patent Application Scope 1. A dielectric layer button engraving process includes at least the following steps: providing a semiconductor substrate with a dielectric layer on the substrate; and performing plasma etching to etch parts The dielectric layer, the plasma etching reaction gas contains at least a fluorocarbon gas and a carrier gas, and the plasma etching pressure is about 20 to 30 millitorr to provide relative The etching selectivity of the film layer under the dielectric layer. 2. The dielectric layer etching process according to item 1 of the scope of the patent application, wherein the reaction gas further includes an oxygen-containing gas. 3. If the dielectric layer etching process of item 2 of the patent application scope, wherein the above-mentioned oxygen-containing system is one of carbon monoxide and oxygen. 4. If the dielectric layer etching process of item 2 of the patent application scope, wherein the oxygen-containing gas mentioned above uses oxygen, its flow rate is between about 1 to 300 Cc m. (Please read the note 3 on the back first to write this page)-Printed and printed by the 1T Consumer Affairs Cooperative of the Central Bureau of the Ministry of Economic Affairs 5 · If the dielectric layer is engraved in the process of applying for the second scope of the patent application, its description contains oxygen When carbon monoxide is used for the gas, its flow rate is about 5 to medium. 6 • If the dielectric layer is etched in item (1) of the scope of patent application, the carrier gas contains at least a passive gas. Medium and upper 15 paper sizes, using China National Standard (CNS) A4 (210X297 mm) I 479290 A8 B8 C8 D8 6. Scope of patent application 7 · For the dielectric layer etching process of item 1 of the scope of patent application, where the above-mentioned carrier gas uses argon, its flow rate is about 250 to 4 50 sccm. between. 8 · If the dielectric layer etching process of the first scope of the patent application, the above fluorocarbon gas contains at least one of C4F8 and C3F6 or a combination thereof 0 9 · If the dielectric layer etching process of the first scope of the patent application When C4F8 is used for the above-mentioned fluorocarbon gas, the flow rate is about 15 to 21 sccm. 10. The dielectric layer etching process according to item 1 of the scope of patent application, wherein the reaction gas further includes a hydrocarbon gas. 1 1. The dielectric layer etching process according to item 10 of the patent application scope, wherein the above-mentioned hydrocarbon gas includes at least one of CH2F2 and CHF3 or a combination thereof. 1 2. If the dielectric layer etching process of item 1 of the scope of patent application, which is on the top (please read the precautions on the back first ® write this page) At the moment of the plasma-^ 3, the description of the eclipse plasma is on the tween tile. Intermediate thereof, the Patent Cheng tile made ο engraved 00 etch layer 2 to ο dielectric ο evening ο of electrically a 1 by about the amount of application moment when] TB confining incubated range pressure Lee requested partial spot of such corrosion • slurry 3 1 ί Description 16 This paper size is applicable to China National Standards (CNS) A4 (210 × 297 mm) 479290 A8 B8 C8 D8 6. Scope of patent application ^ --1- Printed by the Bayer Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 1 4 · For example, the dielectric layer etching process of the first patent application scope, wherein the above-mentioned substrate has a transistor structure, the transistor structure has a silicon nitride layer applied to the self-alignment process to cover the gate, and the plasma The etching is used to provide an etching selectivity of the silicon material relative to the silicon nitride layer below the dielectric layer and the substrate when the dielectric layer is etched. 15 · According to the dielectric layer etching process of item χ in the patent application scope, wherein the above-mentioned substrate has a transistor structure, the transistor structure has a silicon nitride layer covering the source-drain region, and the plasma etching system It is used to provide the etching selectivity of the silicon nitride layer relative to the silicon nitride layer under the dielectric layer when the dielectric layer is etched. 16 · —A dielectric layer etching process includes at least the following steps: a semiconductor substrate is provided; the substrate has a dielectric layer; and a plasma etching is performed to etch a part of the dielectric layer. The poly-etching reaction gas includes at least a fluorocarbon gas, an oxygen-containing gas, and a carrier gas. The pressure of the electro-polymerization is about 20 to 30 millitorr, so that when the dielectric layer is etched, relative to the Etch selectivity of the film layer below the dielectric layer. 17 · If the dielectric layer etching process of item 16 of the scope of patent application, the above-mentioned oxygen-containing system is one of carbon monoxide and oxygen. ί 8. If the dielectric layer etching process of item 17 in the scope of patent application, wherein the oxygen-containing gas mentioned above uses oxygen, the flow rate is about $ c ββ to 5 sccm. (Please read the "Notes on the back" first page of Xiangwo)-Equipment ·, ιτ 17 479290 A8 B8 C8 D8 VI. Patent Application Scope Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 19 17. The dielectric layer etching process of item 17, wherein when the above-mentioned oxygen-containing gas uses carbon monoxide, the flow rate is about 5 to 15 sccm. 20 • The dielectric layer etching process according to item 16 of the scope of patent application, wherein the above-mentioned carrier gas includes at least a passivation gas. 2 1 · If the dielectric layer etching process of item 16 of the patent application range, wherein the argon gas is used as the carrier gas, the flow rate is about 250 to 450 sccm. 2 2. The dielectric layer etching process according to item 16 of the scope of patent application, wherein the above fluorocarbon gas contains at least one of C4F8 and C3F6 or a combination thereof. 2 3. According to the dielectric layer etching process of item 16 in the scope of patent application, wherein when the above fluorocarbon gas uses C 4 F 8, its flow rate is about 15 to 2 1 s c cm. 24. The dielectric layer etching process according to item 16 of the scope of patent application, wherein the above-mentioned reaction gas further includes a hydrocarbon gas. 2 5. If the dielectric layer etching process of item 24 of the patent application scope, which (please read the precautions on the back _ write this page first). The size of the binding and binding paper is applicable to the Chinese National Standard (CNS) Α4 specification ( (210 × 297 mm) 479290 A8 B8 C8 D8 6. Scope of patent application The above-mentioned hydrocarbon and fluorine gas printed by the Shell Standard Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs shall contain at least one of CH2 ^ 2 and CHF3 or a combination thereof. 26. If the dielectric layer etching process of item 16 in the scope of the patent application, the plasma source energy in the above-mentioned moment of electricity is about 900 to 1200 watts. 27. The dielectric layer etching process according to item 16 of the scope of the patent application, wherein the bias energy of the above-mentioned plasma is about 1000 to 2000 watts. 28. If the dielectric layer etching process of item 16 of the application for a patent, wherein the above-mentioned substrate has a transistor structure, the transistor structure has a silicon nitride layer applied to the self-alignment process to cover the gate, the Plasma etching is used to provide the etching selectivity of the silicon material relative to the nitride layer and the substrate below the dielectric layer when the dielectric layer is etched. 29. The dielectric layer etching process according to item 16 of the application for a patent, wherein the above-mentioned substrate has a transistor structure 'the transistor structure has a silicon nitride layer covering the source and electrode regions' and the plasma etching system is used In order to provide the etching selectivity of the silicon nitride layer relative to the dielectric layer under the dielectric layer when the dielectric layer is etched. 3 0 · —A kind of dielectric layer etching process, including at least the following steps: · Provide a semiconductor substrate with a dielectric layer on it; and please read t Book 19 This paper size applies to China National Standards (CNS ) A4 specification (210X297 mm) 479290 A8 B8 C8 D8 VI. Application scope of patent (please read the precautions on the back first \ ^ write this page) Perform a plasma etching to etch part of the dielectric layer, the plasma The etching reaction gas contains at least a phosphorus-fluorine gas, a hydrocarbon-fluorine gas, an oxygen-containing gas, and a carrier gas. The plasma etching pressure is about 20 to 30 millitorr to provide the etching of the dielectric layer. Relative to the etching selectivity of the underlying film layer of the dielectric layer; the above-mentioned greedy oxygen system is one of carbon monoxide and oxygen. 34. If the dielectric layer etching process of item 30 of the patent application scope, wherein the oxygen-containing gas mentioned above uses oxygen, the flow rate is about 1 to 5 s c c m. 32. The dielectric layer etching process according to item 30 of the scope of patent application, wherein when carbon monoxide is used for the above-mentioned oxygen-containing gas, the flow rate is about 5 to 15 sccm. 3 3. The dielectric layer etching process according to item 30 of the scope of patent application, wherein the above-mentioned carrier gas includes at least a passivation gas. 34. The dielectric layer etching process according to item 30 of the patent application, wherein when the above-mentioned carrier gas uses argon, its flow rate is about 250 to 450 sccm. The Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs printed a description of the scope of the application. The shanghai contains as little as the body C group, or the Cheng Yi system etched the layer 6 electric F 3 medium C items and 20 This paper size applies to China National Standards (CNS) A4 (210X297 mm) ) 479290 Α8 Β8 C8 D8 VI. Application for patent scope 3 6 · If the dielectric layer etching process of item 30 of the patent scope is declared, where the above fluorocarbon gas uses C ^ 8, the flow rate is about 15 to 218 or more between. 37. The dielectric layer etching process as described in claim 30 of the patent scope, wherein the above argon-fluorine gas contains at least one of CH2P2 & CHF3 or a combination thereof. 3 8 · If the dielectric layer etching process for item 30 of the scope of patent application, the plasma source energy at the time of the above electricity is about 900 to 12,000 watts 0 39 · If the scope of patent application is The dielectric layer etching process of item 30, in which the bias energy at the time of the above-mentioned plasma surname is printed by the Consumers Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please first Read the note on the back @write this page} 40. If the dielectric layer etching process of the 30th patent scope is applied, the above-mentioned substrate has a transistor structure, and the transistor structure has a self-aligning process. The silicon nitride layer covers the gate electrode. The plasma etching is used to provide the remaining time selection of the material of the nitride nitride layer and the base material of the substrate when the dielectric layer is engraved. 4 1 · If the dielectric layer etching process of item 30 of the patent application scope, wherein the above substrate has a transistor structure, the transistor structure has a silicon nitride paper standard applicable to China National Standards (CNS) A4 size (210X297 mm) 47x9290 A8 B8 C8 D 6. The patent application layer covers the source-drain region, and the plasma etching is used to provide the etching selectivity of the silicon nitride layer relative to the silicon nitride layer below the dielectric layer when the dielectric layer is etched. Printed by the Central Bureau of Standards Consumer Cooperatives 22 This paper is sized for China National Standard (CNS) A4 (210X 297 mm)