TW471041B - Method for forming silicide in removable spacer of semiconductor device - Google Patents

Abstract

A method for forming a silicide in a removable spacer of a semiconductor device comprises: providing a semiconductor substrate; forming a polysilicon layer on the semiconductor substrate; depositing a nitride layer on the polysilicon layer and a top surface of the semiconductor substrate; depositing an oxide layer on the nitride layer; etching back the oxide layer to form a spacer; removing a portion of the nitride layer which is not covered by the spacer; removing the spacer so that the residual nitride layer forms a two-step shape; implanting ions to a specific source/drain region in the semiconductor substrate; performing a first annealing on the specific source/drain region; performing an ion implantation to form a drain region with a specific concentration below the nitride layer; performing a second annealing on the drain region with a specific concentration; and forming a nitride on a top surface of the polysilicon layer and the specific source/drain region.

Description

471041 V. Description of the invention (ο 5-1 Field of the invention: The present invention relates to a method for forming silicide in a semiconductor device with a removable spacer. 5-2 Background of the invention: In the first conventional technique, The method of forming silicide in the semiconductor process is described as follows: g First, as shown in the first A diagram, a semiconductor substrate 111 is provided. Then a polycrystalline silicon layer Π 2 is formed on the semiconductor substrate 111. Then, a photoresist is formed. The layer I 60 is formed on the polycrystalline silicon layer 1 12 as an etching mask. As shown in the first figure B, the polycrystalline silicon layer 1 12 is etched as a gate. As shown in the first figure C, an oxide layer 11 3 is deposited as Oxide stone is on polycrystalline stone layer II 2. As shown in the first D diagram, a nitride layer 1 1 4 is deposited on the oxide layer 1 1 3. As shown in the first E diagram, the nitride layer 1 1 is etched back. 4 to form a partition wall.,

Page 4 471041 V. Description of the invention (2) 1st inside 11 1M as 1 substrate, ion implantation of a source and electrode region 1 1 5 in semiconductor as in the first G diagram, remove nitride layer 1 1 4 . As shown in the first figure, ion implantation is performed to form a high density drain region 11 6 next to the source / impulse region 丨 1 5. As shown in the first figure I, another polycrystalline silicon layer 1 1 7 is deposited next to the oxide layer 1 1 3. As shown in the first figure J, a part of the oxide layer 1 1 3 is removed. A part of the removed oxide layer 113 is located under the gate electrode 112. As shown in the first κ diagram, finally, a silicide (Salicide) U8K # crystalline silicon layer 1 1 2 is formed on the top surface and the source / drain region} 5 on the top surface, and at the same time, the silicide 118 is located on the nitride Beside level U4. In the first 4 to 4 process, the method for forming stone compounds in the semiconductor process is described as follows: Baixian 'Rudi A picture, / 〇., Polycrystalline stone layer 212 on the semiconductor bottom conductor substrate Alas. Then, 2 60 is formed on the polycrystalline silicon layer 2 12 to form a photoresist layer as an etching mask.

Page 5 471041 Five 'Explanation of the invention (3) As shown in the second figure B, the polysilicon layer 2 1 2 is etched as a gate. As shown in the second figure C, an oxide layer 2 1 3 is deposited on the polycrystalline silicon layer 2 1 2. As shown in the second D diagram, a nitride layer 2 1 4 is further deposited on the oxide layer 2 1 3. As shown in the second E diagram, the nitride layer 2 1 4 is etched back to form a spacer. As shown in the second F diagram, a source / drain region 2 1 5 is implanted into the semiconductor substrate 2 1 1. As shown in the second G diagram, a part of the oxide layer 2 1 3 is removed. The removed part of the oxide layer 2 1 3 is located below the interpole 2 1 2. As shown in the second figure, a silicide (Sa 1 ici de) 2 1 6 is formed on the top surface of the polycrystalline silicon layer ', 2 1 2 and the top surface of the source / drain region 2 1 5. At the same time, the silicide 2 1 6 is next to the oxide layer 2 1 3. As shown in the second I diagram, the nitride layer 214 is removed. · As shown in the second figure J, finally, ion implantation to form a high concentration drain region (H igh Density D rain R egi ο η) 2 1 7 beside the source / drain region 2 1 5, at the same time The high-concentration drain region 2 1 7 is located below the oxide layer 2 1 3.

471041 V. Description of the invention (4) The conventional techniques described above, such as the formation of silicide, or the double-gap process of ion implantation through silicide, are quite inconvenient and unsuitable for current manufacturing Process. 5-3 Objects and Summary of the Invention: In view of the above-mentioned backgrounds of the invention, many disadvantages of the traditional cause, the present invention provides a method of using a removable gap to form a semiconductor device. According to the above-mentioned object, the present invention provides a method for forming silicide in a semiconductor device having a removable gap, including the following steps: first, a semiconductor substrate is provided. A polycrystalline silicon layer is formed on the semiconductor substrate. Then, a photoresist layer is formed on the polycrystalline silicon layer as an etching mask. The etched polycrystalline silicon layer is a gate. A nitride layer is deposited on the polycrystalline silicon layer. A photoresist layer is formed on the nitride layer. A portion of the nitride layer is etched, but the remaining nitride layer is still on the surface of the polycrystalline silicon layer. An oxide layer such as a silicon oxide layer is deposited on the nitride layer. Then etch back

471041 V. Description of the invention (5) An oxide layer is etched to form a partition wall. A part of the nitride layer is removed, and the nitride layer is not covered by the spacer. The gap 璧 is removed, so the remaining nitride layer forms a double step shape. The ion implantation is deep to form a deep source / drain region (D e p S 〇 u r c e / Drain Region) in the semiconductor substrate. The ion implantation is performed to form a high-concentration drain region under the nitride layer. The polycrystalline stone layer is used as a mask. Finally, a petrified compound is formed on a top surface of the polycrystalline pierced layer and the deep source / drain region. In order to make the above description and other objects, features and advantages of the present invention more comprehensible, the preferred embodiments are listed below and described in detail with the accompanying drawings. 5-4 Detailed Description of the Invention: The following is a description of the invention. The description of the present invention will first be made with reference to an exemplary structure. Some variations and advantages of the invention will be described later.

Page 8 471041 V. Description of the Invention (6) The preferred method of manufacturing will be discussed later, and it will not limit the generation of thin dielectric layers. Therefore, these components are packaged. In addition, the examples describe the structure or the definition of any change or modification. Although the present invention should, the present invention includes proof that even though it is described, it does not take off, all of which explain the scope of the present invention, and the half of the present invention is clear from the present invention. Each or application is the main conductor element and presents the scope of the disclosed invention by way of example and not by way of example. And some of the better ways are not limited to the shown application for specialization to teach by package 'although it may be possible to limit the consistent examples and include all the benefits of the listed God, but these describe these Examples make the description of the relevant parts. The practicality and a better consistent example. Complete the equivalent within. These modifications and descriptions should be used to implement this method. Therefore, this method of jealousy in a semiconductor device with a removable gap 步骤 includes the following steps: /; as shown in Figure 3A, first provide a semiconductor The substrate is then vapor-deposited by a vehicle to form a polycrystalline silicon layer 12 on the semiconductor substrate η, and then a first photoresist layer 60 is formed on the polycrystalline silicon layer 丨 2. According to Gou Yiying, as shown in the third B picture, by using dry etching, such as plasma etching, the contact layer 12 is used as a gate. The traditional photoetching method is used to remove the first photoresist. 60 471041 V. Description of the invention (7) As shown in Figure 2C, a nitride layer 丄 3 is deposited by traditional chemical hafnium deposition method, such as a fossil evening layer. On the top surface of one of the polycrystalline layer 12 and the semiconductor substrate n. The thickness of the nitrided layer 13 is about 1 to 8 Å. As shown in the third figure D, an oxide layer 14 is deposited by a conventional chemical vapor deposition method, such as silicon nitride on the nitride layer 3. The thickness of the oxide layer 4 is about 8000 to 2500 Angstroms. As shown in the third E: diagram, the oxide layer 14 is etched back by a conventional plasma etching method to form a spacer 14. As shown in the third F diagram, a part of the nitrided layer 13 is removed, and the nitrided layer 13 is not covered by the partition wall 14. Here, a conventional immersion etching method (D i p Etching) is used. The high selection ratio for silicon nitride and silicon oxide is greater than about three. i As shown in the second G picture, the gap 璧 1 4 is removed, and the gap 璧 14 is a removable space 璧 14 (Disposable Spacer). According to the previous step, the removed oxide layer 13 is located on the top surface of the deep source / drain region 15, so the remaining nitride layer 13 forms a double step shape. As shown in the third figure, a deep source / drain region is formed by ion implantation in the semiconductor substrate 1 1. Its implantation parameters are about 1E14 to 5E16 1 / CM3, and

Page 10 471041 V. Description of the invention (8) The depth of the deep source / drain region 15 is about 500 Å to 2000 Angstroms below the surface of the semiconductor substrate. After that, the first tempered deep source / drain region, the tempering temperature is about 100 (TC to 1050 ° C. &Amp; 'As shown in the third figure, a high concentration pump is formed by ion implantation. The electrode region (H 丨 gh Density Drain) 16 is under the nitride layer 13 and is covered by the polycrystalline stone layer 12. The depth of the deep source / drain region 15 is about 10 0 below the surface of the semiconductor substrate. ~ 1 0 0 0 Angstroms, and its implantation parameters are about 5 ^: 13 to 5; 151 / (: ^ 3. After that, the second tempering specific concentration drain region, the tempering temperature is about 900 ° c to 9 5 0 t. As shown in the third J diagram, finally, a silicide 1 is formed on a top surface of the polycrystalline silicon layer i 2 and the deep source / drain region 15. It is made of titanium oxide (TiSi2). In the present invention, it is worth noting that if the ion implantation step is performed after the stone oxide step, a cross-section wrapping (CrOss-conntain) phenomenon will occur. As mentioned above, the structure with removable gaps in the present invention is used for deep sub-micron devices. Therefore, this manufacturing method with removable gaps has the following advantages: 1 · The linear layer of nitride stone can be seen as the same shielding layer (Screen Layer). There is no problem and effect of Oxygen Enhanced Diffusion, while the shallower junction (S ha 1 1 ower J uncti ο η) is low. impedance

471041 5. Invention Description (9) (Lower Resistance) are available. 2. For the formation of chopped compounds or ion implantation through stone compounds, double-spaced plutonium is not required. Therefore, this process with removable gaps is much more convenient and suitable for use in today's industrial processes. The above are merely preferred embodiments of the present invention, and are not intended to limit the scope of patent application for the present invention; all other equivalent changes or modifications made without departing from the spirit disclosed by the present invention shall be included in the following Within the scope of patent application.

Page 471041 The diagram briefly illustrates the first conventional technique of the cross-sectional diagrams of the first A to K diagrams; the second conventional technique of the cross-sectional diagrams of the second A to J diagrams; the third A diagram The cross-section diagrams from the third to the third J are embodiments of the present invention; the representative symbols of the main parts of the present invention are: 11 semiconductor substrate 12 polycrystalline silicon layer 1 3 nitride layer 1 4 oxide layer spacer 15 deep source / Pole region 16 High Density Drain I 7 silicide 6 0 photoresist layer 111 semiconductor substrate 2 polycrystalline silicon layer II 3 oxide layer 114 nitride layer 11 5 source / drain region 11 6 high High Density Drain Region 1 1 7 polycrystalline silicon layer 1 1 8 silicide 1 6 0 photoresist layer

Page 13 471041 Brief description of the diagram 211 Semiconductor substrate 2 12 Polycrystalline silicon layer 2 1 3 Oxide layer 2 14 Nitride layer 2 1 5 Source / drain region 2 1 6 S a 1 pesticide 217 High concentration Drain Region (High Density Drain Region) 2 6 0

Page 14

Claims (1)

471041 VI. Scope of patent application 1. A method for forming silicide in a semiconductor device having a removable gap, at least comprising: providing a semiconductor substrate having a gate electrode on the semiconductor substrate; depositing a first dielectric An electrical layer on the top surface of one of the gate electrode and the semiconductor substrate; depositing a second dielectric layer on the first dielectric layer; etching back the second dielectric layer to form a gap wall; a removed portion Part of the first dielectric layer, the first dielectric layer is not covered by the gap wall; removing the gap; 4 ion implantation of a specific source / drain region in the semiconductor substrate; ion implantation To form a specific-concentration drain region under the first dielectric layer by a mask of the gate; and forming a silicide on a top surface of the gate and the specific source / > and Polar area. 2. The method according to item 1 of the patent application, wherein the first dielectric layer includes at least a silicon nitride layer. 3. The method according to item 1 of the patent application range, wherein the # thickness of the first dielectric layer is about 100 to 800 angstroms. 4. The method according to item 1 of the patent application, wherein the second dielectric layer includes at least a silicon nitride layer. Page 15 471041 6. Scope of patent application 5. The method of the first scope of patent application, wherein the thickness of the above-mentioned second dielectric layer is about 80 to 250 angstroms. 6. The method according to item 1 of the patent application range, wherein the thickness of the drain region of the specific concentration is about 100 to 100 Angstroms. 7. The method according to item 1 of the patent application, wherein the second dielectric layer includes at least a silicon nitride layer. 8. A method for forming silicide in a semiconductor device having a removable gap, at least comprising: providing a semiconductor substrate having a gate electrode on the semiconductor substrate; depositing a nitride layer on the gate electrode and An oxide layer is deposited on the nitride layer on the top surface of one of the semiconductor substrates; the oxide layer is engraved to form a spacer; a portion of the nitride layer is removed, and the nitride layer is not The gap is covered to remove the gap;-ion implantation of a specific source / drain region in the semiconductor substrate; ion implantation to form a specific concentration of drain region under the nitride layer by the gate A polar mask; and forming a silicide on a top surface of the gate and the specific source Page 16 471041 6. Scope of patent application / Wuji area. 9. The method according to item 8 of the patent application, wherein the thickness of the nitrided layer is about 100 to 800 angstroms. 10. The method according to item 8 of the scope of patent application, wherein the nitrided layer includes at least a silicon nitride layer. 1 1. The method according to item 8 of the scope of patent application, wherein the thickness of the above-mentioned specific source / drain is about 5 0 to 2 0 0 Angstroms. 12. The method according to item 8 of the scope of patent application, wherein the thickness of the drain region of the specific concentration is about 100 to 100 angstroms. 1 3. The method according to item 8 of the patent application, wherein the silicide layer comprises at least titanium silicide. 1 4. A method for forming a silicide in a semiconductor device having a removable gap, at least comprising: providing a semiconductor substrate; forming a polycrystalline silicon layer on the semiconductor substrate; lithography to etch the polycrystalline silicon layer as a A gate electrode; depositing a silicon nitride layer on a top surface of the polycrystalline silicon layer and the semiconductor substrate; Page 17 471041 Sixth, the scope of the patent application should be covered between the cover-like wall gaps; layers •, wall breaks, interstitial interlayer nitrogen and silicon should be formed, and the gas layer should be silicon on the layered layer, silicon nitrogen, silicide, and oxygenated oxygen of the parts of a ΪΠΊ β- a Hai Pou product erosion sink moved back ladder bis - layer of air that the residue left as it bi interstitial the other shift electrode source given special one into the implant sub 0 pole electrode and and the inner timber bottom forming The body guide should be layered nitrogen in the region area. It should be extremely concentrated in the region area. The polar source must be in a special shape. It should be planted by fire and replanted in a sub-division. The area mask pole curtain is once concentrated. The layered silicon special crystal should be multi-layered, and the second system should be in the shape of the bottom / > polar source Dingtehai--the layer and the top surface of the top surface of the top layer of the multi-layered polycrystalline silicon = ° in the physical sand area 1 5. For example, the method of claim 14 in the patent application range, wherein the thickness of the silicon nitride layer is about 100 to 800 angstroms. 16. The method according to item 14 of the scope of patent application, wherein the thickness of the specific source / non-electrode is about 5 0 to 2 0 0 Angstroms. 17. The method according to item 14 of the scope of patent application, wherein the temperature of the first tempering is about 100 ° C to 105 ° C. 1 8. The method according to item 14 of the scope of patent application, wherein the specific concentration mentioned above is not Page 18 471041 6. Scope of patent application The thickness of the polar region is about 100 to 100 Angstroms. 19. The method according to item 14 of the scope of patent application, wherein the temperature of the second tempering is about 9 0 (TC to 95 ° C. 2 0. The method according to item 14 of the scope of patent application, wherein the above The silicide layer contains at least titanium silicide. Page 19