TW468334B - Paging message display - Google Patents

Paging message display Download PDF

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Publication number
TW468334B
TW468334B TW89110161A TW89110161A TW468334B TW 468334 B TW468334 B TW 468334B TW 89110161 A TW89110161 A TW 89110161A TW 89110161 A TW89110161 A TW 89110161A TW 468334 B TW468334 B TW 468334B
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TW
Taiwan
Prior art keywords
display
circuit
paging
microprocessor
data
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TW89110161A
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Chinese (zh)
Inventor
Sheng-Fa Jang
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Chesen Electronics Corp
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Priority to TW89110161A priority Critical patent/TW468334B/en
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Publication of TW468334B publication Critical patent/TW468334B/en

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Abstract

The invention provides a paging message display, which is controlled by microprocessor and can use ordinary television display. The television is used to replace the display screen of pager and the message display of microprocessor is used to effectively expand the operation range of paging message. The message amount application scope of paging transmission system are expanded so that pager can be extended to act as home communication device for more data transmission, such as stock market information, news, public message, advertisement and other paging applications requiring lots of computations and message storage from just paging personal message, simple data and personal communication device, thus conveniently increasing more information sources for each family and being significantly useful.

Description

8 33 4 五、發明說明(1) 《發明背景》 本發明係為 以攜帶 ,且一 ,因此 滿足消 的》 於此, 不斷的 在提供 且可利 螢幕, 範圍, 傳呼機 可以傳 聞、公 呼應用 上述功 深具實 一種傳呼訊息的 式為主,其傳呼 般攜帶式傳呼器 限制了傳呼器的 費者在使用上的 顯示裝置,目前現有的傳 的sfl息是以數字和文字顯 體積小’故其顯示訊息以 訊息容量和應用範圍,常 需求,缺乏實用性。 本案發 思慮研 一種傳 用通用 又藉由 更加擴 由傳呼 遞更多 共訊息 ,係在 能,且 用性功 呼器主要 示的方式 小塑為主 造成無法 《發明目 有鑑 經驗、及 之目的乃 器控制’ 機的顯示 訊息使用 頜城’使 機擴大到 行情、新 訊息的傳 即V完成 息來源, 明人乃以 究,終使 呼訊息的 電視機顯 微處理器 大了傳呼 個人訊息 資訊之家 、廣告及 通用之電 為每一個 能。 其本身從 本發明得 顯示裝置 示,以該 顯示訊息 發射系統 、簡單資 庭通訊機 其它需要 視機上增 家庭方便 事相關行 以誕生, ,其係由 電視機取 ,有效擴 的訊息量 訊及從個 之功用, 大量運算 加本發明 地增加更 業多年 其首要 微處理 代傳呼 充傳呼 和應用 人通訊 如股市 和儲存 裝置, 多的訊8 33 4 V. Description of the invention (1) "Background of the invention" The present invention is to carry, and one, and therefore satisfy the consumer "Here, the screen is continuously provided and profitable, and the pager can be heard and called. The application of the above-mentioned functions is mainly based on a type of paging message. The paging-like portable paging device limits the display device used by the user of the paging device. At present, the existing sfl information is displayed in small numbers and text. 'So it displays messages with message capacity and application range, which are often required and lack practicality. This case considers researching a general purpose and more extensive paging to deliver more common information. It is tied to the energy, and the main way of using the sexual power pager is to make it impossible. The purpose is to control the display of the machine using the Jaw City to expand the machine to the market, and the transmission of new information is to complete the source of the information. Personal information information home, advertising and general electricity for each can. It itself shows from the display device of the present invention. With the display information transmission system, simple information communication device and other things that need to be added to the family for convenience, it is taken by a television, which effectively expands the message volume information. And for its own functions, a large number of calculations plus the present invention adds many years of its primary micro-processing, paging, paging, and application of human communications such as the stock market and storage devices.

<33 4< 33 4

五、發明說明(2) 圖號說明 1 · •殼體 2 · •印刷電路板 3 · •電源並聯 4 · •顯示燈 5 . *局頻接收電路R F 6 · .解碼接收微處理器U2 7 · .主微處理器U1 8 · 可寫數據儲存器U3 9 . •專用遙控器 10 · •電視機 11 · •顯示資料儲存器U 6 12 · 資料儲存器U4、U5 13 · •程序儲存器U7 14 · 天線T 15 · •視頻 16 · •音頻 VI · •穩壓電路一 V2 · •穩壓電路二 V3 · *穩壓電路三 T1 · •電晶體一 R3 · 電阻三 R4 · •電阻四 R5 *電阻五 33 4V. Description of the invention (2) Drawing number description 1 • • Housing 2 • • Printed circuit board 3 • • Power supply in parallel 4 • • Display lamp 5 * Office frequency receiving circuit RF 6 ·. Decoding receiving microprocessor U2 7 · . Main microprocessor U1 8 · Writable data storage U3 9. · Dedicated remote control 10 · • TV 11 · • Display data storage U 6 12 · Data storage U4, U5 13 · • Program storage U7 14 · Antenna T 15 · • Video 16 · • Audio VI · • Voltage stabilizer one V2 · • Voltage stabilizer two V3 · * Voltage stabilizer three T1 · • Transistor one R3 · Resistance three R4 · • Resistance four R5 * Resistance Fri 33 4

五、發明說明(3) FSK _ •頻移鍵控 R13 · •電阻十三 T2 · •電晶體二 RFDI ••接腳端 U2 •解碼接收微處 Y2 · •石英振盪器 C11 · •電容十一 C12 · •電容十二 C14 · •電容十四 S1 · •開關 C15 •電容十五 R1 .電阻一 R2 · .電阻二 Y1 * •石英振盪器一 C1 · .電容一 C2 · .電容二 C3 · •電容三 C4 · •電容四 R7 · .電阻七 R8 * •電阻八 RF · •南頻接收電路 R11 · •電阻十一 U1 · .主微處理器 U8 · *編瑪器 五、發明說明(4) L4 · ·發射顯示燈 丁3 * .電晶體三 R32. 電阻三十二 L3 · ·紅外線發射管 52 · · (0-9)V. Description of the invention (3) FSK _ • Frequency shift keying R13 · • Resistor thirteen T2 • • Transistor two RFDI • • Pin U2 • Decoding receiving micro Y2 • • Quartz oscillator C11 • • Capacitor eleven C12 · • capacitor twelve C14 · • capacitor fourteen S1 · • switch C15 • capacitor fifteen R1. Resistor one R2 ·. Resistor two Y1 * • quartz oscillator one C1 ·. Capacitor one C2 ·. Capacitor two C3 · • Capacitor three C4 · • Capacitor four R7 ·. Resistor seven R8 * • Resistor eight RF · • South frequency receiving circuit R11 · • Resistor eleven U1 ·. Main microprocessor U8 · * Compiler V. Description of the invention (4) L4 · · Emission display lamp D 3 *. Transistor three R32. Resistor thirty two L3 · · Infrared emitting tube 52 · (0-9)

53 · · PGUP53 · PGUP

54 · · PGDW 55 · •上 56 · ·下 57 · •左 58 · * 右54 · · PGDW 55 · • Up 56 · · Down 57 · • Left 58 · * Right

59 —— ESC59-ESC

60 · · ENT60 · · ENT

61 · · IX U7 ·.程序儲存器 U4 · ·資料儲存器 U5 .·.資料儲存器 U 6 . ·顯示資料儲存器 U3 · ·可寫數據儲存器 EXTD · *接腳端 EEDO · ·接腳端 IRDI · ·接腳端 70 · •解碼接收微處理器U2發出重置 71 _·内部DECODE (傳呼解碼電路),I/O (輸入/輸出)61 · · IX U7 · · Program memory U4 · · Data memory U5 · · Data memory U 6 · · Display data memory U3 · · Writable data memory EXTD · * Pin end EEDO · · Pin End IRDI · · Pin end 70 · • Decoding receiving microprocessor U2 issues reset 71 _ · Internal DECODE (paging decoding circuit), I / O (input / output)

第7頁 /^88 33 4 五、發明說明(5) 通訊等初始化 72 主 微 處 理 器 U1 是 否 有 作 通 訊 i·立 求 73 傳 啤 或 遙 控 是 否 中 斷 74 接 收 傳 呼 資 料 數 據 及 遙 控 解 碼 暫 存 75 是 否 有 數 據 通 訊 76 向 主 微 處 理 器 U1 送按 鍵 及 時 間 等 資 料 數 據 77 主 微 處 理 器 U1 發 出 重 置 78 DRAM ( 動 態 記 憶 體 ) 、 顯 示 、 通 訊 等 初 始化 79 向 解 碼 接 收 微 處 理 器 U2 通 訊 5月 求 80 是 否 有 數 據 輸 入 81 接 收 數 據 82 根 據 接 收 到 的 數 據 進 行 儲 存 Λ 運 算 更 新顯示等處 理 83 NO 84 YES 圖示說 明 第一 -圖 係 本 發 明 之 結 構 示 意 圖 〇 第: l圖 係 本 發 明 之 原 理 方 塊 圖 0 第三 :圖 係 本發 明 之 系 統 流 程 圖 0 第β ?圖 係 本 發 明 之 高 頻 接 收 和 解 碼 器 電 路 圖 〇 第五圖 係 本 發 明 之 電 源 電 路 圖 0 第六圖 係 本發 明 之 控 制 顯 示 部 份 電 路 圖 〇 第七圖 係 本 發 明 解 碼 器 專 用 遙 控 器 之 電 路 圖 〇 第八圖 係 本 發 明 解 瑪 器 專 用 遙 控 器 之 面 板 圖 ΰPage 7 / ^ 88 33 4 V. Description of the invention (5) Initialization of communication, etc. 72 Is the main microprocessor U1 communicating? Does it require communication? 73 Is beer or remote control interrupted? 74 Receives paging data and remote decoding temporarily. 75 Whether there is data communication 76 Send key data and time and other data to main microprocessor U1 77 Reset of main microprocessor U1 78 Initialization of DRAM (Dynamic Memory), display, communication, etc. 79 Receive decode U2 communication to decoder 5 Monthly request 80 Whether there is data input 81 Receiving data 82 Storage based on the received data Λ Computational update display 83 NO 84 YES Graphical illustrations First-picture is a schematic diagram of the structure of the invention Principle block diagram 0 Third: The diagram is the system flow of the present invention 0 Figure β is the high-frequency receiver and decoder circuit diagram of the present invention. Fifth figure is the power circuit diagram of the present invention. 0 Sixth diagram is the control display circuit diagram of the present invention. Seventh diagram is the dedicated remote control for the decoder of the present invention. Circuit diagram of the controller. The eighth diagram is a panel diagram of the remote controller for the demagnetizer of the present invention.

334 五、發明說明(6) 如圖一所示,本發明之傳呼訊息顯示裝置係有一毂 1 ’且該殼體之内部設有一印刷電路板2,X該印刷體 板2上之電路包含有高頻接收電路、解碼器電路、電源 ,及控制顯示部份電路等(如圖四、圖五及圖六所示之入 部電路),另該殼體丨之正面設有電源並聯3及顯示燈王4 ^ 如圖二所示,其係由高頻接收電路RF 5連接解碼器, 4解,器連接顯示器,且該解碼接收微處理器^ 2 6内含微 處理器,並受控於與該解碼接收微處理器U2 6連接之可耷 數據儲存器U3 8 (EEPROM (電子式可拭除可程式化唯讀記 憶體),本發明之實施例使用的是93LC46集成電路)及專 ,遙控器9 ;該顯示器係由主微處理器w ( Mcu (單晶片 微電腦),本發明的實施例使用的是GS2 0 0 0集成電路)控 制的通用電視機1 〇,另該主微處理器U丨7接有用作唯讀^ 存之程序儲存器U7 13 ( ROM (唯讀記憶體),本發明的 實施例使用的是27080電路)、資料儲存器U4、U5 12 (本 發明的實施例使用的是4404集成電路)及顯示資料儲存器 U6 11 (本發明的實施例使用的是4426〇集成電路),其;系 由傳呼發射機發出的傳呼訊號經天線7 1 4進入高頻接&電 路RF 5傳至解碼接收微處理器⑽6解碼,經解碼後之傳吟 訊號進入主微處理器U1 7,且該主微處理器ui之主微處理 器在程序儲存器U7 1 3的程序控制下,經一系列的處理, 轉換成相應之視頻1 5和音頻1 6訊號’又該視頻1 5訊號係由 第9頁 468334334 V. Description of the invention (6) As shown in FIG. 1, the paging information display device of the present invention has a hub 1 'and a printed circuit board 2 is arranged inside the casing, and the circuit on the printed board 2 includes High-frequency receiving circuit, decoder circuit, power supply, and control display circuit (such as the input circuit shown in Figure 4, Figure 5, and Figure 6), and the front side of the casing 丨 is equipped with a power supply parallel 3 and display lights King 4 ^ As shown in Figure 2, it is connected to a decoder by a high-frequency receiving circuit RF 5 and a 4 decoder connected to a display, and the decoding receiving microprocessor ^ 2 6 contains a microprocessor and is controlled by and The decodeable data storage unit U3 8 (EEPROM (electronic erasable and programmable read-only memory) connected to the decoding receiving microprocessor U2 6 and the embodiment of the present invention uses a 93LC46 integrated circuit) and a remote control 9; the display is a general-purpose television set 10 controlled by a main microprocessor w (Mcu (single chip microcomputer), an embodiment of the present invention uses a GS2000 integrated circuit), and the main microprocessor U丨 7 is connected with program memory U7 for read-only ^ storage (ROM (only Memory), the embodiment of the present invention uses the 27080 circuit), the data storage U4, U5 12 (the embodiment of the present invention uses the 4404 integrated circuit) and the display data storage U6 11 (the embodiment of the present invention uses Is 4426〇 integrated circuit), which is the paging signal sent by the paging transmitter via the antenna 7 1 4 into the high-frequency connection & circuit RF 5 to the decoding receiving microprocessor ⑽ 6 decoding, the decoded groin signal Enter the main microprocessor U1 7 and the main microprocessor of the main microprocessor ui is converted into the corresponding video 15 and audio 16 signals by a series of processing under the program control of the program memory U7 1 3 'And this video 1 5 signal is from page 9 468334

主微處理器U1 7的VIDEO (視頻輸出端)經阻抗變換電路 (如圖六所示,係由電晶體—T1及電阻三⑸、電阻四R4 電阻五R5所組合成)連接至外接電視機1〇的視頻輸入端, 另該音頻16訊號由主微處理器w的AIDE〇 (音頻輸出端 連接至外接電視機的音頻輸入端,並以聲音、文字、圖妒 、及影像的方式,在電視機上顯示;本發明控制電路中, 與該主微處理器u 1 7總線連接的資料儲存器u5 i 2為 兩個2-8Mbit (位元)的動態儲存器(DRAM)用於訊自資 料的存放,且該程序儲存器ϋ7 13為卜4MbU (位元)^ 讀儲存器(ROM)用於存放程序、顯示圖位元、字庫和控制 程序; 如圖五所示,本發明之系統電源可以是使用交流式電 壓降、整流或蓄電池,且經由穩壓電路一 v丨穩壓後,再铿 穩壓電路二V2和穩壓電路三V3穩壓,提供丨.5V、3v、和 5V直流電壓,又該交流電壓降和整流部份可以設在盒 表的内部’也可設置在盒體溫表的外部; 如圖四所不,該高頻接收電路RF為傳輸機通用電路, 為苻合規範且經授權的頻段和電氣規則的接收電路,且 從頻移鍵控FSK端經由電晶體:T2及電阻十三R1 3組成的放 大電路放大後,從接腳端RFDI進人解碼接收微處理器u2, =解碼接收微處理謂之外部接有由石英振盪器二^、 1十-Cl 1及電容十二C12所組成的石英振盪電路和由電 2 -R11、電容十四C14、電容十五Π5及開關S1組成的 重置電路;本發明之高頻接收及解碼電路,係接收傳呼發The VIDEO (video output terminal) of the main microprocessor U1 7 is connected to an external TV via an impedance conversion circuit (as shown in Figure 6, composed of a transistor T1 and a resistor R3, a resistor R4 and a resistor R5). 1 video input terminal, and the audio 16 signal from the main microprocessor w AIDE (the audio output terminal is connected to the audio input terminal of the external TV, and in the form of sound, text, graphics, and video, Displayed on a television; in the control circuit of the present invention, the data storage u5 i 2 connected to the main microprocessor u 1 7 bus is two 2-8 Mbit (bit) dynamic storage (DRAM) used for communication Data storage, and the program storage ϋ 7 13 is 4MbU (bit) ^ read storage (ROM) is used to store programs, display graphics bits, fonts and control programs; as shown in Figure 5, the system of the present invention The power supply can use AC voltage drop, rectification or battery, and after the voltage is stabilized by a voltage regulator circuit, the voltage regulator circuit is V2 and the voltage regulator circuit is V3. It provides 5V, 3V, and 5V. DC voltage, and the AC voltage drop and rectification part can be set in the box The inside of the meter can also be set outside the box thermometer; as shown in Figure 4, the high-frequency receiving circuit RF is a universal circuit of the transmitter, which is a receiving circuit that conforms to standard and authorized frequency bands and electrical rules. The frequency-shift keying FSK terminal is amplified by an amplifier circuit composed of a transistor: T2 and a resistor thirteen R1 3, and then enters into the decoding and receiving microprocessor u2 from the RFDI pin. Quartz oscillator circuit composed of oscillator 2 ^, 10-Cl 1 and capacitor twelve C12 and reset circuit composed of electric 2-R11, capacitor fourteen C14, capacitor fifteen Π5, and switch S1; Frequency receiving and decoding circuit

第10頁 4 6 8 33 4 五、發明說明(8) ' *" 射機發射之高頻訊號,經天線T “接收至高頻放大及渡波 以取出調制訊號,且經該接腳端叮^送至解碼接收微處理 器U2解碼,另配合圖六所# ’又該解碼接收微處理器U2為 解碼電路的核心,其内含—傳呼解碼電路(dec〇de),且 將該傳呼訊號在解碼接收微處理器U2中解碼後暫存下來, 當主微處理器U1有通訊請求時,經DAT A (資料線)送至主 微處理器U1與解碼接收微處理器U2相連的可寫數據儲存器 U3預先設定其内部數據,該可寫數據儲存器U3經初始化時 ,其外部數據由接腳端EXTD進入解碼接收微處理器…,且 該解碼接收微處理器U2接收到後,再將其送到可寫數據儲 存器U3,又該解碼接收微處理器U2重置初始化時,會通過 接腳端EEDO,以讀取可寫數據儲存器旧中的數據,進而設 定其内部傳呼解碼電路(DECODE)的地址、RF (高頻接收 電路)板的頻率、串列傳輸速率及工作方式等;另該解碼 接收微處理器U2與主微處理器m之間的通訊線有:ASK ( 主微處理器ui的通訊請求訊號)、C/D (為說明串列MTA (串列數據訊號)線上為命令還是數據)、enable (解碼 接收微處理器U2允許讀訊號)及DATA (為串列數據訊號) ’同時該專用遙控器之發射按鍵訊號,也由接腳端11?1)1送 至解碼接收微處理器U2進行解碼後,係當主微處理器w有 通訊訊號時’送至該主微處理器U1,以產生用戶對本裝置 的操作控制; 如圖六所示,所述之主微處理器U丨的外部接有由電阻 一 ΪΠ、電阻二R2、石英振盪器一 Y1及電容—d、電容二以Page 10 4 6 8 33 4 V. Description of the invention (8) '* " The high-frequency signal transmitted by the transmitter is received by the antenna T "to receive high-frequency amplification and crossing waves to take out the modulated signal, and the signal is transmitted through this pin. ^ Send it to the decoding and receiving microprocessor U2 to decode, and cooperate with Figure 6 # 'The decoding and receiving microprocessor U2 is the core of the decoding circuit, which contains-paging decoding circuit (dec〇de), and the paging signal It is temporarily stored after decoding in the decoding receiving microprocessor U2. When the main microprocessor U1 has a communication request, it is sent to the main microprocessor U1 and connected to the decoding receiving microprocessor U2 via DAT A (data line). The data storage U3 sets its internal data in advance. When the writable data storage U3 is initialized, its external data enters the decoding receiving microprocessor from the pin EXTD ... and the decoding receiving microprocessor U2 receives it, and then When it is sent to the writable data storage U3, and the decoding and receiving microprocessor U2 is reset and initialized, it will read the old data in the writable data storage through the pin EEDO, and then set its internal paging decoding. Address of circuit (DECODE), RF ( Frequency receiving circuit) board frequency, serial transmission rate and working mode, etc. In addition, the communication lines between the decoding receiving microprocessor U2 and the main microprocessor m are: ASK (communication request signal of the main microprocessor ui) , C / D (in order to explain whether the serial MTA (serial data signal) is a command or data), enable (decoding and receiving microprocessor U2 allows reading signals) and DATA (for serial data signals) The transmitting key signal is also sent from the pin terminal 11 to 1) 1 to the decoding and receiving microprocessor U2 for decoding. When the main microprocessor w has a communication signal, it is sent to the main microprocessor U1 to generate The user controls the operation of this device. As shown in Figure 6, the main microprocessor U 丨 is externally connected by a resistor 1ΪΠ, a resistor R2, a quartz oscillator Y1, and a capacitor-d, a capacitor two and

4 6 8 33 4 五、發明說明(9) 所組成之石英振盪電路和由電容三C3、電容四以及電阻七 R7、電阻八R8所組成之重置電路;該主微處理器μ為本裝 置控制處理電路的核心’且在資料的記憶管理、運算以及 顯示控制均由主微處理器U1完成,另,外部數據在程序儲 存器U7的控制下,由DATA (資料線)進入主微處理器^後 ,若為資料數據,會將其儲存到資料儲存器U4和資料儲存 器U5中,若為按鍵數據,則會完成相應的操作,同時根據 送入之情況,更新顯示資料儲存器㈣中之顯示數據及進行 發聲處理’另該主微處理器U1的内部具有視頻和音頻輸出 端’可以直接接至NTSC (國家電視系統)系統電視機,將 且處理後的數據再由該VIDEO (視頻輸出端)和a IDEO (音 頻輸出端)將視頻訊號和音頻訊號送到電視機,更新晝面 及發聲; ^ 如圖四、圖六所示’圖中各集成電路之連接,除相互 間的命令控制線外’其他相應的位址線和數據線均按標準 總線連接’且使用網路標號標明上述總線的連接關係; 如圖七和圖八所示’本發明之專用遙控器,其係由含 微處理器之編碼器U8 (本發明採用CS3299集成電路)及由 電晶體三T3、電阻三十二R32和紅外線發射管L3組成之紅 外線發射點、且還有四行五列之組合按鍵開關組(包括有 (0-9)52、上 55、下 56、左 57、右 58、PGUP 53 (上頁) 、PGDW 54 (下頁)、ESC 59 (結束)、ENT 60 (輸入)及 1 X 6 1)及發射顯示燈L4所共同組合而成,該組合按鍵開關 組之不同開關’係提供了不同編媽訊息載波,並在紅外線4 6 8 33 4 V. Description of the invention (9) The quartz oscillation circuit and reset circuit composed of capacitor three C3, capacitor four, resistor seven R7 and resistor eight R8; the main microprocessor μ is the device The core of the control processing circuit is also completed by the main microprocessor U1 in the memory management, calculation and display control of the data. In addition, the external data enters the main microprocessor from the DATA (data line) under the control of the program memory U7. ^ After that, if it is data, it will be stored in data storage U4 and data storage U5. If it is key data, the corresponding operation will be completed, and the display data storage will be updated in accordance with the input situation. The display data and sound processing 'other than the main microprocessor U1 has video and audio output terminals' can be directly connected to the NTSC (National Television System) system television, and the processed data is then provided by the VIDEO (video Output terminal) and a IDEO (audio output terminal) send video signals and audio signals to the TV to update the daytime and sound; ^ as shown in Figures 4 and 6 'the connections of the integrated circuits in the figure, In addition to the mutual command and control lines, 'the other corresponding address lines and data lines are connected according to a standard bus' and the network connection is used to indicate the connection relationship of the above buses; as shown in Figs. It consists of an encoder U8 containing a microprocessor (the present invention uses the CS3299 integrated circuit) and an infrared emission point composed of a transistor T3, a resistor 32 R32, and an infrared emitting tube L3, and there are four rows and five columns. (0-9) 52, up 55, down 56, left 57, right 58, PGUP 53 (previous page), PGDW 54 (next page), ESC 59 (end), ENT 60 ( Input) and 1 X 6 1) and the emission display lamp L4 are combined together, and the different switches of the combined key switch group are provided with different coded message carriers, and are in the infrared

第12頁 4 6 8 3 3 4Page 12 4 6 8 3 3 4

上發射出按鍵訊號,另配合 存器U3 8中不同的數據,以 訊息;另解碼接收微處理器 理器U2 6在其内部程序的控 8中的數據,根據從該可寫 不同’而完成對該解碼接收 電路(DECODE)等不同初始 設定選擇、刪除等各項操作 為電源,且為了省電,該遙 當按鍵按下時,可寫數據儲 態’且掃描所按下為何鍵進 由電晶體三T 3放大後,由紅 發出; 圖二所示,以選擇可寫數據儲 向主微處理器ΙΠ 7提供所須的 U2 6重置後,該解碼接收微處 制下,讀取可寫數據儲存器卟 數據儲存器U3 8中讀取數據之 微處理U 2 6内部之傳呼解媽 化,使該專用遙控器完成用戶 功能;該遙控器可使用電池作 控器平常時是處於睡眠狀態, 存器U3會自動喚醒進入工作狀 行編碼,經編碼載波後的訊號 外線發射管L 3,以紅外線訊號 如圖二所不’係將設計好的程序各自固化在解碼接收 微處理器U2的内部ROM (嗔讀記憶體)中(解碼接收微處 理器U2含内部ROM (唯讀記憶體))和程序儲存器叮中之解 碼接收微處理器U2程序掩臈固化在其的内部r〇m (唯说纪 取可寫數據儲存器U3只記憶-些控制數ϊ; 其具體步驟是: 首先由解碼接收微處理器U2發出重置7〇,進行系統初 始化,且由主微處理器U1完成其内部DEC〇DE (傳呼解碼電 路)’I/O (輪入/輸出)通訊等初始化71工作,該解碼接A key signal is transmitted on the board, and the data in the memory U3 8 is used to decode the data. The data received in the controller 8 of the internal processor U2 6 is decoded and received. The operations of selecting and deleting different initial settings, such as the decoding receiving circuit (DECODE), are power supply, and in order to save power, when the button is pressed, the data can be written and stored. Transistor three T 3 is amplified by red, as shown in Figure 2. As shown in Figure 2, to select the writable data store to provide the required U2 6 to the main microprocessor III 7 after reset, the decoding receiving micro processing, read The writable data storage unit is the micro-processing of the read data in the data storage unit U3 8. The internal paging of U 2 6 is decomposed, so that the special remote control can complete the user function. The remote control can use the battery as the controller. In the sleep state, the memory U3 will automatically wake up and enter the working status code. The signal of the external transmission tube L 3 after the encoded carrier wave, and the infrared signal as shown in Figure 2 are used to fix the designed programs in the decoding receiving microprocessor. U2 Internal ROM (reading memory) (decoding receiving microprocessor U2 with internal ROM (read-only memory)) and the decoding receiving microprocessor U2 in the program memory, the program mask is solidified in its internal ROM. (It is said that the recordable writable data storage U3 only stores some control data. The specific steps are: First, the decoding and receiving microprocessor U2 issues a reset 70, and the system initialization is performed by the main microprocessor U1. Its internal DEC〇DE (paging decoding circuit) 'I / O (round-in / output) communication and other initialization 71 work, the decoding interface

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五、發明說明(11) 收微處理器ϋ2根據讀取可寫 其内部RAM (動態儲存器)、 I/O (輸入/輸出)通訊及高 成後,該主微處理器U1會不 U 2讀取按鍵資料和時間數據 請求72,如結果為NO 83 求,直到有通訊請求為止, 續進行是否有數據通訊75, 不斷進行通訊請求,直到有 84 (是),則向主微處理器 ,又在内部DECODE (傳呼解 通訊等初始化7 1的同時,且 斷,如結果為NO 83 (否) 遙控是否中斷73,直到有傳 YES 84 (是),則接收傳呼 動作,且進行向主微處理器 ;另由主微處理器IJ1發出重 完成其内部dram (動態記憶 工作,且向解碼接.收微處理 數據輸入80,結果為NO 83 數據輸入8 0的動作,直到有 84 (是),則接收數據81, 、運算、更新顯示等處理82 理器U2通訊請求79的動作D 數據儲存器U3中的設定,完成 DECODE (傳呼解碼電路)及該 頻接收板R F初始化,初始化完 斷的去請求解碼接收微處理器 ’如主微處理器U1是否有作通 (否)則繼續不斷進行通訊請 如結果為YES 84 (是)’則繼 如結果為NO 83 (否)則繼續 通訊請求為止,如結果為YES ui送按鍵及時間等資料數據76 碼電路)’I/O (輸入/輸出) 作傳呼或遙控是否中斷73之判 ’則繼續不斷進行判斷傳呼或 呼或遙控中斷為止,如結果為 資料數據及遙控解碼暫存7 4的 U1送按鍵及時間等資料數據76 置7 7 ’進行系統初始化,進而 體)、顯示、通訊等初始化7 8 器U 2通訊請求7 9,判斷是否有 (否)則繼續進行判斷是否有 數據輸入為止,如結果為γ E § 且根據接收到的數據進行儲存 後’繼續進行向解碼接收微處V. Description of the invention (11) The receiving microprocessor ϋ 2 reads and writes its internal RAM (Dynamic Memory), I / O (input / output) communication, and after completion, the main microprocessor U1 will not be U 2 Read key data and time data request 72. If the result is NO 83, until there is a communication request, continue to have data communication 75, and continue to make communication requests until 84 (yes), then send it to the main microprocessor, When the internal DECODE (paging, de-communication, etc.) is initialized at 7 1 and is interrupted, if the result is NO 83 (No) whether the remote control is interrupted 73 until there is a YES 84 (YES), then the paging action is received and the main micro The processor; another main microprocessor IJ1 sends out and completes its internal ram (dynamic memory work, and connects to the decoder. Micro-processing data input 80, the result is NO 83 data input 8 0 action, until there is 84 (yes) , Then receive data 81, operations, calculations, update display and other processing 82 actions of the processor U2 communication request 79 D settings in the data storage U3, complete the DECODE (paging decoding circuit) and RF initialization of the receiving board of the frequency, initialization is complete To ask for a solution Receiving microprocessor 'If the main microprocessor U1 works (No), continue to communicate continuously. If the result is YES 84 (Yes)', then if the result is NO 83 (No), continue the communication request until The result is YES ui send 76 key code data such as key and time circuit) 'I / O (input / output) to judge whether the paging or remote control is interrupted 73' will continue to determine whether the paging or paging or remote control is interrupted, if the result is Data data and remote control decoding temporarily store data data such as U1 to send keys and time 76 4 Set 7 7 'to initialize the system, and then initialize) display, communication, etc. 7 8 U 2 communication request 7 9 to determine whether ( No) then continue to determine whether there is data input, if the result is γ E § and after storing according to the received data, 'continue to the decoding reception

第14頁 4 6 8 33 4 五、發明說明(12) 為使本發明更加顯現出其進步性與實用性,兹將其優 點列舉如下: 咕v ^ 卜具接收分析之功能’係可將資訊訊说經解碼後 儲存、運算、顯示及有效擴充發射系統的使用範圍。本 2、 可用作傳遞股苹資訊之内容’如股市大盤、各股即時 資訊及股價,係提供股票族一便利性功能。 3、 使用了微處理器’ •大了傳呼發射系統的訊息量和應 用領域。 4、 具新聞、公共訊息及廣告之指γ Α m c 〜1寻呼應用功能。 5、 具實用性。 6、 具工商界及產業界上利用^賈 綜上所述’本發明誠已符八 依法提出申請’析請鈞局審二發明專利之申請要件,爰 專利權’實感德便。 〜委員明鐘,並賜予本發明Page 14 4 6 8 33 4 V. Description of the invention (12) In order to make the present invention more show its progress and practicability, its advantages are listed as follows: Gu v ^ The function of receiving and analyzing tools is to provide information It is decoded to store, calculate, display and effectively expand the range of use of the transmitting system after decoding. This 2, which can be used to convey the content of stock information, such as the stock market, real-time information and stock prices, is to provide a convenience function for the stock family. 3. The microprocessor is used. • The message volume and application area of the paging transmission system are increased. 4, with news, public information and advertising means γ Α m c ~ 1 paging application function. 5, with practicality. 6. Utilization in the industrial and commercial circles and the industry ^ Jia To sum up, ‘the invention has already been applied in accordance with the law’ and asked the Bureau to review the application requirements for the second invention patent. 实 Patent right. ~ Member Ming Zhong and give the invention

Claims (1)

6 8 33 4 六、申請專利範圍 1、一 體之内部設 含有尚頻接 份電路等, 徵在於: 其係傳 解碼後,且 微處理器控 可寫資料記 u 2連接主微 U 7、資料儲 處理器U1之 處理後轉換 的視頻及音 端,並以聲 顯示。 2、 依 示裝置,係 接收點R E C I 收電路。 3、 依 示裝置,所 種傳呼訊息的顯 有一印刷電路板 收電路、解碼器 另該殼體之正面 呼訊號經天線進 由顯示器顯示, 制,並受控於與 憶體U3及專用遙 處理器U1,且該 存器U4、U5及顯 傳呼訊號,在程 成相應之視頻和 頻輸出端連接至 音、文字、圖形 專利申請範圍第 δ玄解碼接收微處 、電阻R1 4 ' R1 5 專利申請範圍第 述之程序處存器 入高頻 又該解 該解碼 控器, 主微處 示資料 序儲存 音頻訊 外接電 '及影 接收電路RF 碼接收微處 接收微處理 又遠解碼接 理器U1接有 儲存器U6, 器If 7的程序 號’係由主 視機的視頻 像的方式, 示裝置’係有一殼體,且該殼 ’又該印刷電路板上之電路包 電路、電源電路及控制顯示部 設有電源並聯及顯示燈,其特 傳至解碼器 理器U2内含 器U 2連接之 收微處理器 程序儲存器 進入該主微 控制下,經 微處理器U1 及音頻輪入 在電視機上 1項所述之一種傳呼訊息的顯 理器U2的外部連接有由紅外線 和電容C1 6所組成之紅外線接 1項所述之一種傳呼訊息的顯 U7為一只唯讀儲存器(R〇M) 依專利申請範圍第!項所述之一種傳呼訊息的顯6 8 33 4 6. Scope of patent application 1. The integrated internal device contains a circuit that still connects to the frequency, etc. The characteristics are as follows: after it is decoded, and the microprocessor controls the writable data record u 2 connected to the main micro U 7, the data The video and audio ends converted by the storage processor U1 are displayed by sound. 2. The indicating device is the receiving point R E C I receiving circuit. 3. According to the display device, all kinds of paging messages display a printed circuit board to receive the circuit, and the decoder's frontal call signal is displayed on the display via the antenna, and is controlled by the memory U3 and special remote processing. Device U1, and the registers U4, U5 and the display paging signal are connected to the corresponding video and frequency output terminals of Cheng Cheng to audio, text, and graphic patent application scope δ Xuan decoding receiving micro-point, resistor R1 4 'R1 5 patent The program register described in the application scope should be decoded when the high-frequency register is stored. The main micro-processor displays the data in order to store the audio signal and external power and the video receiving circuit RF code. The micro-processor receives the micro-processing and remote decoding processor. U1 is connected to the memory U6, and the program number of the device If 7 is based on the video image of the main video camera, and the display device is provided with a casing, and the casing is the circuit package circuit and power circuit of the printed circuit board. The control and display unit is provided with a power supply parallel and display lamp, which is specially transmitted to the receiver microprocessor program storage unit connected to the decoder unit U2 and the U2 unit, and enters the main micro control, and passes the microprocessor U1 and the audio wheel. On the television, the display device U2 of one of the paging messages described in item 1 is connected with an infrared consisting of infrared rays and a capacitor C1 6 and the display device U7 of one of the paging messages of one item is a read-only memory. (ROM) According to the scope of patent application! Display of a paging message Η ΙΗΗ ΙΗ 468334468334 為用〜傳呼訊息的顯 巧用於儲存資料之動態 六、申請專利範園 示裝置’所述之資料儲存器U4及!)5 動態儲存器(DRAM)。 5、依專利申請範圍第!項所 示裝置,所述之顯示資料儲存器U6 儲存器(DRAM)。 6、依專利申請範圍第1項所述之— 示裝置’所述之可寫數據儲存器U3為—種傳呼訊息的顯 式化唯讀記憶體(EEPROM) 。 5子式可栻除可程 顯 > 電 矣且 7、依專利申請範圍第i項所述之—種… 示裝置’所述之主微處理器U1的外部桩古丄 今訊息的 石英振逢器Yi及電容C1、(:2所组成之石英振 容C3 '電容C4及電阻R7、R8所組成之重置電路。和由 一 8、依專利申請範圍第丨項所述之一種傳呼訊,氧 示裝置,所述之專用遙控器由含微處理器之編碼器&、 合開關組、紅外線發射電路及發射顯示電路所組^。 9、依專利申請範圍第1項所述之一種傳呼訊息的 示裝置,所述之解碼接收微處理器U2之外部接有由石英 盡器Y2、電容Cl 1及電容C12所Μ成的石英振盪電路和由 阻R11、電容C14、C15及開關S1組成的重置電路。In order to use ~ the paging message is used to store data dynamically. 6. The data storage device U4 and!) Described in the patent application model display device. 5) Dynamic storage device (DRAM). 5, according to the scope of patent applications! The device shown in item 4, the display data storage U6 storage (DRAM). 6. According to item 1 of the scope of patent application-the writable data storage U3 described in the display device 'is an explicit read-only memory (EEPROM) for paging messages. The 5 sub-type can eliminate the programmable display> 7. According to the item i in the scope of the patent application-a kind of ... the quartz oscillator of the external message of the main microprocessor U1 described in the display device ' A reset circuit composed of a quartz resonator C3 ′ composed of a capacitor Yi and a capacitor C1, (: 2, a capacitor C4, and resistors R7, R8.) And a paging signal as described in item 8 of the scope of patent application Oxygen display device, the dedicated remote control is composed of a microprocessor-containing encoder & a switch unit, an infrared transmitting circuit and a transmitting display circuit. 9. One of the items described in the first scope of the patent application A display device for paging messages. The decoding receiving microprocessor U2 is externally connected with a quartz oscillator Y2, a capacitor Cl1 and a capacitor C12, and a quartz oscillation circuit formed by a resistor R11, capacitors C14, C15, and a switch S1. Composition of the reset circuit. 第17頁Page 17
TW89110161A 2000-05-25 2000-05-25 Paging message display TW468334B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE202015100514U1 (en) 2014-04-10 2015-02-26 Chung-Fu Chang Fitness Band Sports Equipment

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE202015100514U1 (en) 2014-04-10 2015-02-26 Chung-Fu Chang Fitness Band Sports Equipment
DE102015105491A1 (en) 2014-04-10 2015-10-15 Chung-Fu Chang Fitness Band Sports Equipment
DE202015009060U1 (en) 2014-04-10 2016-08-17 Chung-Fu Chang Fitness Band Sports Equipment

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