經濟部智慧財產局員工消費合作社印製 466726 A7 __'_ B7 五、發明說明（1 )Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 466726 A7 __'_ B7 V. Description of Invention (1)
[發明領域] I 本發明係關於一種半導體封裝件，尤係關於一種具有 散熱片以提升散熱效率之半導趑封裝件β [背景說明]· 球栅陣列（BGA)丰導餿封裝件（Ball Grid Array Semiconductor Paclcage)之所以成為封裝產品之主流，在於 其能私供充分數量之輸入/出.連結端（I/O Connections)以符 合具尚密度之電子元件（Electronic Components)及電子電 路（Electrical Circuits)之半導體晶片的需求。然而，半導 體晶片上之電子元件及電子電路之密度越高，其運作時所 產生之熱量便越多；但若不將半導體晶片所產生之熱量有 效逸散，將會影響至半導體晶片之性能及使用壽命。再而， 傳統上，BGA半導體封裝件之高性能半導體晶片係為封裝 膠體（Encapsulant or Resin Body)所包覆，而構成封裝膠體 之封裝樹脂之熱導係數K僅約為0.8 w/m。K，熱傳導性甚 差，故往往令半導體晶片佈設有電子元件及電子電路之作 用表面（Active Surface)上產生之熱量無法有效藉封裝膠體 之傳遞而逸散至大氣中β 此外’半導體晶片之材料的熱膨脹係數（Coefficient of Thermal Expansion，CTE)約為 3 ppm厂C，而一般形成封裝 膠體之封裝樹脂的CTE則高達約20 ppm/t，故在封裝膠 體包覆丰導體晶片後’於用以固化封裝膠體之烘烤作業 (Curing) '將半導體封裝件銲設於印刷電路板上之迴銲作 業（Solder Reflow)及半導體封裝件於溫度循環（Temperature (請先閲讀背面之注意事項再填寫本頁) 1 n I I n * n n 1 n I «ϋ n I * 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱） 1 16117 A7 B7 五、發明說明（2 ) <锖先Μ讀背面之注意事項再填寫本頁>[Field of the Invention] The present invention relates to a semiconductor package, and more particularly to a semiconducting semiconductor package having a heat sink to improve heat dissipation efficiency. [Background note] · Ball grid array (BGA) abundance semiconductor package (Ball) The reason why Grid Array Semiconductor Paclcage) has become the mainstream of packaging products is that it can provide a sufficient number of input / output privately. I / O Connections to meet the high density of Electronic Components and Electronic Circuits (Electrical Circuits). However, the higher the density of the electronic components and electronic circuits on the semiconductor wafer, the more heat it generates during operation; but if the heat generated by the semiconductor wafer is not effectively dissipated, it will affect the performance and performance of the semiconductor wafer. Service life. Furthermore, traditionally, high-performance semiconductor wafers of BGA semiconductor packages are covered with an encapsulant or resin body, and the thermal conductivity K of the encapsulating resin constituting the encapsulant is only about 0.8 w / m. K, the thermal conductivity is very poor, so semiconductor wafers are often equipped with electronic components and electronic circuits on the active surface (Active Surface). The heat generated on the active surface cannot be effectively transferred to the atmosphere by the transfer of packaging gels. Coefficient of Thermal Expansion (CTE) is about 3 ppm factory C, and the CTE of the packaging resin that generally forms the packaging colloid is as high as about 20 ppm / t. Curing of curing encapsulant (Curing) 'Solder Reflow soldering semiconductor packages on a printed circuit board and temperature cycling of semiconductor packages (Temperature (Please read the precautions on the back before filling in this Page) 1 n II n * nn 1 n I «ϋ n I * This paper size applies to China National Standard (CNS) A4 (210 X 297 public love) 1 16117 A7 B7 V. Description of the invention (2) < 锖 先Μ Read the notes on the back and fill out this page >
Cycle)信賴性驗證作業中之大幅溫度變化下封裝膠體較大 之熱脹冷縮幅度往往會對半導體晶片產生相當之熱應力 (Thermal Stress)效應，而易導致半導體晶片裂損（Crack)， 且包覆半導體晶片之封裝膠體愈厚或半導體晶片愈薄或尺 寸愈大時’對半導體晶片產生之熱應力效應愈益顦著《是 以’此種習知半導體封裝件在製造上始終有良率無法有效 提升之缺點》 為解決習知BGA半導體封裝件在散熱性上之不足，遂 有於BGA半導體封裝件中装設有散熱片之結構因應而 生。此種將散熱片包覆於封裝膠體中之方式，雖有助於散 熱效率之提升’惟半導體晶片作用表面所產生之熱量傳遞 至大氣之路徑中’仍有相當大之部分係經過散熱性不佳之 封裝膠體’使此種半導體封裝件之整體散熱效率無法提升 至令人滿意的程度。 經濟部智慧財產局Μ* Η*消費合作社印製 針對上述習知具散熱片之半導體封裝件所存在之問 題，美國專利第5,977,620號案乃揭示了一種散熱片直接 黏接至晶片之作用表面上的半導體封裝件。如第8圖所示 該種半導體封裝件，具有一頂面100外露出封裝膠饉u 之散熱片10’該散熱片10之底面1〇1相對於晶片12之處 形成有一突出部102，該突出部i〇2並直接黏接至晶片12 之作用表面120上，以使該晶片12之作用表面12〇所產生 的熱董能直接傳遞至散熱片10,並由散熱片1〇之頂面1〇〇 直接逸散至大氣中。由於該晶片12所產生之熱量的傳遞途 徑毋須經由封裝膠體u，且散熱片10之頂面100 外 本紙張尺及制f S國家標準（CNS)A4規格（21〇 x 297公·^ 2 16117 經濟部智慧財產局+員工消費合作社印製 466726 Α7 五、發明說明（3 ) 露於大氣中，故該種半導體封裝件具有良好，之散熱效率。 然而’該種半導體封裝件1恰因散熱片10直接黏接至晶片 12上，往往會由於散熱片10及晶片12在厚度上之公差， 而易在合模注膠時使該散熱片10為封裝模具所迫壓，致該 晶片12為散熱片10壓裂’此種狀況在晶片朝大型化及薄 型化的趨勢下尤易發生；即使散熱片10及與之黏接之晶片 12無厚度上之公差問題’.·熱膨服係數（Coefficient of Thermal Expansion，CTE)高達約 1 8ppm/°C 之一般銅金屬製 成的散熱片10在後績封裝製程之溫度變化（Temperature Variation)或信賴性驗證之溫度循環（Temperature Cycle) 中，仍易對熱膨脹係數僅約3ppm/°C之晶片12產生相當之 熱應力，而易造成晶片12之裂損（Crack) 〇 故而，該半導體封裝件1存在有亟待改良之信賴性與 製作性的問題^ 有鑑於上述之半導體封裝件之缺點，如第9圖所示， 使散熱片20之突出部202與晶片22間保持一適當距離而 不使之接觸，雖使晶片22產生之熱量無法直接傳遞至散熱 片20 ’惟信賴性與製作性之問題可有效解決，而足以彌補. 製成品在散熱效率上的降低。然而，如第10圖所示，在合 模注膠時，位於基板23 —角端之封裝模具的注膠口 24注 入模六（未圖示）中的樹脂模流在流入晶片22與突出部202 备1之間隙後，會因流道變窄而流速變慢，造成位於該間隙 外之樹脂模流之流速快於位於間隙内之樹脂模流之流速， 如圖中之流速曲線所示；此種流速不均之狀況往往會導致 (請先聞讀背面之注意事項再填窝本頁) 丨訂---------線_ 本紙張尺度適用中國國家標準（CNS)A4規格（21〇 X 297公楚） 3 16117 ，卜 \ 經濟部智慧財產‘笱f工消费合作社印製 身 Α7 Β7 五、發明說明（4 ) 氣洞25(V〇id)形成於該間隙内，如第u圖所示，氣洞之形 成則易使此種半導體封裝件在高溫環境下發生爆裂 (Popcorn)而造成信賴性的問題。 [發明概述] 本發明之目的即在提供一種散熱效率高且信賴性佳之 具散熱片之半導想封裝件。 為達成上揭及其它目的，本發明之具散熱片之半導體 封裝件係包括：一基板；一晶片，其係黏接至該基板上並 與該基板電性連接；一散熱片，其具有一片體及用以將該 片體撐起一預設高度而使該片體位於該晶片上方之支撐 部，其中’該片體具有一頂面及一相對之底面，於該底面 上並凸設有一厚部，復於該厚部之端面上有多數大致順沿 該基板之注膠口方向所形成之流道，且令該厚部與晶片間 形成有一間隊；以及一封裝膠體用以包復該晶片及散熱 片’但使該散熱片之頂面外露出該封裝膠禮。 該流道係於厚部之端面上凹設出多道之溝槽所形成 者’或在該厚部之端面上凸設出成陣列方式排列之凸粒， 以由任兩列凸粒間之空隙形成該流道。該流道之設置得減 少流入厚部與晶片間之間隙的樹脂模流受到流通空間窄化 而使流速變緩的影響，故能避免氣洞形成於該間隙中，但 同時得減少位於厚部與晶片間之樹脂膠體的厚度，令熱量 經由間隊中之.樹脂膠體傳遞的距離縮短，而仍能有效提升 散熱效率。 [圖式簡單說明] ---I------裝-------訂----------線 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺朗財國國家標準（C^4規格⑽x 297公爱） 4 16117 經濟部智慧財產局員工消費合作社印製 4 6 6 7 2 6 A7 __B7 五'發明說明（5 ) 以下茲以較佳具體例配合所附圖式進一步詳述本發明 之特點及功效。 第1圖係本發明之半導體封裝件之剖視圖； 第2圖係本發明之半導體封裝件於模壓時樹脂模流之 流速曲線之示意圖； 第3圖係一用於本發明之半導體封裝件之散熱片的下 視圖； 第4圖係沿第3圖之4-4線剖開之剖視圖； 第5圖係另一用於本發明之半導體封裝件之散熱片的 下視圖； 第ό圖係再一用於本發明之半導體封裝件之散熱片的 刮視圖； 第7圖係又一用於本發明之半導體封裝件之散熱片的 上視圖， 第8圖係一習知半導體封裝件之刳視圖； 第9圖係另一習知半導體封裝件之剖視圓.； 第10圖係第8圖所示之半導體封裝件於合模注膠時樹 脂模流之流速曲線示意圖；以及 第Π圖係第9圖所示之注膠作業完成後於晶片與散熱 片間形成有氣洞之剖面示意圖。 [發明詳細說明] 第1圖所示者為本發明之半導體封裝件的剖視圖β該 半導體封裝件3係包括有一基板30，一黏設於該基板3〇 上之晶片31’多數用以電性連接該基板3〇與晶片之金 本“尺奴財關家.-Γ—-- 16117 (請先閱讀背面之注意事項再填窝本頁)(Cycle) The large thermal expansion and contraction of the packaging colloid under large temperature changes during the reliability verification operation tends to have a considerable Thermal Stress effect on the semiconductor wafer, which can easily cause the semiconductor wafer to crack. The thicker the packaging colloid or the thinner the semiconductor wafer or the larger the size of the semiconductor wafer, the more the thermal stress effect on the semiconductor wafer is produced. Disadvantages of Effective Enhancement "In order to solve the shortcomings of the conventional BGA semiconductor package in terms of heat dissipation, there is a structure in which a heat sink is installed in the BGA semiconductor package. Although this method of encapsulating the heat sink in the encapsulating gel is helpful to improve the heat dissipation efficiency, 'but the heat generated by the active surface of the semiconductor wafer is transferred to the atmosphere', a considerable part is due to heat dissipation. The best packaging colloid 'makes it impossible to improve the overall heat dissipation efficiency of such semiconductor packages to a satisfactory level. The Intellectual Property Bureau of the Ministry of Economic Affairs M * Η * Consumer Cooperative printed the above-mentioned conventional semiconductor packages with heat sinks. U.S. Patent No. 5,977,620 discloses that a heat sink is directly bonded to the active surface of the chip. Semiconductor package. As shown in FIG. 8, this type of semiconductor package has a heat sink 10 ′ with a top surface 100 exposing the encapsulation adhesive. The bottom surface 101 of the heat sink 10 is formed with a protruding portion 102 relative to the wafer 12. The protruding portion 102 is directly adhered to the active surface 120 of the wafer 12 so that the heat generated by the active surface 120 of the wafer 12 can be directly transferred to the heat sink 10 and the top surface of the heat sink 10 100 escape directly into the atmosphere. Because the heat transfer path generated by the chip 12 does not need to pass through the encapsulating colloid u, and the top surface 100 of the heat sink 10 is a paper rule and the national standard (CNS) A4 specification (21 × x297 mm. 2 16117) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs + employee consumer cooperative 466726 A7 V. Description of the invention (3) Exposed to the atmosphere, this type of semiconductor package has good heat dissipation efficiency. However, 'This type of semiconductor package 1 is due to the heat sink 10 is directly adhered to the wafer 12, often due to the thickness tolerance of the heat sink 10 and the wafer 12, it is easy to make the heat sink 10 be pressed by the packaging mold when the mold is injected, which causes the wafer 12 to dissipate heat. Sheet 10 fracturing 'This situation is particularly likely to occur under the trend of larger and thinner wafers; even if the heat sink 10 and the wafer 12 to which it is attached have no tolerance in thickness'. Coefficient of thermal expansion (Coefficient of Thermal Expansion (CTE) heat sink 10 made of general copper metal up to about 18 ppm / ° C is still easy to use during temperature variation (Temperature Variation) or temperature cycle of reliability verification (Temperature Cycle) in subsequent packaging processes. The wafer 12 having a thermal expansion coefficient of only about 3 ppm / ° C generates considerable thermal stress, which is likely to cause cracks (Crack) of the wafer 12. Therefore, the semiconductor package 1 has problems of reliability and manufacturability which need to be improved ^ Yes In view of the above-mentioned shortcomings of the semiconductor package, as shown in FIG. 9, the protrusion 202 of the heat sink 20 and the wafer 22 are maintained at an appropriate distance without being contacted, although the heat generated by the wafer 22 cannot be directly transferred to the heat sink. Sheet 20 'However, the problems of reliability and manufacturing can be effectively solved, which is enough to make up for. The reduction in heat dissipation efficiency of the finished product. However, as shown in Figure 10, it is located at the corner of the substrate 23 when the mold is injected. The injection port 24 of the packaging mold is injected into the resin mold flow in the mold 6 (not shown). After flowing into the gap between the wafer 22 and the protruding portion 202, the flow velocity becomes slower due to the narrowing of the flow channel, resulting in the gap. The flow velocity of the resin mold flow outside is faster than the flow velocity of the resin mold flow in the gap, as shown in the flow velocity curve in the figure; such uneven flow conditions often result (please read the precautions on the back before filling the nest (This page) 丨 Order- ------- Line_ This paper size applies Chinese National Standard (CNS) A4 specification (21〇X 297 Gongchu) 3 16117, Bu \ Ministry of Economic Affairs Intellectual Property '笱 f industry consumer cooperative printed body Α7 Β7 5 4. Description of the invention (4) The air hole 25 (V0id) is formed in the gap. As shown in FIG. U, the formation of the air hole easily causes such a semiconductor package to burst in a high temperature environment (Popcorn) and cause Problem of Reliability [Summary of the Invention] The object of the present invention is to provide a semiconductive package with a heat sink with high heat dissipation efficiency and good reliability. In order to achieve the disclosure and other purposes, the semiconductor package with a heat sink of the present invention includes: a substrate; a wafer that is adhered to the substrate and electrically connected to the substrate; a heat sink that has a sheet And a support portion for supporting the sheet body to a predetermined height so that the sheet body is located above the wafer, wherein 'the sheet body has a top surface and an opposite bottom surface, and a projection is provided on the bottom surface. The thick part has a plurality of flow channels formed on the end surface of the thick part substantially along the direction of the injection port of the substrate, and a line is formed between the thick part and the wafer; and a packaging gel is used for covering The chip and the heat sink are exposed from the top surface of the heat sink. The flow channel is formed by a plurality of grooves recessed on the end surface of the thick portion, or convex particles arranged in an array are protruded on the end surface of the thick portion, so that between any two rows of convex particles, A void forms the flow channel. The flow path is arranged to reduce the flow of the resin mold flowing into the gap between the thick portion and the wafer. The flow space is slowed by the narrowing of the flow space. Therefore, the formation of air holes in the gap can be avoided, but at the same time, it must be reduced in the thick portion. The thickness of the resin colloid between the wafer and the chip reduces the distance for heat to pass through the resin colloid in the cell, while still effectively improving heat dissipation efficiency. [Schematic description] --- I ------ install ------- order ---------- line (please read the precautions on the back before filling this page) National Standard of Paper Ruler (C ^ 4 size x x 297 public love) 4 16117 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 4 6 6 7 2 6 A7 __B7 Five 'Invention Description (5) The examples and the accompanying drawings further detail the features and effects of the present invention. Fig. 1 is a cross-sectional view of the semiconductor package of the present invention; Fig. 2 is a schematic diagram of a resin mold flow velocity curve of the semiconductor package of the present invention during molding; Fig. 3 is a heat dissipation of the semiconductor package of the present invention FIG. 4 is a sectional view taken along line 4-4 of FIG. 3; FIG. 5 is a bottom view of another heat sink for the semiconductor package of the present invention; FIG. 6 is another FIG. 7 is a top view of a heat sink for a semiconductor package of the present invention; FIG. 7 is a top view of a heat sink for a semiconductor package of the present invention; FIG. 8 is a front view of a conventional semiconductor package; FIG. 9 is a cross-sectional circle of another conventional semiconductor package; FIG. 10 is a schematic diagram of a resin mold flow velocity curve of the semiconductor package shown in FIG. 8 when the mold is injection-molded; and FIG. A schematic cross-sectional view of an air hole formed between the wafer and the heat sink after the glue injection operation shown in FIG. 9 is completed. [Detailed description of the invention] FIG. 1 is a cross-sectional view of a semiconductor package of the present invention. The semiconductor package 3 includes a substrate 30, and a wafer 31 'adhered to the substrate 30 is mostly used for electrical properties. The gold plate connecting the substrate 30 to the chip "Ru Nu Cai Guan Guan. -Γ --- 16117 (Please read the precautions on the back before filling in this page)
身 經濟部智慧財產局8工消費合作社印製 A7 —_____Β7 ^_r 五、發明說明（6 ) 線32’ 一接置於該基板30上之散熱片33, 一用以包復該 晶片3卜金線32及部分之散熱片33的封裝膠體34’以及 多數之植接於該基板30底面上之銲球35 » 該基板30具有一佈設有多數導電跡線（此為習知者， 故未予圖示）之頂面300以及一佈設有多數導電跡線之底 面301，其並開設有多數之導電穿孔（Vias，未圖示）以使該 頂面3 00上之導電跡線與底面301上之導電跡線電性連 接°該鋒球35即係植接於底面301上之導電跡線终端，以 供該晶片31與基板30電性連接後，該晶片31得藉該銲球 35與如印刷電路板之外界裝置電性連接。供該基板3〇製 造用之材料得為一般之環氧樹脂、聚亞醯胺樹脂、三氮雜 苯樹脂等材料’或陶瓷材料、玻璃材料等，其中，又以BT (Bisraaleimi detriazine)樹脂為較宜》 該晶片31則具一佈設有多數電子元件及電子電路之 作用表面310及一相對之非作用表面311，其即係藉該非 作用表面311。以如銀膠之膠黏劑或聚亞醯胺膠片黏接至 該基板30之頂面300上。 該散熱片33係由一片體330及用以將該片體3 30支撐 至位於該晶片31上方且不與晶片31之作用表面310接觸 之高度的撐腳331所構成者。該片體330具有一外露出該 封裝膠體34之頂面330a及一相對之底面330b，並於該底 面3 30b相對於該晶片31之處一體連設有朝該晶片31之方 向伸展之厚部332，使該厚部332之厚度設為其端面332a 與晶片31間相隔一適當距離，以在該端面332a與晶片31 11 1111 · 1---1 Ιί ^ · ---! f請先閱讀背面之注*事項再填窵本頁} 本紙張尺度適用中圏國家财（CNS)A4規格（210 公d 6 16117 466726 Α7 Β7 經濟部智慧財產局員工消費合作社印製 五、發明說明（7 ) 之作用表面310間形成一間隊3 6 ’俾令封裝膝艎3 4得充 填其中，且該散熱片33之厚部332不致壓觸至晶片31。 為使該間隙3 6不致過小而於模壓時因流入該間隙3 6中之 樹脂模流流速變慢而導致氣洞形成於間隙3 6中’且亦不能 過大而使充填於該間隙36中之封裝膠體34過厚而影響散 熱效率，因而，該厚部332之端面332a上係形成有多數之 流道332b，使該流道332b之形成係順沿樹脂模流注入方 向為之，俾有效降低流經間隙36之樹脂模流受流動空間窄 化之影響，而得避免氣洞形成於間隙36中。樹脂模流於本 發明之半導體封裝件之模壓作業中之流動曲線係示於第2 圖，由於樹脂模流於間隙36中之流速未明顯降低，故位於 間隙36中之樹脂模流的流速與位於間隙46外之樹脂模流 的流速不致有太大之差異，而得避免氣洞形成於封裝膠體 34中。 如第3及4圖所示，該厚部332之端面332a上所形成 之流道332b乃由凹設於端面332a上之槽溝所構成者。流 道3 32b之深度並無特定限制，惟須足能避免流經間隙36 中之樹脂模流的流速明顯降低，以防止氣洞之形成；再而， 該流道332b之形成得大幅增加散熱片33位於封裝膠體34 中之表面積*除能使散熱面積增大而提升散熱效率外，復 因表面積之增加而使散熱片33與封裝膠體34間之結合性 為之提升。 如第5圖所示者為散熱片之另一實施例的下視圖β如 圖所示，該散熱片53之結構大致同於前述者，惟不同處在 <請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4 ^ (210 X 297 ^ ) 7 16117 A7 A7 , 經濟部智慧財產局WK工消費合作社印製 ，考 五、發明說明（8 ) 於該流道53 2b係呈網格狀方式形成於散熱片53之厚部 5 32的端面532a上，如圖中分佈有細點之部分所示；此種 的網格狀方式呈現之流道523b除使樹脂模流流動於晶片 (未圖示）與端面532a間之空間擴大而能進而避免氣洞之形 成外，尚會增加位於封裝膠體（未圊示）内之散熱片53的表 面積’而得進一步提升散熱效率，並增加散熱片53與封裝 膠體間的結合性》 如第6圖所示者為本發明所使用之散熱片之再一實施 例的剖視圖。如圖所示，該散熱片63之結構大致同於前述 者’惟其流道632 b形成後之裁面乃呈三角形。換言之，該 散熱片上所形成之流道的截面形狀並不限於第4及6圖所 示者，其它規則形狀或不規則形狀均亦得適用，惟仍須其 順沿樹脂模流注入模穴時之方向形成或開設，方能將樹脂 模流之流速於進入晶片與散熱片之厚部間的間隙時所受影 響降至最低程度。Printed A7 by the 8th Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Health and Economics —_____ Β7 ^ _r 5. Description of the Invention (6) Line 32 'is connected to a heat sink 33 placed on the substrate 30, and is used to cover the chip 3 gold The wire 32 and the part of the encapsulant 34 'of the heat sink 33 and the majority of the solder balls 35 implanted on the bottom surface of the substrate 30 »The substrate 30 has a plurality of conductive traces (this is a known one, so it is not The top surface 300 and a bottom surface 301 provided with a plurality of conductive traces are provided with a plurality of conductive vias (Vias (not shown)) so that the conductive traces on the top surface 300 and the bottom surface 301 are provided. The conductive traces are electrically connected. The front ball 35 is a conductive trace terminal planted on the bottom surface 301 for the wafer 31 to be electrically connected to the substrate 30. The wafer 31 can borrow the solder ball 35 and such as The external device of the printed circuit board is electrically connected. The materials used for manufacturing the substrate 30 can be general epoxy resin, polyimide resin, triazabenzene resin, etc., or ceramic materials, glass materials, etc. Among them, BT (Bisraaleimi detriazine) resin is used as It is more suitable. The chip 31 has an active surface 310 on which most electronic components and electronic circuits are arranged, and an opposite non-active surface 311, which is based on the non-active surface 311. Adhesive such as silver glue or polyurethane film is adhered to the top surface 300 of the substrate 30. The heat sink 33 is composed of a sheet body 330 and a supporting leg 331 for supporting the sheet body 3 30 to a height above the wafer 31 and not in contact with the active surface 310 of the wafer 31. The sheet body 330 has a top surface 330a exposing the encapsulant 34 and an opposite bottom surface 330b, and a thick portion extending in the direction of the chip 31 is integrally connected to the bottom surface 3 30b with respect to the chip 31. 332, the thickness of the thick portion 332 is set to an appropriate distance between the end surface 332a and the wafer 31, so that the end surface 332a and the wafer 31 are 11 11 1111 · 1 --- 1 Ιί ^ · ---! F Please read first Note on the back * Matters need to be refilled on this page} This paper size is applicable to China National Finance (CNS) A4 specification (210g d 6 16117 466726 Α7 Β7 Printed by the Intellectual Property Bureau Staff Consumer Cooperatives of the Ministry of Economic Affairs 5. Description of the invention (7) A group 3 6 ′ is formed between the active surfaces 310, so that the package knee 艎 3 4 can be filled, and the thick portion 332 of the heat sink 33 is not pressed against the wafer 31. In order to prevent the gap 3 6 from being too small, it is pressed. When the flow velocity of the resin mold flow flowing into the gap 36 is slower, air holes are formed in the gap 36, and it cannot be too large, so that the encapsulation gel 34 filled in the gap 36 is too thick and affects the heat dissipation efficiency. A plurality of flow channels 332b are formed on the end surface 332a of the thick portion 332, so that The formation of the flow channel 332b is along the injection direction of the resin mold flow, which effectively reduces the resin mold flow flowing through the gap 36 due to the narrowing of the flow space, so that the formation of air holes in the gap 36 is avoided. The flow curve during the molding operation of the semiconductor package of the present invention is shown in Figure 2. Since the flow rate of the resin mold flow in the gap 36 has not been significantly reduced, the flow rate of the resin mold flow in the gap 36 and the flow rate of the resin mold flow outside the gap 46 are not significantly reduced. The flow rate of the resin mold flow is not so different, so that air holes are prevented from being formed in the encapsulant 34. As shown in Figs. 3 and 4, the flow channel 332b formed on the end surface 332a of the thick portion 332 is caused by The groove formed on the end surface 332a is not limited. The depth of the flow channel 3 32b is not limited, but it must be sufficient to avoid a significant decrease in the flow rate of the resin mold flow through the gap 36 to prevent the formation of air holes; In addition, the flow channel 332b is formed to greatly increase the surface area of the heat sink 33 in the encapsulant 34. In addition to increasing the heat dissipation area and improving heat dissipation efficiency, the heat sink 33 and the encapsulant 34 are caused by the increase in surface area. Cohesiveness As shown in Figure 5, the bottom view of another embodiment of the heat sink is shown in Fig. Β. The structure of the heat sink 53 is substantially the same as the previous one, but the difference is < Please note this page before filling in this page) This paper size applies Chinese National Standard (CNS) A4 ^ (210 X 297 ^) 7 16117 A7 A7, printed by WK Industrial and Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs, Examination 5. Invention Description (8 ) The flow channel 53 2b is formed in a grid pattern on the end surface 532a of the thick portion 5 32 of the heat sink 53 as shown in the part with fine points distributed in the figure; the flow channel presented in this grid manner 523b, in addition to expanding the space between the resin mold flow between the wafer (not shown) and the end surface 532a to prevent the formation of air holes, will also increase the surface area of the heat sink 53 in the encapsulant (not shown) ' It is necessary to further improve the heat dissipation efficiency and increase the bonding between the heat sink 53 and the encapsulant. As shown in FIG. 6, it is a cross-sectional view of still another embodiment of the heat sink used in the present invention. As shown in the figure, the structure of the heat sink 63 is substantially the same as the aforementioned one, except that the cut surface of the flow channel 632 b after the formation is triangular. In other words, the cross-sectional shape of the flow channel formed on the heat sink is not limited to those shown in Figures 4 and 6. Other regular shapes or irregular shapes are also applicable, but it must still be injected into the cavity along the resin mold flow. The formation or opening of the direction can minimize the influence of the flow rate of the resin mold flow when entering the gap between the wafer and the thick part of the heat sink.
如第7圖所示者為本發明所使用之散熱片之又一實施 例的上視囷。如圖所示，該散熱片73之結構大致同於前述 者’惟該厚部732之端面732a上係形成有多數呈陣列方式 排列之凸粒732c，使順沿樹脂模流注入模穴時之方向上， 於任兩列相鄰之凸粒732c間形成供樹脂模流流入之流道 732b。該凸粒732c之形狀應不以圈示之圓柱形為限，其它 如方形柱、菱形柱或多角柱等形狀亦適用’其高度則以凸 粒732c之端部與晶片（未围示）相隔一預設之適當距離為限。 須知’上述之具體實施例僅係用以例釋本發明之特點 ϋ張尺度適用中國國家棵準（CNS)A4規格（210 X 297公S 5 16117 I-------- i --------V I I------ <請先w讀背面之注意事項再填寫本頁) 466726 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（9 > 及功效’而非用以限定本發明 發明上揭之精神與技術範疇下 容而完成之等效改變及修飾， 電性連接’或於基板上黏設至 發明下述之申請專利範圍所涵 [圖式符號說明] 10 、 20 、 33 、 53 ' 63 、 73 11、34 12 、 22 、 31 100 ' 300 ' 330a 101 > 301 > 306 102 、 202 120 23、30 32 35 36、46 310 311 330 332 、 532 、 732 332a ' 532a ' 732a 332b 、 532b 、 632b 、 732b 732c 之可實施範疇，在未脫離本 ’任何運用本發明所揭示内 如將晶片以覆晶方式與基板 乂一個晶片者，均應仍為本 蓋。 散熱片 封裴膠體 晶片 頂面 底面 突出部 表面 基极 金線 銲球 間隙， 作用表面 非作用表面 片體 厚部 端面 流道 凸粒 私紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 16117 <請先閱缋背面之注意事項再填寫本頁) 訂--------.線.Fig. 7 is a top view of another embodiment of the heat sink used in the present invention. As shown in the figure, the structure of the heat sink 73 is substantially the same as the aforementioned one, except that most of the bumps 732c arranged in an array are formed on the end surface 732a of the thick portion 732, so that the resin can be injected into the cavity along the resin mold flow. In the direction, a flow channel 732b is formed between any two adjacent rows of convex particles 732c for resin mold flow. The shape of the bump 732c should not be limited to the cylindrical shape shown in the circle. Other shapes such as square pillars, diamond pillars, or polygonal pillars are also applicable. 'The height is separated from the wafer (not shown) by the end of the bump 732c. A preset proper distance is limited. Please note that the above-mentioned specific embodiments are only used to illustrate the features of the present invention. The scale is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 male S 5 16117 I -------- i- ------ VI I ------ < Please read the notes on the back before filling out this page) 466726 A7 B7 Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs V. Invention Description (9 > And 'effects' rather than equivalent changes and modifications made to limit the spirit and technical scope of the invention disclosed in the present invention, and electrical connections' or bonding on the substrate to the scope of the following patent application of the invention [ Description of Symbols] 10, 20, 33, 53 '63, 73 11, 34 12, 22, 31 100' 300 '330a 101 > 301 > 306 102, 202 120 23, 30 32 35 36, 46 310 311 330 332, 532, 732 332a '532a' 732a 332b, 532b, 632b, 732b 732c, without departing from the scope of the present disclosure, if a wafer is chip-on-chip with a substrate in the form of a flip chip, Both should remain as the base cover. Heat sink seals Pei colloidal wafers Top surface Bottom surface Protrusions Surface Base gold wire Ball gap, active surface, non-acting surface, thick part of the end surface, flow channel convex particles, private paper size applicable to Chinese National Standard (CNS) A4 (210 X 297 mm) 16117 < Please read the precautions on the back before filling this Page) Order --------. Line.