TW449858B - Method for forming buried layer inside semiconductor device - Google Patents

Abstract

This invention discloses a method for forming plural buried layers inside semiconductor device. This method includes the following steps. At first, a semiconductor substrate is provided. Then, p<SP>+</SP> ions are first implanted into this semiconductor substrate in order to form p<SP>+</SP> regions under the surface of this semiconductor substrate. Through the use of the first photoresist, plural concave portions and plural convex portions are etched on this semiconductor substrate. After that, n<SP>+</SP> ions are implanted into this semiconductor substrate in order to form plural n<SP>+</SP> regions on the surfaces of plural concave portions. Oxide layer is then deposited on the surfaces of plural concave portions and the surfaces of plural convex portions. These plural p<SP>+</SP>/n<SP>+</SP> regions are then heated to form buried layers. Oxide layer is stripped. Finally, a silicon layer is formed to fill up the plural concave portions and to cover the surfaces of plural convex portions.

Description

4 4 9 858 V. Description of the invention (1) 5-1 Field of the invention: The present invention relates to the formation of a plurality of buried layers, and is particularly used as a buried layer in a semiconductor device. 5-2 Background of the Invention: First, as shown in FIG. 1A, a semiconductor substrate 100 is provided, which includes a nitrided layer 100 and a p + -type buried layer 103. Then, as shown in FIG. 1B, the p + -type buried layer is removed by a common etching method, as shown in FIG. 1C, and a type ion is implanted in the semiconductor substrate 101 to form a plurality of n + -type regions 104 under the surface of the plurality of recesses. . Next, as shown in FIG. 1D ', an oxide layer 105 is deposited on the surface of the plurality of recesses. Finally, a silicon layer 106 is added to fill the plurality of concave portions and cover the surface of the plurality of convex portions. 5-3 Purpose and summary of the invention:

Page 4 4 49 858 5. Description of the invention (2) The present invention provides a method capable of forming a plurality of buried layers, which can considerably reduce the defects of the p + type buried area. In a preferred embodiment, the number of process steps is smaller than that of the prior art, and the economic benefits can be greatly increased. In a preferred embodiment, first, a semiconductor substrate is provided. Then, a first-type P + -type ion is implanted into this semiconductor substrate to form a p + -type region under its surface. The surface of the semiconductor substrate is covered with a first photoresist having a specific pattern as an etching curtain. By using the first photoresist, a plurality of concave portions and a plurality of convex portions are etched on the semiconductor substrate. After the deletion, U7 photoresists were removed. A second photoresist was used to cover the plurality of convex portions: Two people implanted n f ions into this semiconductor substrate to form a plurality of pVn + -type regions $ on the surface of the plurality of concave portions. Then remove the second photoresist. Its chemical layer is deposited on the surface of a plurality of recesses and a plurality of

This, ... domain to form a buried layer. Then the surface of the second oxide is the most: thermally formed-a layer of Shi Xi to fill the plurality of recesses and cover the plurality of protrusions H to make the present invention obvious and easy to understand, which will be described in detail below. The above description and other purposes 'features and advantages can better list preferred embodiments and cooperate with the attached drawings' for details

Page 5 449858 V. Description of the invention (3) The following is a description of the present invention. The description of the present invention will first be made with reference to an exemplary structure. Some variations and advantages of the invention will be described later. The preferred method of manufacture will be discussed later. Furthermore, although the invention is taught in terms of several embodiments, thin dielectric layers, these descriptions do not limit the scope or application of the invention. Also, although these examples use thin dielectric layers, it should be clear that the main part may be replaced by the relevant part. Therefore, the semiconductor element of the present invention does not limit the description of the structure. These elements include proof of the usefulness and applicability of the present invention and the preferred embodiments presented. And even though the present invention is described by way of example and a preferred embodiment, the present invention is not limited to the examples given. In addition, all other equivalent changes or modifications made without departing from the spirit disclosed by the present invention are included in the patent application park of the present invention. The scope of the invention should be construed in its broadest definition, so as to encompass all such modifications and similar structures. ^ The essence of the invention presented here can be explained as the embodiments shown in Figs. 2A to 2K. In relation to FIG. 2A ′, the substrate is illustrated according to the present invention. In this method, a semiconductor substrate 11 is first provided. Then, implant the first type P + ion, such as Biy ion, into this half

449858 V. Description of the invention (4) The conductor substrate 11 forms a p + type region 12 under the surface, as shown in FIG. 2B. The aforementioned implantation concentration was about 3E1 5 ions / cm2. As shown in FIG. 2C, a common photolithography method is used to form a first photoresist 60 with a specific pattern on the surface of the semiconductor substrate π as a lithographic mask. As shown in FIG. 2D, a first photoresist is used on a semiconductor substrate and is etched by a common dry plasma etching method to form a plurality of concave portions 50 and a plurality of convex portions 5 1. Then, as shown in FIG. 2E, a common dry type The first photoresist 60 is removed by slurry etching. As shown in FIG. 2F, the second photoresist 61 is covered on the plurality of convex portions 51 by a common lithography method. Η 植入 ions, such as p ions, are implanted for the second time to report on the surface of the plurality of recesses, and then wait for the basket lanes to move into the n-shaped area, as shown in Figure 2G. The concentration of this second implanted ion is about 4E14 i () ns / em2.

As shown in FIG. 2H, the second photoresist 61 is removed. 丄 As shown in FIG. 21, the oxide layer 14 such as tetraethoxysilicic acid-silicon is deposited on a plurality of recesses. Surface of the plurality of convex portions 51

Page 7 449858 V. Description of the invention (5) ----- The thickness of this oxide layer is about 3000 Angstroms. Then, a plurality of p + / η + type regions are heated to form a buried layer. The heating process is completed by a rapid heating process, and the required temperature is about 110 ° C. The duration is about four hours. As shown in Fig. 2, J 'oxide layer 14 is, for example, tetraethoxy silicate. Silicon dioxide is removed by a common fishing method. Finally, as shown in FIG. 2K, a silicon layer 5 is formed by a common epitaxial method to fill the plurality of concave portions 50 and cover the surface of the plurality of convex portions 51. The epitaxial formation temperature is about 11 3 (TC. According to the present invention, the proposed method can form a plurality of buried layers to effectively reduce the defects of the P + type buried layer. At the same time, in a preferred embodiment, its process steps are compared with the prior art. Less, and the economic benefits can be greatly increased due to the reduction of the tensile stress of the silicon nitride layer. Therefore, the method of forming a double buried layer in a semiconductor device is as follows: First, a semiconductor substrate is provided. Then, a first-type ρ + ion is implanted into the semiconductor substrate to form a 〆-type region under the surface thereof. A first photoresist having a specific pattern is formed on the surface of the semiconductor substrate as an etching mask. The use of photoresist etches a plurality of concave portions and a plurality of convex portions on the semiconductor substrate.

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5. Description of the invention (6) Then ′ remove this first photoresist. A second photoresist is used for the plurality of protrusions. # -Type ions are next implanted into this semiconductor substrate to form a plurality of n + -type regions on the surface of the plurality of recesses. The second photoresist is removed. Next, an oxide layer is deposited on the surface of the plurality of concave portions and the surface of the plurality of convex portions. The plurality of p + / n + -type regions are heated to form a buried layer. The oxide layer was removed. Finally, a broken layer is formed to fill the plurality of recesses and cover the surface of the plurality of protrusions. The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the patent application of the present invention; any other equivalent changes or modifications made without departing from the spirit disclosed by the present invention shall be included in the following Within the scope of patent application.

Page 9 d ά 9 85 8 Brief description of the drawings Figs. 1A to 1D illustrate various cross-sectional structures in the prior art; and Figs. 2A to 2K are schematic diagrams of the embodiments of the present invention. 11 Semiconductor substrate 12 P + -type region 14 Oxide layer 15 Silicon layer 50 Concave portion 51 Convex portion 60 First photoresist 61 Second photoresist 101 Semiconductor substrate 102 Silicon nitride layer 103 p + -type buried layer 104 n + -type region 105 Oxide layer 106 silicon layer

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Claims (1)

Λ1 299B85588 6. Scope of patent application 1. A method for forming a plurality of buried layers in a semiconductor element, including at least: providing a semiconductor substrate; first implanting a first-type conductive ion into the semiconductor substrate, To form a conductive layer with the first type of conductivity on the surface of the semiconductor substrate + etching the semiconductor substrate to form a plurality of concave portions and a plurality of convex portions, which are formed by a first photoresist; D, xiΐ f A second type of conductive ions are implanted into the semiconductor substrate to form a plurality of regions with the second type of conductivity on the surface of the first part, which are formed by a second photoresist; An oxide layer on the surface of the plurality of recessed portions and the plurality of convex portions heats the plurality of removed second type conductive regions of the oxide layer to form the buried layer; and forms a surface of a layer. To fill the plurality of concave portions and cover the plurality of convex portions, wherein the first-type conductivity is described above, wherein the second-type conductivity is described above, the ions of the method according to the first item of the patent application include BF2 + ions. 1 ‘Ion as in Method 1 of the scope of patent application 2 The ions include P ions. 449858 VI. Application for patent scope 4 "7ΛSpecial Circumference s) Second T-method 'where the above-mentioned oxide layer contains four degrees approximately m, please the method of the 11th member of the patent scope', which makes the above-mentioned oxide layer 300 Angstroms thick. 6. The method according to item 丨 of the scope of patent application, wherein the above-mentioned heating step is a heating process. 7 * The method according to item 1 of the scope of patent application, wherein the silicon layer formed above includes a worm crystal layer. Includes: Species in semiconductor devices The method of forming a plurality of buried layers includes at least providing a semiconductor substrate; first implanting a first-type conductive ion into the semiconductor substrate to form a first-type conductive layer on the semiconductor substrate; Under the surface of the material;-forming a first photoresist with a specific pattern on the surface of the semiconductor substrate as an etching mask; etching the semiconductor substrate to form a plurality of concave portions and a plurality of convex portions, by virtue of the first photoresist Forming; removing the first photoresist; forming a second photoresist to cover the plurality of the convex portions; Page 12Η 4 9 85q VI. Patent application scope Second implantation-first removing the surface of the second photoresist; depositing an oxide layer on the surface of the plurality of concave portions and the plurality of convex portions and the plurality of second type conductive To form the buried layer; to remove the oxide layer; and to form a partial surface: a silicon core * really fills it, a plurality of recesses m In the above, the first-type conductive ions include bf2 + ions. ι〇. If the method of claim 8 of the scope of patent application, sexual ions include p ions. ^ The method of the first type of neodymium battery 1 on the 8th item of the scope of the second patent, "The above-mentioned oxide layer includes a tetraethyl-based silicate (TEOS) oxide layer. 12. If the 8th item of the scope of patent application is about 30 0 〇 angstrom. 'Method, wherein the thickness of the above-mentioned oxide layer 13. The method according to item 8 of the scope of the patent application, wherein the heating step package is on page 13 449858 Page 14