TW444258B - Manufacturing method of printed bump on semiconductor wafer or substrate - Google Patents

Manufacturing method of printed bump on semiconductor wafer or substrate Download PDF

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Publication number
TW444258B
TW444258B TW089108707A TW89108707A TW444258B TW 444258 B TW444258 B TW 444258B TW 089108707 A TW089108707 A TW 089108707A TW 89108707 A TW89108707 A TW 89108707A TW 444258 B TW444258 B TW 444258B
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Taiwan
Prior art keywords
tin
synthetic tape
substrate
solder
solder paste
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Application number
TW089108707A
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Chinese (zh)
Inventor
Wen-Le Shie
Yung-Cheng Chuang
Ning Huang
Hui-Pin Chen
Hua-Wen Chiang
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Orient Semiconductor Elect Ltd
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Application filed by Orient Semiconductor Elect Ltd filed Critical Orient Semiconductor Elect Ltd
Priority to TW089108707A priority Critical patent/TW444258B/en
Priority to FR0012908A priority patent/FR2808620A1/en
Priority to DE10050487A priority patent/DE10050487A1/en
Priority to JP2000332837A priority patent/JP2001319942A/en
Application granted granted Critical
Publication of TW444258B publication Critical patent/TW444258B/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1216—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by screen printing or stencil printing
    • H05K3/1225—Screens or stencils; Holders therefor
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
    • H01L2224/05572—Disposition the external layer being disposed in a recess of the surface the external layer extending out of an opening
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/1147—Manufacturing methods using a lift-off mask
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

The present invention is a manufacturing method of printed bump on semiconductor wafer or substrate, mainly by using a heat-resistive, good stability composite tape to cover it during the fabrication of the wafer surface or printing bumps on the substrate. Punch a hole on the composite tape at the appropriate position of the corresponding under-bump metal (UBM) layer by laser light, followed by brushing and filling the solder paste (solder materials such as fine Sn-Pb particles, etc.) by using the brush plate, process with high temperature reflow to melt the solder paste and then solidify it to become solder bump, tear off the composite tape, leave only the solder bump, and form ball bumping directly on the UBM layer of the wafer surface (or substrate) after the second high temperature reflow.

Description

4442 5 8 _____----— _ 五、發明說明（1) 發明領域： 本發明係/種半導艘晶圓或基板上印刷凸塊之製造方 法’主要係以合成勝帶貼在晶圓表面（或基板）上，以雷射 在該合成膠帶適當位置打孔，形成一在晶圓（或基板）的 (接點）位置上方開有凹洞之合成膠帶，續以刷板將錫膏填 入孔洞位置，經高溫迴銲處理使錫膏溶化成銲錠後，再撕 去該合成膠帶’經第二次高溫迴焊處理後形成球。 習知技藝： 新一代的高階封裝技術以球柵陣列搆裝（Bal卜Grid-Array ，BGA) 、 晶片尺 寸構襄 （chip-Size/Scale-Package， CSP)、覆晶（Flip〜Chip)技術為主流，而這些技術主要以 覆晶構裝技術為基礎。廣義的覆晶構裝技術泛指將晶片翻 轉後’以面朝下的方式透過金屬導體與基板（substrate) ’進行接合。一般而言，金屬導體以金屬凸塊（metal bump )的技術較成熟，亦被廣泛使用於量產的產品之中， 其金屬凸塊成形方法中的低成本植球技術（low cost bumping technology) 應用無 電鍍鎳 / 金 （electroless Ni/Au) 形成ώ塊下方金屬層（under bump metallurgy，UBM)再配 合印刷的方式植球，其習知主要製程示意如下：4442 5 8 _____----— _ V. Description of the invention (1) Field of the invention: The present invention is a method / manufacturing method for printing bumps on semi-conductor wafers or substrates. On the surface (or substrate), a laser is used to punch holes in the synthetic tape to form a synthetic tape with a recess above the (contact) position of the wafer (or substrate). Fill the hole position, melt the solder paste into a solder ingot after high-temperature reflow treatment, and then tear off the synthetic tape to form a ball after the second high-temperature reflow treatment. Know-how: The new generation of high-level packaging technology uses ball grid array (BGA), chip-size / scale-package (CSP), flip-chip (Flip ~ Chip) technology As the mainstream, these technologies are mainly based on flip chip assembly technology. In a broad sense, the flip-chip mounting technology generally refers to a method of bonding a substrate through a metal conductor and turning it face down through a metal surface. Generally speaking, the technology of metal bumps for metal conductors is more mature and is also widely used in mass-produced products. Its low cost bumping technology is used in metal bump forming methods. The electroless Ni / Au is used to form an under bump metallurgy (UBM), and the ball is planted in combination with printing. The conventional main process is as follows:

請參閱第la〜lh圖，先在晶圖（wafer)l的表面的鋁 (Al)ll上應用無電鍍鎳/金來形成UBM層1 2 ;在晶圓表面覆 上一廣先阻劑（photo-resist)2並予以預熱；在晶圓上方 以適當的罩遮（Mask)3阻隔並施以曝光顯影成像，使在UBMPlease refer to FIGS. 1a to 1h, first apply electroless nickel / gold on the aluminum (Al) 11 on the surface of the wafer 1 to form the UBM layer 1 2; cover the surface of the wafer with a wide-ranging resist ( photo-resist) 2 and preheating; block with a suitable mask (Mask) 3 above the wafer and apply exposure and development imaging, so that

第6頁 4442 5 8 五、發明說明（2) 層位置上形成盲孔2 1 ;續利用刷板4將錫膏5刷填入盲孔 内，經高溫迴焊使錫貪融成錫錠6，再將該光阻劑以化學 藥劑去除後並清洗，僅留下晶圓上凸起之錫錠，經第二次-高溫迴焊處理後該錫錠即形成球形之錫球7。 此種習知的凸塊成形製程在覆蓋光阻劑、光微影成像及 去除光阻劑的過程皆有缺點：首先，該光阻劑，在覆蓋後 需要花費乾硬時間；另，在光微影成像過程時必須另外製 作定位成像的光罩，亦加重製造成本；又在第一次迴焊處 理後，其光阻劑須以化學或物理方式去除，整個程序又更 為繁瑣，更為費時；而對任何一個產業來說，費時就是花 費金錢。 針對上述習知製程的缺點，本發明應用一新穎製程，將 可有效精簡製程，且維持生產成本。 本發明之首要目的係在於本發明採用耐熱性、安定性佳 之合成膠帶來取代光阻劑，覆蓋過程簡單，可快速貼在晶 圓表面，並以程式控制雷射定位打孔，經印刷錫膏、高溫 迴焊後，直接撕去膠帶即可進行第二次迴焊，可有效地精 簡多道製程，節省時間並維持固態作業，不須浪費時間等 待化學藥劑的清洗、風乾時間。 本發明亦可應用在如球柵陣列（BGA)等基板（Substrate) 上的金屬凸塊成形及銲料的被覆製程。 為闌明本發明之使用原理，及該上述目的如何被達到， 茲配合簡單圖式說明如后：Page 6 4442 5 8 V. Description of the invention (2) Blind holes 2 1 are formed at the position of the layer; Continue to use the brush plate 4 to fill the solder paste 5 into the blind holes, and then remelt the tin into tin ingots 6 by high temperature re-soldering. Then, the photoresist is removed by chemical agents and cleaned, leaving only the raised tin ingots on the wafer. After the second-high temperature reflow treatment, the tin ingots form spherical tin balls 7. This conventional bump forming process has disadvantages in the process of covering the photoresist, photolithography imaging, and removing the photoresist: first, the photoresist requires hard time after covering; in addition, the photoresist In the lithography imaging process, a positioning mask must be separately produced, which also increases the manufacturing cost. After the first reflow process, the photoresist must be removed chemically or physically, and the entire process is more complicated and more complicated. Time-consuming; for any industry, time-consuming means spending money. In view of the shortcomings of the conventional process, the present invention applies a novel process, which can effectively streamline the process and maintain production costs. The primary purpose of the present invention is that the present invention uses a heat-resistant and stable synthetic tape to replace the photoresist. The covering process is simple, it can be quickly attached to the wafer surface, and the laser can be positioned and punched by program control. 2. After high-temperature reflow, you can directly peel off the tape to perform the second reflow, which can effectively streamline multiple processes, save time and maintain solid-state operations, without wasting time waiting for cleaning and air-drying time of chemicals. The invention can also be applied to metal bump forming and solder coating processes on a substrate such as a ball grid array (BGA). In order to clarify the principle of use of the present invention, and how the above-mentioned object can be achieved, the following is explained with a simple diagram:

4442 5 8 五、發明說明（3) 具體實施例： 本發明係一種半導艘晶蘭成美柄 土尨，、，人L戒他瓶晶圓或暴板上印刷凸塊之製造方 法，係以合成膠帶貼在晶圃表面 „ Λ ” β * * 衣 从雷射穿孔方式形成凹 洞，續以刷板將錫音埴Λ文丨；^ Μ φ * _ .. ^ Λ 填入孔洞位置，經高溫迴銲處理使錫 Λ ^ 例方邊口風跟帶，經第二次高溫迴焊 處理後形成球之製程。 請參照第2 a〜2 h圖所示，其製程為· 晶的表面的銘（Α1)Π上應用無電錄媒/金來形成 UBM層12(第2 a圖示出）。 b·在晶圓1表面復貼合成膠帶2a(第2b圖示出）。 t ί ί ί雅，2β上方適當位里（相対於ϋΒΜ層12位置），施 以雷射穿孔（第2c圖示出）。 d.經雷射穿孔後，在合成膠帶23打出盲孔仏丨（第2d圖示 出）° )内（第2 e圖示出） f圖示出）。 下晶圓1上凸起之錫 e 利用刷板4將錫紊5刷填入盲孔（2a j f. 經高溫迴焊使錫膏5融成錫錠6(第2 g. 再將該合成膠帶2a直接撕去，僅留 键6(第2g圖示出）。 h，經第二次高溫迴焊處理後， 球形之锡球7。 該踢錠6即在UBM層12上形成 然，本發明不限於應用無電鍍鎳/金來形成層1 2，應 用其他方法形成DBM層12者亦可適用。 據此製程，在製程b時直接在晶圓1上貼上合成膠帶“， 快速方便，並在製程c時以雷射穿孔方式直接在合成膠4442 5 8 V. Description of the invention (3) Specific embodiments: The present invention is a method for manufacturing semi-conductor crystal orchids with beautiful handles, and manufacturing methods for printing bumps on wafers or boards on L or other bottles. Synthetic tape is attached to the surface of the crystal garden „Λ” β * * The clothing forms a cavity from the laser perforation method, and the tin sound 埴 Λ 文 丨 is continued with a brush plate; ^ Μ φ * _ .. ^ Λ is filled into the hole position. The process of high temperature re-soldering process to make tin Λ ^ square side mouth wind heel belt to form a ball after the second high temperature re-soldering process. Please refer to Figures 2a to 2h. The process is as follows: The UBM layer 12 is formed by applying electroless recording medium / gold on the inscription (A1) on the surface of the crystal (shown in Figure 2a). b. A synthetic tape 2a is applied to the surface of the wafer 1 (shown in FIG. 2b). t ί ί 雅, in the appropriate position above 2β (relative to position 12 of the ϋBM layer), laser perforation is performed (shown in Figure 2c). d. After perforating by laser, punch a blind hole (shown in Fig. 2d) °) in the synthetic tape 23 (shown in Fig. 2e). The raised tin e on the lower wafer 1 is used to fill the tin holes 5 with the brush plate 4 into the blind holes (2a j f. The solder paste 5 is melted into a tin ingot 6 by high temperature reflow soldering (second g. The adhesive tape 2a is directly torn off, leaving only the key 6 (shown in Fig. 2g). H, after the second high-temperature reflow treatment, the spherical tin ball 7. The kick ingot 6 is formed on the UBM layer 12 The invention is not limited to the use of electroless nickel / gold to form layer 12, and other methods to form DBM layer 12 are also applicable. According to this process, a synthetic tape is directly attached to wafer 1 during process b. And in the process c, the laser perforation is directly applied to the synthetic rubber.

第8頁 Η 4442 5 8 五，發明說明（4) 帶2a上打孔，並在迴焊後直接撕去合成膠帶以後，即可進 行二次迴焊處理，整個製程直接快速，可大量節省製作時 間。 另外’本發明亦可套用在基板（subst )的凸塊及銲 料被復製作（bumping)，其製裎如下（請參照第3 a〜3 h 圖）： a. 在基板8上形成銅線路82(第3a圖示出）。 b. 以合成膠帶83復貼在該基板8上（第3 b圖示出）。 c_在合成膠帶83上方適當位置（相對於銅線路μ位置），施 以雷射穿扎（第3c圈示出 d·經雷射穿孔後’在合成膠帶83打出盲孔831(第3d圖示 出）。 e.利用刷板84將錫膏85刷填入盲孔（831)内（第3 e圖示 出）。 ί·經高溫迴焊使錫膏85融成錫錠86(第3f圖示出）。 g·再將該合成膠帶83直接撕去，僅留下基板8上a起之錫 錠86(第3g圖示出 h‘經第二次高溫迴焊處理後’該錫錠86即在銅塊83上形成 球形之錫球8 7或銲料被復。 雖然本發明以一較佳實施例揭露如上，然其並非用以限 定本發明，任何熟習此項技藝者’在不脫離本發明之精抻 和範圍内，當可作各種更動與潤飾，因此本發明之保護範 圍應同時參酌後附之申請專利範圍所界定者。Page 8Η 4442 5 8 V. Description of the invention (4) After punching holes on 2a and directly tearing off the synthetic tape after reflow, the second reflow process can be performed. The whole process is direct and fast, which can save a lot of production. time. In addition, the present invention can also be applied to bumps and solders of substrates (bumping), and the system is as follows (please refer to Figures 3a to 3h): a. Forming copper wiring 82 on substrate 8 (Figure 3a). b. Apply synthetic tape 83 to the substrate 8 (shown in Figure 3b). c_Laser penetration is applied at a suitable position above the synthetic tape 83 (relative to the position of the copper line μ) (circle 3c shows d. After laser perforation ', a blind hole 831 is punched in the synthetic tape 83 (Figure 3d (Shown). E. Use the brush plate 84 to fill the solder paste 85 into the blind hole (831) (shown in Figure 3e). Ί · The solder paste 85 is melted into a tin ingot 86 (3f G) The synthetic adhesive tape 83 is directly torn off, leaving only the tin ingot 86 starting from a on the substrate 8 (Figure 3g shows h 'after the second high-temperature re-soldering process.' 86 is to form a spherical tin ball 87 or solder on the copper block 83. Although the present invention is disclosed above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art will not leave Within the spirit and scope of the present invention, various modifications and retouching can be made. Therefore, the protection scope of the present invention should also refer to those defined by the scope of the attached patent application.

4 442 5 8 围式簡單說明 第1 a〜1 h圖係習知晶圓金屬凸塊成形製程示意圖。 第2a〜2h圖係本發明之晶圓金屬凸塊成形製程示意圖。 第3a〜3h圖係本發明之另一（基板之銅接點植球製程）實 施例。 各圖式所用符號說明： 1. 晶園 ί ί 鋁4 442 5 8 Brief description of the enclosing type Figures 1a to 1h are schematic diagrams of the conventional wafer metal bump forming process. Figures 2a to 2h are schematic diagrams of the wafer metal bump forming process of the present invention. Figures 3a to 3h are another embodiment of the present invention (the process of implanting the copper contacts on the substrate). Explanation of symbols used in each drawing: 1. Crystal Garden ί ί Aluminum

12. 凸塊下方金屬層；UBM 13. 聚地亞銨；polyimide 14. 碎；silicon 2. 光阻劑 2 1 .盲孔 2a.合成膠帶 2 a 1 .盲孔 3. 罩遮 4. 刷板 5. 錄膏 6. 錫錢 7. 錫球 8. 基板 81.聚酿亞銨（polyimide)層 8 2.銅線路 83.合成膠帶12. Metal layer under the bump; UBM 13. Polyimide; polyimide 14. Broken; silicon 2. Photoresist 2 1. Blind hole 2a. Synthetic tape 2 a 1. Blind hole 3. Cover 4. Brush plate 5. Recording paste 6. Tin money 7. Tin ball 8. Substrate 81. Polyimide layer 8 2. Copper circuit 83. Synthetic tape

第10頁 4442 5 8Page 10 4442 5 8

Claims (1)

4442 5 8 六、申請專利範圍 1. 一種半導體晶圓上印刷凸塊之製造方法，係以合成膠帶 貼在晶圓表面，以雷射穿孔方式形成凹洞，續以刷板將錫 奢填入孔洞位置，經高溫迴銲處理使錫膏溶化成銲錠後， 再撕去該合成膠帶，經第二次高溫迴焊處理後形成錫球， 其製程為： a. 在晶圓的表面的鋁上形成凸塊下方金屬層； b. 在晶圓表面覆貼合成膠帶； c. 在合成膠帶上方適當位置，施以雷射穿孔； d. 經雷射穿孔後，在合成膠帶打出盲孔； e. 利用刷板將錫膏刷填入盲孔内； f. 經高溫迴焊使錫f融成錫錠； g. 再將該合成膠帶直接撕去，僅留下晶圆上凸起之錫錠； h. 經第二次高溫迴焊處理後，該錫錠即在凸塊下方金屬層 上形成球形之錫球者。 2. —種半導體基板上印刷凸塊之製造方法，係以合成膠帶 貼在基板表面，以雷射穿孔方式形成凹洞，續以刷板將錫 膏填入孔洞位置，經高溫迴銲處理使錫膏溶化成銲錠後， 再撕去該合成膠帶，經第二次高溫迴焊處理後形成錫球， 其製程為： a. 在基板上形成銅線路； b. 以合成膠帶覆貼在該基板上； c. 在合成膠帶上方適當位置，施以雷射穿孔； d. 經雷射穿孔後，在合成膠帶打出盲孔； e. 利用刷板將錫膏刷填入盲孔内；4442 5 8 VI. Application for Patent Scope 1. A method for manufacturing printed bumps on semiconductor wafers. A synthetic tape is attached to the surface of the wafer, a cavity is formed by laser perforation, and tin is filled with a brush. At the hole position, after the solder paste is melted into a solder ingot after high temperature reflow treatment, the synthetic tape is torn off, and a solder ball is formed after the second high temperature reflow treatment. The process is: a. Aluminum on the surface of the wafer A metal layer under the bump is formed on the surface; b. Overlay the synthetic tape on the wafer surface; c. Apply laser perforation at an appropriate position above the synthetic tape; d. After the laser perforation, make a blind hole in the synthetic tape; e Fill the solder paste into the blind hole with a brush plate; f. Melt the tin f into a tin ingot by high temperature reflow; g. Tear off the synthetic tape directly, leaving only the raised tin ingot on the wafer H. After the second high-temperature reflow treatment, the tin ingot forms a spherical tin ball on the metal layer under the bump. 2. —A method for manufacturing printed bumps on a semiconductor substrate, which is affixed with synthetic tape on the surface of the substrate, forms a cavity by laser perforation, and then fills the solder paste into the hole position with a brush plate, which is processed by high-temperature resoldering. After the solder paste melts into a solder ingot, the synthetic tape is then torn off, and a solder ball is formed after a second high-temperature resoldering process. The process is: a. Forming a copper circuit on the substrate; b. Overlaying the synthetic tape on the On the substrate; c. Apply laser perforation at an appropriate position above the synthetic tape; d. After the laser perforation, make a blind hole in the synthetic tape; e. Use a brush plate to fill the solder paste into the blind hole; 第12頁 μ- ^ ο ¢5 "42 5 8 ’ 六、申請專利範圍 f. 經高溫迴焊使錫膏融成錫錠： g. 再將該合成膠帶直接撕去*僅留下基板上凸起之錫錠： h. 經第二次高溫迴焊處理後，該錫錠即在銅塊上形成球形-之錫球者。Page 12 μ- ^ ο ¢ 5 " 42 5 8 '6. Scope of patent application f. The solder paste is melted into a tin ingot by high temperature reflow soldering: g. Then the synthetic tape is torn off directly * Only the substrate is left Raised tin ingots: h. After the second high temperature reflow treatment, the tin ingots form spherical-tin balls on copper blocks. 第13頁Page 13
TW089108707A 2000-05-04 2000-05-04 Manufacturing method of printed bump on semiconductor wafer or substrate TW444258B (en)

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TW089108707A TW444258B (en) 2000-05-04 2000-05-04 Manufacturing method of printed bump on semiconductor wafer or substrate
FR0012908A FR2808620A1 (en) 2000-05-04 2000-10-10 Method for structuring wafers or substrates using UBM layer technology, involves adhering plastics strip to surface of wafer and punching holes using laser through plastic band, above UBM layer
DE10050487A DE10050487A1 (en) 2000-05-04 2000-10-12 Method for structuring wafers or substrates using UBM layer technology, involves adhering plastics strip to surface of wafer and punching holes using laser through plastic band, above UBM layer
JP2000332837A JP2001319942A (en) 2000-05-04 2000-10-31 Manufacturing method of semiconductor device

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US8779587B2 (en) 2008-09-16 2014-07-15 Agere Systems Llc PB-free solder bumps with improved mechanical properties

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US6998539B2 (en) * 2003-05-27 2006-02-14 Xerox Corporation Standoff/mask structure for electrical interconnect
CN103915355B (en) * 2013-12-05 2017-01-25 通富微电子股份有限公司 Package structure forming method

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US5539153A (en) * 1994-08-08 1996-07-23 Hewlett-Packard Company Method of bumping substrates by contained paste deposition

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Publication number Priority date Publication date Assignee Title
US8779587B2 (en) 2008-09-16 2014-07-15 Agere Systems Llc PB-free solder bumps with improved mechanical properties
US9443821B2 (en) 2008-09-16 2016-09-13 Avago Technologies General Ip (Singapore) Pte. Ltd. Pb-free solder bumps with improved mechanical properties

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