TW434734B - The method to control the etching parameter in-situ - Google Patents

The method to control the etching parameter in-situ Download PDF

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Publication number
TW434734B
TW434734B TW89100143A TW89100143A TW434734B TW 434734 B TW434734 B TW 434734B TW 89100143 A TW89100143 A TW 89100143A TW 89100143 A TW89100143 A TW 89100143A TW 434734 B TW434734 B TW 434734B
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Taiwan
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pattern
patent application
scope
feature
etching
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TW89100143A
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Chinese (zh)
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Hun-Jan Tao
Chia-Shiung Tsai
Anthony Yen
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Taiwan Semiconductor Mfg
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Abstract

The present invention provides a method to control the etching parameter in-situ to determine the etching parameters for etching a wafer, wherein the surface of the wafer is covered with a screening layer which forms a main pattern transferred to the wafer by using the screening layer as the mask for etching. The characteristic of this method is: forming a featured pattern before etching, which shows the featured dimension of the main pattern; use a light source to illuminate the featured pattern to obtain the featured dimension by detecting the diffracted light; determine the etching parameters based on the featured dimension.

Description

434734 五、發明說明(1) 本發明係有關於一種蝕刻方法,特別有關於一種在系 統内(in-situ)控制線寬與介電層蝕刻的方法,可以單獨 針對每一個晶圓進行姓刻程式(etching recipe)之參數調 整,同時也可以在蝕刻完成後直接在系統内量測出特徵尺 寸(CD)" 在0 · 1 8微米或更小尺寸之製程中,每一片晶圓間之線 寬控制是十分困難的。同時,如在製作接觸窗時,介電層 餘刻之終止點亦非常不容易判斷。傳統上均使用預先量測 之線寬或介電層厚度以前饋式(feedforward)之控制方法 決定姓刻程式中之參數以進行餘刻。但此種方法卻會因晶 圓重置時的誤差而很難避免發生錯誤。此外,由於現今自 動化系統具有以下兩點限制,所以只能夠得到每一批晶圓 之平均ADI值。第一 ’要取得一片晶圓之AIH值需要6〇秒 鐘’非常費時;第二,由於晶圓在整個製程中之放置順序 不一定’所以即使取得了每一片晶圓之AM值,也很難正 確地將每一 AD I值使用在每—相對之晶圓上。 為了解決上述問題,本發明之一目的即在提供一種系 統内控制蝕刻參數的方法,可以單獨針對每一個晶圓進行 敍刻程式之參數調整,同時也可以在蝕刻完成後直接在系 統内量測出特徵尺寸。 本發明提供一種系統内控制蝕刻參數的方法,用以在 對BB圓進行蝕刻時決定其蝕刻參數,其中該晶圓表面覆 有遮蔽層,該遮蔽層形成一主圖案,經由以該遮蔽層為 遮罩進行蝕刻而轉移至該晶圓上。該方法之特徵在於:進434734 V. Description of the invention (1) The present invention relates to an etching method, and in particular to a method for controlling line width and dielectric layer etching in a system (in-situ), which can be individually engraved for each wafer. The parameters of the etching recipe can be adjusted. At the same time, the feature size (CD) can also be measured directly in the system after the etching is completed. In the process of 0 · 18 microns or smaller, Line width control is very difficult. At the same time, if the contact window is made, it is very difficult to judge the termination point of the dielectric layer. Traditionally, a pre-measured line width or dielectric layer thickness feedforward control method is used to determine the parameters in the last name engraving program for the remainder. However, this method is difficult to avoid errors due to errors in wafer reset. In addition, due to the following two limitations of today's automation systems, only the average ADI value of each wafer can be obtained. The first "It takes 60 seconds to obtain the AIH value of a wafer" is very time-consuming; the second, because the order in which the wafers are placed in the entire process is not necessarily "so even if the AM value of each wafer is obtained, it is very It is difficult to correctly use each AD I value on each relative wafer. In order to solve the above problems, an object of the present invention is to provide a method for controlling etching parameters in a system, which can individually adjust the parameters of the engraving program for each wafer, and can also measure directly in the system after the etching is completed. Out feature size. The invention provides a method for controlling etching parameters in a system for determining the etching parameters of an BB circle. The wafer surface is covered with a shielding layer, and the shielding layer forms a main pattern. The mask is etched and transferred onto the wafer. The method is characterized by:

434734 五、發明說明(2) ' 行飯刻前,在該遮蔽層上形成一特徵圖案,該特徵圖案顯 現该主圖案之特徵尺寸;使用一光源照射該特徵圖案,藉 由搞測其衍射光(di f f racted 1 ight)而得到該特徵尺寸; 依據該特徵尺寸決定該蝕刻參數。 其中’該遮蔽層係使用一具有該特徵圖案之光罩為罩 幕進行曝光’而在顯影後將該特徵圖案轉移至該遮蔽層 上。該特徵圖案係一等寬間隔之線條狀圖案或方形空洞 狀。相對地’該特徵尺寸係線寬或蝕刻深度^在本發明之 方法中,係使用一干涉儀以該光源照射該特徵圖案而藉由 偵測其衍射光而得到該特徵尺寸。該光源係一二極雷射光 源或極化寬頻白光源。 又其中更包括在完成蝕刻後,再於系統内進行蝕刻後 之特徵尺寸量測。 因此’在本發明之系統内控制蝕刻參數的方法中,由 於增加一特徵圖案,並使用一光學儀器直接取得特徵尺 寸,其速度較快之特性使得進行触刻時可以在系統内針對 每一晶圓進行蝕刻程式之參數調整,同時在完成蝕刻後亦 可利用同樣的方法測得蝕刻後之尺寸。 為讓本發明之上述目的、特徵及優點能更明顯易僅,434734 V. Description of the invention (2) 'Before the meal, a feature pattern is formed on the shielding layer, and the feature pattern shows the feature size of the main pattern; the feature pattern is illuminated with a light source, and its diffracted light is measured (Di ff racted 1 ight) to obtain the feature size; determine the etching parameters according to the feature size. Among them, "the shielding layer is exposed using a mask having the characteristic pattern as a mask", and the characteristic pattern is transferred to the shielding layer after development. The characteristic pattern is a line-like pattern or a square hollow shape with equal width intervals. In contrast, the feature size is a line width or an etching depth ^ In the method of the present invention, an interferometer is used to irradiate the feature pattern with the light source, and the feature size is obtained by detecting its diffracted light. The light source is a two-pole laser light source or a polarized broadband white light source. It also includes measuring the feature size after etching in the system after the etching is completed. Therefore, in the method for controlling etching parameters in the system of the present invention, since a feature pattern is added and an optical instrument is used to directly obtain the feature size, its fast speed makes it possible for each crystal in the system to be etched. The parameters of the etching program are adjusted in a circle. At the same time, the size after etching can be measured by the same method after the etching is completed. In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy,

下文特舉較佳實施例’並配合所附圖式,作詳細說明如 下C 圖式簡單說明 圖1係本發明一實施例中控制蝕刻參數方法之流程 圖;The following is a detailed description of the preferred embodiment ′ and the accompanying drawings, which will be described in detail below. The C diagram is briefly explained. FIG. 1 is a flowchart of a method for controlling etching parameters in an embodiment of the present invention.

麵 434734 五、發明說明(3) 圖2係本發明一實施例中在遮蔽層上之特徵圖案; 圖3係本發明另一實施例中在遮蔽層上之特徵圖案。 實施例 圖1係本實施例中控制蝕刻參數方法之流程圖。此處 以0. 1 3 y m製程在晶圓上形成線條狀之多晶矽層為例。 首先’在步驟10 ’在一矽晶圓上形成一光阻材料所構 成之遮蔽層。 在步驟20 ’提供一光罩,此光罩上除具有原來欲在晶 圓上形成之主圖案外,尚具有一特徵圖案,如圖2所示。 此特徵圖案係一等寬間隔線條狀(peri〇dj_c grating structure)之圖案’其所佔面積約為5〇 x 50 //m, 1 ine/space = 0. 1 3 m/0. 1 8 //m。 在步驟30,使用上述光罩對該晶圓進行曝光及顯影, 使主圖案及特徵圖案轉移至晶圓上之遮蔽層。 在步騾40,使用一安裝於蝕刻機(etcher)中之干涉儀 (interferometer)發出一光源,照射該晶圓上特徵圖案區 域,並偵測其衍射光,藉由衍射光之光學性質獲得相對之 特徵尺寸資料。再將此資料輸入至蝕刻程式中以調整蝕刻 參數’如餘刻時間。其中,干涉儀可安裝於蝕刻機之蝕刻 箱(etching chamber)、定位器(orientor)或是專設之量 測箱(extra measurement chamber)。光源亦可以是二極 雷射光源(diode laser)或是極化寬頻白光源(p〇iarized broadband white light ’ 波長為 240nm 至 800nm)。在使用434734 V. Description of the invention (3) FIG. 2 is a characteristic pattern on a shielding layer in an embodiment of the present invention; FIG. 3 is a characteristic pattern on a shielding layer in another embodiment of the present invention. Embodiment FIG. 1 is a flowchart of a method for controlling etching parameters in this embodiment. Here, a line-shaped polycrystalline silicon layer is formed on a wafer by using a 0.1 3 μm process as an example. First, in step 10, a masking layer made of a photoresist material is formed on a silicon wafer. At step 20 ', a photomask is provided. In addition to the main pattern originally intended to be formed on the wafer, the photomask also has a characteristic pattern, as shown in FIG. This feature pattern is a pattern with a constant width interval line (periodj_c grating structure), which occupies an area of about 50 × 50 // m, 1 ine / space = 0.1 3 m / 0. 1 8 / / m. In step 30, the wafer is exposed and developed using the photomask, so that the main pattern and the feature pattern are transferred to a shielding layer on the wafer. In step 40, an interferometer installed in an etcher is used to emit a light source to illuminate the characteristic pattern area on the wafer and detect its diffracted light. The relative properties of the diffracted light are used to obtain The characteristic size data. Then input this data into the etching program to adjust the etching parameters ’such as the remaining time. Among them, the interferometer can be installed in an etching chamber (etching chamber), an orientation (orientor) or a special extra measurement chamber of an etching machine. The light source can also be a diode laser or a polarized broadband white light (wavelength 240nm to 800nm). In use

434734 五、發明說明(4) 二極雷射光源之情形下,會產不同級(order )之衍射光’ 所取得之資料將使用標準2-Θ衍射法進行分析。而在使用 極化寬頻白光源之情形下,僅產生〇級之衍射光,可使用 標準鏡射分光法進行分析。步驟40可針對每一片晶圓重複 執行以進行單一晶圓的钱刻參數調整》 在步驟5 0 ’以調整後之蝕刻參數對晶圓進行蝕刻。 最後’在步驟60 ’於完成蝕刻後直接於系統進行你到 後之特徵尺寸量測。 此外’上述之流程亦可使用於接觸窗之製造中’所使 用之特徵圖案如圖3所示。此特徵圖案係一面積約為50 =50 β"1之方形空洞(wide 〇pen)圖案。而所取得之特徵尺 寸即為介電層之厚度。 本發明雖已以較佳實施例揭露如上,但其並非用以限 發明°任何熟悉此技藝者,在不脫離本發明之精神和 範圍内,杏i , ^ 田了做些許之更動與潤飾。因此本發明之保護乾 Μ視後附之申請專利範圍所界定者為準。434734 V. Description of the invention (4) In the case of a diode laser light source, diffracted light of different orders will be produced. The data obtained will be analyzed using the standard 2-Θ diffraction method. In the case of using a polarized broadband white light source, only diffracted light of order 0 is generated, which can be analyzed by standard spectroscopic spectrometry. Step 40 may be repeatedly performed for each wafer to adjust the engraving parameters of a single wafer. "At step 50 ', the wafer is etched with the adjusted etching parameters. Finally, at step 60, after the etching is completed, the feature size measurement is performed directly in the system. In addition, the above-mentioned process can also be used in the production of contact windows. This characteristic pattern is a wide hollow pattern with an area of about 50 = 50 β " 1. The characteristic size obtained is the thickness of the dielectric layer. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the invention. Anyone familiar with the art can make some changes and decorations without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention is determined by the scope of the attached patent application.

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Claims (1)

43^73443 ^ 734 六、申請專利範圍 1. 一種系統内控制蝕刻參數的方法,用以在對一晶圓 進行蝕刻時決定其蝕刻參數,其中該晶圓表面覆有一遮蔽 層’該遮蔽層形成一主圖案,經由以該遮蔽層為遮罩進行 敍刻而轉移至該晶圓上,該方法之特徵在於: 進行蝕刻前’在該遮蔽層上形成一特徵圖案,該特徵 圖索顯現該主圖案之特徵尺寸; 使用一光源照射該特徵圖案,藉由偵測其衍射光而得 到該特徵尺寸; 依據該特徵尺寸決定該蝕刻參數。 2. 如申請專利範圍第1項所述之方法,其中該遮蔽層 係經由曝光及顯影步驟而形成該主圖案。 3. 如申請專利範圍第2項所述之方法,其中該遮蔽層 係使用一具有該主圖案之光罩為罩幕進行曝光,而在顯影 後將該主圖案轉移至該遮蔽層上。 4. 如申請專利範圍第1項所述之方法,其中該遮蔽層 係經由曝光及顯影步驟而形成該特徵圖案。 5. 如申請專利範圍第4項所述之方法,其中該遮蔽層 係使用一具有該特徵圖案之光罩為罩幕進行曝光,而在顯 影後將該特徵圖案轉移至該遮蔽層上。 6. 如申請專利範圍第1項所述之方法,其中該特徵圖 案係一等寬間隔之線條狀圖案。 7. 如申請專利範圍第1項所述之方法,其中該特徵尺 寸係線寬。 8.如申請專利範圍第1項所述之方法,其中該特徵圖6. Scope of patent application 1. A method for controlling etching parameters in a system for determining etching parameters when a wafer is etched, wherein a surface of the wafer is covered with a masking layer, the masking layer forms a main pattern, and The masking layer is used as a mask for engraving and transferred to the wafer. The method is characterized in that: before etching, a feature pattern is formed on the masking layer, and the feature map shows the feature size of the main pattern; A light source is used to illuminate the feature pattern, and the feature size is obtained by detecting its diffracted light; the etching parameter is determined according to the feature size. 2. The method according to item 1 of the scope of patent application, wherein the masking layer forms the main pattern through exposure and development steps. 3. The method according to item 2 of the scope of patent application, wherein the masking layer is exposed using a mask having the main pattern as a mask, and the main pattern is transferred to the masking layer after development. 4. The method as described in item 1 of the scope of patent application, wherein the masking layer forms the feature pattern through exposure and development steps. 5. The method according to item 4 of the scope of patent application, wherein the masking layer is exposed using a mask having the characteristic pattern as a mask, and the characteristic pattern is transferred to the masking layer after development. 6. The method according to item 1 of the scope of patent application, wherein the feature pattern is a line-shaped pattern with an equal width interval. 7. The method described in item 1 of the scope of patent application, wherein the characteristic size is a line width. 8. The method according to item 1 of the scope of patent application, wherein the feature map 434734 六、申請專利範圍 案係一方形空洞圖案。 9.如申請專利範圍第1項所述之方法’其中該特徵尺 寸係姓刻深度。 I 0.如申請專利範圍第1項所述之方法,其中係使用一 干/步儀以該光源照射該特徵圖案而藉由谓測其行射光而得 到該特徵尺寸。 ' ' II ·如申請專利範圍第1項所述 一二極雷射光源。 决’其中該光源係 12. 如申請專利範圍第1項时、丄 π所通之士·、丄 一極化寬頻白光源。 万法’其中該光源係 13. 如申請專利範圍第1項& 完成蝕刻後’再進行蝕刻後特徵 万法,其中更包括在 寸之系統内量測。434734 VI. Scope of patent application The case is a square hollow pattern. 9. The method according to item 1 of the scope of patent application, wherein the characteristic size is the depth of the last name. I 0. The method according to item 1 of the scope of patent application, wherein a feature / step meter is used to illuminate the feature pattern with the light source and obtain the feature size by measuring its traveling light. '' II · As described in item 1 of the scope of patent application-a two-pole laser light source. Decide where the light source is 12. As described in the first patent application, 丄 π, 通, a polarized broadband white light source. Wanfa ’, where the light source is 13. After applying the patent scope, & after the etching is completed, the post-etching feature Wanfa is also included, which includes measurement in a inch system.
TW89100143A 2000-01-06 2000-01-06 The method to control the etching parameter in-situ TW434734B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002077715A3 (en) * 2001-03-21 2003-05-22 Intel Corp Method of fabrication to sharpen corners of waveguide y-branches in integrated optical components

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002077715A3 (en) * 2001-03-21 2003-05-22 Intel Corp Method of fabrication to sharpen corners of waveguide y-branches in integrated optical components
US6730988B2 (en) 2001-03-21 2004-05-04 Intel Corporation Method of fabrication to sharpen corners of Y-branches in integrated optical components and other micro-devices
US6818559B2 (en) 2001-03-21 2004-11-16 Intel Corporation Method of fabrication to sharpen corners of Y-branches in integrated optical components and other micro-devices

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