TW434713B - Method for producing self-aligned silicide - Google Patents

Abstract

A method for producing a self-aligned silicide (salicide) comprises forming a gate structure on a substrate, the gate structure having a sidewall; forming a lightly doped source/drain in the substrate to define a channel in the substrate below the gate structure; forming a spacer on the sidewall of the gate structure; implanting ions into the substrate to form a heavily doped source/drain region; selectively growing an epitaxial layer on the gate structure and the heavily doped source/drain region, in which the epitaxial layer will form an epitaxial facet near the spacer; and performing a siliciding reaction between the epitaxial layer and a metal layer.

Description

434713 V. Description of the invention α) 5 -1 Field of the invention The present invention relates to a semiconductor manufacturing technique, and more particularly to a metal silicide process. 5-2 Background of the Invention

As the component size approaches one micron, the traditional contact structure will begin to affect the performance of the device due to some factors. For example, ’when the area of the source / drain region is reduced, the component contacts the thunderbolt and meets the woman. For this type of problem, various solutions have been proposed. One of them is to perform a self-leveling metallization process on the source / drain region (in this process, a gold crystallization is formed on the polycrystalline silicon gate and the source / drain region at the same time) , And the other is to make a raised source / drain region (for example, by forming a fragment on the exposed source /; and pole regions) D. Use the worm crystal to make the source / high and extremely high Production techniques have become more important lately. This technology not only provides more silicon for self-aligned metal silicide reactions, but also prevents substrate silicon from being consumed during the self-aligned metal silicide process. Therefore, the application of this technology can reduce the leakage current (because no base stone is consumed) ', especially for shallow joints. However, as shown in the first figure, when selective epitaxial silicon 102 is formed in the source / drain regions 104 and 108, pre-amorpharization

^ 347 1 ^ V. Description of the invention (2) The ions of implant (PAI) will be difficult to reach the substrate 100. This will cause the silicides 106 formed on the stone substrate 100 and the source / drain regions 104, 108 to be spaced apart by a distance of 110. This distance between 1 and 10 will be k between a silicided metal 106 and a lightly doped drain (LDD) 108 with a series of resistances (ser) es resistance (Rs) and 'low drain current (Idsat )Area. 5-3 Object and Summary of the Invention, One of the objects of the present invention is to provide a method for forming a custom alignment metal silicide on a source / drain region to solve the problems pointed out in the invention. . According to the above or other purpose silicide process. First, the structure has a sidewall. Next, the electrode region is formed in a substrate on the sidewall of the gate structure under the gate structure to form a heavily doped and heavily doped source / drain epitaxial silicon layer near the gap wall. Then, the invention of an epitaxial silicon layer is provided. A self-aligned metal is formed on a substrate to form a gate structure. The gate junction forms a lightly doped source / drain in the substrate. A substrate defines a channel region. . After that, a gap wall is formed. Then, the ions are implanted into the hetero-source / drain region β, and then an epitaxial silicon layer is selectively grown on the gate junction region, where the epitaxial silicon layer is thinner than other regions of the epitaxial silicon layer and a metal layer. Silicification reaction.

434713 V. Description of the invention (3) * " In another aspect, the present invention can be said to provide a method for processing metal-oxygen half-elements on a silicon substrate. The previous implementation of 'where the metal-oxide half element includes at least a gate oxide layer and a polycrystalline hard gate are sequentially formed on a silicon substrate, and a silicon nitride spacer is formed on the closed oxide layer and the sidewall of the polycrystalline silicon gate. And a source / drain region is formed in the silicon substrate under the silicon nitride spacer to define a channel region. First, by introducing SiH2Cl2, H2, and 11 (: 1, etc. gas in the counter-reaction zone, a silicon layer is selectively grown on the source / drain region and the polysilicon gate. &Amp; 0 to 150 s ccm, the flow rate of H2 gas is about 5 slm 'and the flow rate of HC1 gas is about 10 to 50 SCCIn. Then, a metal silicidation reaction occurs between the sand layer and a metal layer, in order to A silicided metal (s 丨 丨 丨 c 丨 de) is formed on the gate and source / drain regions. 5-4 Schematic description: The features, characteristics, and advantages can be matched with the drawings to make it clear. The above and other objects of the present invention are more obvious and easy. The following is a preferred embodiment. The details I are detailed below: The first manufacturing flowchart is shown in f. ; The use of insect stone to make the source and extremely high

The second diagram A to the second!) Diagrams show a preferred embodiment according to the present invention

434713 V. Description of the invention (4) A schematic cross-sectional view of a process for self-aligning a metal silicide process; and a third cross-sectional view showing a structure of another epitaxial silicon layer. Description of the main parts: 100 '2 0 0 substrate 1 0 2, 2 1 4, 3 1 4 epitaxial silicon layer 104 heavily doped source / drain region 106' 218 silicided metal 10 8 '2 0 2 lightly doped Heterosource / electrode area 110 distance 204 Gate structure: 2 04a Gate oxide layer 204b Polycrystalline silicon gate 2 0 6 Channel area 2 0 8 Shallow trench isolation 210 Gap wall 212 Heavy doped source / drain area 216 Figures A to D of the preferred embodiment of the stupid facet 5-4 show a preferred embodiment of the present invention.

434713 V. Description of the invention (5) Schematic sectional view of the process of self-aligning metal lithotripsy process. Referring to FIG. 2A, a silicon substrate 200 is provided. A gate structure 20 4 having a sidewall is formed on the silicon substrate 2000. The gate structure 204 includes a gate oxide layer 2 0 4 a. It is formed on a silicon substrate 200, and further includes a polycrystalline silicon gate 204b formed on the gate oxide layer 204a. In addition, lightly doped source / drain regions (LDDs) 202 are formed in the silicon substrate 200 under the gate structure 204 to define a channel region 206, where The lightly doped source / drain region 202 has a first / dose concentration. The gate structure 204 and the lightly doped source / inverted region 20 2 are formed between two shallow trench isolation structures 208. Referring to FIG. 2B, a gate gap wall is formed on a side wall of the gate structure 204, for example, a silicon nitride gap wall 21o. Then, using the surface and the j-gap wall 210 as a mask, a self-aligned ion implantation is performed to the base electrode 0. The heavily doped source / non-electrode region 2 1 2 ′ is formed in the heavily doped source / non-electrode region 2 1 2. First dose concentration. The above heavily doped source / drain region 2 1 2 and the above-mentioned lightly doped source / drain region 2 02 may be collectively regarded as a source / drain region. From another point of view of the present invention, 'this source / drain region is partially trapped by the above-mentioned part of the spacer 210. Referring to FIG. 2C, a layer of epitaxial silicon layer 2 14 is selectively grown on the heavily doped source / drain region 21 2 and the gate junction 04. Please compare with the third picture

Page 8 434713 V. Description of the invention (6) Compared with 'It shows another kind of epitaxial silicon layer 3 1 4 structure schematic diagram, wherein the same reference number represents the same component β Second C picture epitaxial silicon layer 2 1 4 The difference from the epitaxial silicon layer 31 4 in the third figure is that the epitaxial silicon layer 214 in the c figure is thicker in the place near the wall: 2 1 0 than the thickness of other places, and where The epitaxial silicon layer 21 4 is formed with an epitaxial facet 220 near the spacer 2 10. Please return to FIG. 2c. For the method for manufacturing the epitaxial silicon layer 214, for example, digas silane (Siii2Cl2), hydrogen (H2), and hydrogen acid (HC1) are introduced into a reaction zone. In order to be able to form the facet as described above, the elder brother must reduce the flow rate of the diazasilane gas, and increase the flow rate of the gas. This is how the gas flow rate is. The gas flow rate is about 50 to 150 sccm, the preferred hydrogen flow rate is about 5 s 1 m, and the preferred hydrogen acid gas flow rate is about 0 to 50 sccm. The above flow rate ratios help increase epitaxy. The selective growth rate of silicon on the silicon substrate 2000 is not increased on the silicon nitride spacer 2 10. This ratio is also why I can make the epitaxial silicon layer 21 4 close to the silicon nitride spacer 21 0 One of the reasons for the thinner thickness. Please refer to Figure 2D, 'Siliconizing the epitaxial silicon layer 2 1 4 and a metal layer (not shown)' until the thinner part of the epitaxial silicon layer 21 4 has completely reacted. It is completely consumed, but the other parts are only partially consumed so as to generate self-aligned metal silicide (si 1 pesticide) on the gate structure 204 and the heavily doped source / drain region 21 2. 218. At the same time, between metal silicide (metal silicide) 218 and lightly doped source / drain region 202 Smooth and formed with a shallow junction 220 'can be manufactured having a high drain current (Idsat),

434? \ 'I V. Description of the invention (7) Metal-oxygen half element without leakage current. The metal layer may be a titanium (Tiitanium) layer or a cobalt (Coba 11; Co) layer. If the metal layer is a titanium layer, it is better to perform a pre-amorphization implantation (pre-amorphization 1 mp I an t; PA I). These bombarding ions can reach the substrate 2 0 0 close to the gap wall 2 0, because the epitaxial silicon layer 2 U has a facet 2 1 6 (second C picture) near the gap wall 2 0 and is thinner . More specifically, the above-mentioned sanding reaction step may further include a metal deposition step, a heating step, and a selective removal step. In this metal deposition step, a metal layer (not shown) is formed on the substrate 200, which is prepared to form the above silicided metal. In this heating step, the elements on the substrate 2000 and the substrate 200 are heated 'so that the silicidation reaction occurs where the metal layer is in contact with silicon, and there is no reaction where there is no contact with silicon. In this selective removal step, the unreacted gold layer is removed with an etching agent (e t chan t) that does not etch the silicided metal 218, the silicon substrate 200, and the spacer 2120. The end result will be that both the originally exposed gate structure 204 and the lightly doped source / drain region 202 are covered with silicide 218 ′, but there is no silicide metal elsewhere. The self-aligned salinization process described above provides at least the following advantages over the conventional salinization structure.

Page 10 434713 V. Description of the invention (8) 1. The insect crystal facet can make the generated silicided metal (s 1 11 c 1 de) naturally close to the gap wall, thus improving the step coverage ability of metal deposition. 2. Stupid facets can prevent lateral growth of silicided metals. 3. Because lateral growth of silicided metal is avoided, the contact area can be reduced, and the leakage current can be reduced. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make equivalent changes or modifications without departing from the spirit and scope of the present invention. For example, those skilled in the art can use other materials, such as silicon dioxide, to make the gate spacer of the present invention. If the above-mentioned gate gap wall is made of silicon dioxide, the formula used to form the silicon layer (epitaxial silicon layer) on the source / drain region must also be changed and adjusted accordingly to form the desired facet of the present invention. . Therefore, 'the scope of protection of the present invention' shall be determined by the scope of the appended claims.

Claims (1)

434713 VI. Scope of patent application 1. A self-aligned metal silicide process, including the following steps: forming a gate structure on a substrate, the gate structure having a sidewall t, forming a lightly doped source in a substrate And a gate region to define a channel region in the substrate under the gate structure; a gap wall is formed on the side wall of the gate structure; and the gate structure and the gap wall are used as a screen to separate ions Implanted into the substrate to form a heavily doped source / drain region; selectively growing a spar layer on the gate structure and the heavily doped source / drain region, wherein the stupid crystal The Shi Xi layer has a facet near the gap wall; and a petrified reaction between the Worm Stone Xi layer and a metal layer, so that the gate structure and the source / drain region Silicon is formed on the metal (si 1 ci de). Cheng Zhihua's silicon is a gold quasi-opposite line * § ο. The dream item of the chemical institute is the 1st grade of the material wall, the fan wall gap, please apply for the application as its 3. As described in the second item of the scope of the patent application The self-aligned metal silicide process, wherein the epitaxial silicon growth step further includes introducing a gas such as dy sium, gas, and hydrogen acid into a reaction zone. 4 · The self-aligned metal silicide process as described in item 3 of the scope of the patent application, wherein the flow rate of the Ershuangyuan is about 50 to 150 sccm, the flow rate force of the fci is 5 slm and the temperature of hydrogen is 醆The gas flow rate is about 10 to 50 sccin. IHI Page 12 43471 a 6. Scope of patent application 5. The self-aligned metal silicide process described in item 1 of the scope of patent application, wherein the metal layer is a titanium (Ti) layer. 6. The self-aligned metal silicide process described in item 1 of the scope of patent application, wherein the metal layer is a cobalt (Co) layer. 7_ The self-aligned metal silicide manufacturing process described in item 1 of the scope of the patent application ‘wherein before performing the silicidation reaction’ further includes an amorphizing step of the epitaxial layer. 8. A method for processing a metal-oxide half-element on a silicon substrate, which is performed before the metal-oxide half-element performs a self-aligned silicide process, wherein the metal-oxide half-element includes at least a gate oxide layer and a polycrystalline silicon gate. The electrodes are sequentially formed on the silicon substrate. A nitride nitride spacer is formed on the oxide layer and the side wall of the polycrystalline hard-closed electrode, and a source / drain region is formed on the silicon nitride spacer. In the Shixi substrate below, a channel region is defined to define the processing method of the gold and oxygen half-elements on the Shixi substrate including: ~ By introducing $ 4.Η2ς2, 艽, and other gases into a reaction zone, in the source And / or the drain region and a selective growth layer on the polycrystalline silicon continuum, wherein the flow rate of the Si% C i2 gas is about 50 to 15 0 s ccm, and the flow rate of the u2 gas is about 5 sini. The flow rate of the HC1 gas is about 10 to 50 sccm; and a metal petrification reaction occurs between the stone layer and a metal layer, so that Page 13 43471 3 VI 'Please ask for special' ® '' * Silicide is formed on the gate and the source / drain region. 9. A method for processing a metal-oxide half-element on a silicon substrate as described in item 8 of the scope of the patent application, wherein the metal layer is a Chin layer. 10. The method for processing gold-oxygen half-elements on a silicon substrate as described in item 8 of the scope of patent application, wherein the metal layer is a cobalt layer. 11 The method for processing gold-oxygen half-elements on a substrate as described in item 8 of the Shen-Jin patent scope, wherein before the silicidation reaction proceeds, the silicon layer is further amorphizing. 1 2. A metal silicide is formed on a source / drain region of a metal-oxide half-element / the metal-oxide half-element has a gate spacer partly covering the source / drain region, the process The method includes the following steps:) forming a silicon layer on the source / drain region, wherein the silicon layer is substantially thinner than the other part of the silicon layer near the sacrificial barrier wall; and a sand layer and a metal are formed. The layer undergoes silicidation, so that the silicon layer is completely consumed near the closed-electrode gap wall, and the other parts of the silicon layer are only partially eliminated. / 13 2 The process as described in item 12 of the scope of patent application, wherein the silicon layer is formed with a facet (f a c e t) near the interpolar barrier wall. Page 14 434ί ΐί 3 6. Scope of patent application 14. The process described in item 13 of the scope of patent application, wherein the material of the gate gap wall is silicon nitride. 15. The process according to item 14 of the patent application, wherein the source / drain region is formed in a silicon substrate. 16. The process according to item 15 of the scope of patent application, wherein the method for forming the silicon layer includes at least passing a gas such as dichlorosilane, hydrogen, and hydrogen acid into a reaction zone. 17. As described in item 16 of the scope of patent application: the process, wherein the flow rate of the dichlorosilane gas is about 50 to 150 sccm, the flow rate of the hydrogen gas is about 5 s 1 m, and the hydrogen acid gas The flow rate is about 10 to 50 sccro. Page 15