TW432873B - Photographing apparatus - Google Patents

Abstract

The present invention relates to a photographing apparatus in which the image information is stored in memory in the unit of each picture per unit after the photograph of object is taken, which comprises: a solid state photographing apparatus wherein a plurality of light receiving pixels is in column-row arrangement corresponding to specific color components, and the information charge of each light receiving pixel is stored independently according to each color component; the driving circuit to transfer the information charge of each light receiving pixel of the aforementioned solid state photographing apparatus to the output by the predetermined sequence to get the image signal; the signal processing circuit to generate the first till the third image data corresponding to the three primaries of light according to the aforementioned image signal; the digitizing circuit to digitize respectively the aforementioned first and the third image data to generate the first till the third digital data represented by one bit, and the control circuit which is connected to the memory to obtain the aforementioned first till third digital data in the aforementioned memory to read out and output the aforementioned first till third digital data stored in the aforementioned memory at the same time.

Description

^? 873 ^ V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to an imaging device that memorizes and captures image data obtained by a subject in units of one screen. [Conventional technology] A static camera using a solid-state imaging element such as a CCD image sensor is a structure in which a recording medium such as a built-in memory card or magnetic disk is used to record image data on these recording media. At this time, in order to be able to memorize more image data with a recording medium with a smaller capacity, various data compression techniques represented by the Joint Photographic Experts Organization (hereinafter referred to as JPEG) algorithm are available. Fig. 1 is a block diagram of an electronic still camera using an imaging element, and Fig. 2 is a timing chart illustrating the operation. The imaging element 1 is a CCD image sensor, and includes a plurality of shift registers arranged in rows and columns. The plurality of shift registers are composed of a plurality of vertical shift registers corresponding to each column of the received image and a horizontal shift register arranged on the output side of the plurality of vertical shift registers. A plurality of light-receiving images arranged in rows and columns are equipped with color filters of the three primary colors or the auxiliary colors arranged in a predetermined rule, and each light-receiving pixel corresponds to its specific color component. "Driver circuit 2 responds to the instructions of CPU8 described later when vertical transfer is generated. The clock and the horizontal transfer clock are used to drive the imaging element 1 by the vertical transfer clock and the horizontal transfer clock. For example, after the information charges of all light-receiving pixels are temporarily discharged in accordance with the discharge clock, the information charges of the light-receiving pixels of the imaging element 1 are stored through the predetermined period L, and the light-receiving pixels are read out at the corresponding vertical shifts in the vertical transfer clock. The bit register * is then transferred from each register to its vertical direction in sequence, and at the same time, the

C: \ ProgramFiles \ Pat_ent \ 310654.ptd Page 4 ^ 873 V. Description of the invention (2) --- 2 pixels are transferred in the horizontal direction 6 Therefore, from the camera element 1, you can rotate out: the image divided by the screen The intelligence is connected to the photographic element 1 by the continuous image signal \ input analog processing circuit 3 of each line unit. The image signal 'β⑴ which is rotated from the photographic element ^ is subjected to sample hold' level correction, etc. Generates the shaped image signal Yi (t) ^ A / D conversion circuit 4 is connected to the analog processing circuit 3, and the image signal input from the analog processing circuit 3 is digitally transformed by each pixel to generate image data Di (n) β digital processing ^ The circuit 5 is connected to the A / D conversion circuit 4 and applies color separation, color difference matrix, etc. to the image data input from the A / d conversion circuit 4 to generate a color difference containing brightness information. Image data of information h⑷. § Jiyi control circuit 6 is connected to the digital processing circuit 5 and the frame memory 7 described later. The image data input from the digital processing circuit 5 is converted into frames and written into the frame memory 7 at the same time. The image data of the frame memory 7 is output. The frame memory 7 has a capacity capable of storing an appropriate number of frame image data D2, and temporarily stores the image data D2 '' written from the memory control circuit 6. A central processing unit (hereinafter simply referred to as a CPU) 8 controls the operations of various parts according to a control program, and simultaneously takes in image data output from the memory control circuit 6 and performs compression processing β, for example, exposure to the body circuit 2 corresponding to the imaging element State and set the storage time of the information charge to obtain the image signal at an appropriate potential. Alas. In addition, the analog processing circuit 3 and the digital processing circuit 5 set each processing condition at the same time, even if each processing timing is synchronized with the operation of the imaging element 1. Furthermore, the control circuit 6 for §Jiyi ship is for the purpose of performing the dust reduction process.

C: \ PrograniFiles \ Patent \ 310654.ptd Page 5 ^ aa873 ^ V. Description of the invention (3) During various calculations, it will take the image data hoo from the frame memory 7 according to its necessary instructions. The image data memory 9 is connected to the CPU 8, and the CPU 8 stores compressed data C (n) formed by compressing the fixed image data. The image data memory 9 uses a non-volatile large-capacity flash memory, which can record compressed data of multiple frames. The compressed data C stored in the image data memory 9 is read out to the CPU 8 as necessary, and the compressed data C (n) is in its original state, or it is released as an image data D2 (n). . The compressed data C (n) or image data D2 output as described above is supplied to the display device and the printing device after processing opposite to the above-mentioned processing. The image data generated by the digital processing circuit 5 usually has a value corresponding to The number of bits formed by the A / D conversion circuit 4 and the CPU 8 which takes in the image data d2⑷ also constitute an input interface and a calculation system corresponding to the number of bits. Therefore, as the number of bits of the image data h⑴ increases, the configuration of the CPU 8 becomes complicated, and at the same time, the time required for each calculation processing of the image data Dz⑷ becomes longer. At the same time, the image data memory 9 connected to the CPU 8 also needs to increase its capacity as the number of bits increases. Therefore, it becomes the cause of increasing the cost of photography installation. [Summary of the Invention] The object of the present invention is to provide a camera device that can simplify the signal processing system and can be realized at a low cost. A first feature of the present invention resides in an imaging device that captures a circle image of a subject and stores image information in each frame unit, and includes a plurality of light-receiving pixels corresponding to a specific color component arranged in rows and columns. The solid-state imaging element with information charges independently stored for each color component; the information charges of each light-receiving pixel stored in the solid-state imaging element are sequentially transferred and output to obtain

C: \ ProgramFiles \ Patent \ 310654.ptd page 6

432873

囷 The driving signal of the image signal. &Amp; The first to third colors of the three primary colors ΪThe above image signal generates a signal processing circuit corresponding to the first to the third image data; the above is stored in the memory ^ Bit / = binary binary circuit, and at the same time connected to the memory, memorize the Λ binary binary data in the above-mentioned deduction hidden in the above-mentioned first to third binary data Those who read and rotate the control circuit. If you write to the memory from the control circuit, the binary circuit can generate an evolutionary data. Furthermore, it is not necessary to perform compression processing in the control circuit, so the circuit configuration can be greatly simplified. The second feature of the present invention is the camera device that captures the subject image and stores the circle image information per unit of screen + 'It is equipped with: A plurality of light pixels arranged in rows and columns, and a solid-state imaging element that stores information charges to each of the preceding pixels. A driving circuit that sequentially transfers and outputs the information charges stored in the light-receiving pixels of the solid-state imaging element to obtain an image signal; A signal processing circuit for generating image data of image signals; a compression circuit for compressing the above-mentioned image data to generate compressed data; and a circuit connected to a memory to take the compressed data into the memory while reading out the memory The control circuit for outputting the compressed data, and the control circuit is to set the operation timing of the driving circuit corresponding to the write speed of the compressed data to the memory boat. Therefore, the image data taken into the control circuit does not need to be stored in the frame memory on the way, and after being converted into compressed data, it can be written directly into the memory by the control circuit.

Following 87 3 V. Description of the invention (5 ^ ~ 'The third feature of the present invention is that the imaging device that captures the image of the subject and fetches the image information every 1 frame unit has the information charge generated by photoelectric conversion. A plurality of light-receiving pixels stored separately are arranged in rows and columns' at least a part of the light-receiving pixels are blocked by a solid image selection element; the information charge of each light-receiving pixel stored in the solid-state image pickup element is sequentially transferred and output to obtain an image signal A driving circuit for generating a signal processing circuit corresponding to the image data of the plurality of light-receiving pixels according to the image signal; generating a high-frequency vibration matrix of the light-shielding image data of the part of the light-receiving pixels of the solid-state imaging element; A matrix generating circuit and a binary circuit that binarizes the above-mentioned image data with reference to the above-mentioned high-frequency vibration matrix. Therefore, the dark current component that arbitrarily changes the operation state of the corresponding imaging element for each pixel is used as the high-frequency vibration. The matrix is used, so there is no need to memorize large-scale high-frequency vibration matrices. A fourth feature of the present invention is ingestion In a camera device that takes out image information in one frame unit, the information charges generated by photoelectric conversion are arranged in rows and columns of light-receiving pixels that are stored independently, while corresponding to each light-receiving pixel in a plurality of storage pixels. The solid-state imaging elements arranged in rows and frames are transferred by the frame transfer method; the information charges stored in the light-receiving pixels of the solid-state imaging elements are transferred to the vertical shift registers, and sequentially transferred output images are obtained from the vertical shift registers. A signal driving circuit; a timing control circuit for controlling the timing of transferring information charges from each light-receiving pixel of the imaging element to each of the vertical shift registers and the timing of transferring and outputting information charges from each vertical shift register; Like signals, which are generated corresponding to

C: \ ProgramFiles \ Patent \ 3l0654.ptd Page 8 432873 V. Description of the invention (6) --- The signal processing of each image data of the above-mentioned multiple light receiving pixels is processed by comparing the above image data with a certain judgment reference value. Those who enter and will carry the circuit. The above-mentioned timing control circuit keeps a predetermined time interval from the completion of the transfer of each of the vertical shift registers to the start of the above-mentioned information charge to two =, and pays for the above-mentioned information by the charge generated by the dark current β. The rearrangement is such that a change in the nitrile current occurring at each light receiving pixel in the storage portion is added to the information charge as a vibration. Then, the arbitrary dark current component ghost image data is compared with a certain reference value to obtain a binary result, and the equivalent effect of frequency vibration processing can be obtained. ^ [Embodiment of the Invention] FIG. 3 of the first embodiment shows the imaging device of the present invention. Block diagram of the first embodiment. The imaging device 11 includes a plurality of light receiving pixels arranged in rows and rows and a plurality of shift registers sequentially outputted by the information charges stored in the light receiving pixels, and generates image signals according to the driving clock of the driving circuit 12 ({) Alas. The driving circuit 12 generates a vertical transfer clock and a horizontal transfer clock. The vertical transfer clock and the horizontal transfer clock drive the imaging element n D by pulse. The imaging element 11 and the driving circuit 12 are as shown in the first figure. The imaging element 1 and the driving circuit 2 are the same. The analog processing circuit 13 performs analog signal processing such as sample hold on the image signal Y〇⑴ ′ input from the imaging element π to generate an image signal ¥ 1⑴. The A / D conversion circuit 14 inputs the image signal Yut from the analog processing circuit 13 and synchronizes with the operation timing of the analog processing circuit 13 to perform digital conversion to generate an image.

C: \ ProgramFiles \ Patent \ 310654.ptd Page 9 432873 V. Description of the invention (Ό 01 料 01 ([〇. The operation of the analog processing circuit 12 and the A / D conversion circuit 14 is also the analog processing circuit shown in FIG. 1 The operations of 3 and A / D conversion circuit 4 are the same. Digital processing circuit 15 is connected to A / D conversion circuit 14 and performs processing such as color separation cold matrix calculation on the image data input from A / D conversion circuit 14! In order to generate the three-color component data R (n), G (n), and B (n) corresponding to the three primary colors of light. For example, the color mirror mounted on the imaging element 11 is shown by white (W) as shown in Figure 4 When it is composed of green (G), cyan (Cy) and yellow (Y), ff-Cy can take out the red (R) component, and W-Ye can take out the blue (B) component.

In addition, when the R component'Cy-G is obtained from Ye-G, the B component can be obtained. To implement this color calculation processing in the digital signal processing circuit 15, a spatial color filter of 3 rows and 3 columns is formed, for example. The color component data R (n), G (n), and B (n) obtained by the digital processing circuit 15 have the number of bits corresponding to the A / D conversion circuit 14, respectively.

The binarization circuit 16 arbitrarily sets the color component data R (n), G (n), and B (n). The set high-frequency vibration pattern is used as a reference to perform binarization. As shown in FIG. The horizontal transfer clock of the circuit 12 is synchronized to generate binary data r (n), g (; n), b (n) in which each color component is represented by 1 bit. The high-frequency vibration pattern used here must be memorized in a binary circuit, a pattern determined in advance in a built-in memory circuit, or a pattern corresponding to any dark current component arbitrarily generated in the imaging element 11 and the like. The binary circuit 16 is integrated with the digital processing circuit 15, and a part of the digital processing circuit 15 can be used to form the color component data R (n), G (n), and B (n) compared with the high-frequency vibration pattern. In the binary circuit 16, only the color component data R (n), G (n), and B (n) are compared with the high-frequency vibration pattern without complex.

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Miscellaneous calculus processing is beneficial to speeding up the processing. The CPU17 controls the operations of each part according to the control program. At the same time, it takes in the three binary data r (n), g (n), b (n) output by the binary circuit 16 and writes the image data memory in sequence. Zhao 18 Be memorized. The three kinds of binary data r (n) 'g (n) and b (n) add up to 3 bits, and the interface is in cm. In addition, the binary data r (n), w, and μ S (n) ′ b (n) are pre-compressed. There is no need to perform compression processing on the CPU 17, so the calculation processing can be greatly simplified.

The exposure control of the drive circuit 12 by the CPU 17 or the control processing of the analog processing circuit 13 and the digital processing circuit 15 is the same operation as that of the CPU 8 as shown in Fig. 1 (a). Then, the binary circuit 16 is also controlled by the digital processing circuit 15 to synchronize the timing of the signal processing with the previous stage circuit, that is, the digital processing circuit 15. The image data memory 18 is the same as the image memory circuit 9 shown in Fig. 1 and is connected to CPln7. It sequentially stores the binary data r (n), g (n), and b (n) taken into the CPU17.

The binary data r (n), g (n), and b (n) recorded in the image data memory 18bis are read out from the CPU 17 when necessary, and directly input to an external device. As shown above, the binary display data r (n) 'g (n), b (n)' s display system or printing system 'is better than the received image data D2 (n >) for display or printing based on the quality of its reproduced image. “Degradation” can be achieved only by applying high-frequency vibration processing to each component. Gradation display can achieve sufficient image quality. In particular, the greater the number of light-receiving pixels of the imaging element M, the higher the quality of the reproduced image. Therefore, the effect of the present invention is extremely great. According to the present invention, at the signal processing stage of the image data, the data of each color component can be binarized.

A32S7 3____ V. Description of the invention (9) CPU input interface expected. Moreover, it is not necessary to perform data compression processing on the CPU side, which can simplify the calculation system, and also shorten the time required for signal processing to correspond to high-speed operations. Therefore, it is possible to realize an extremely low-cost camera system suitable for simple surveillance cameras and toys. Second Embodiment FIG. 6 is a block diagram showing a second embodiment of the imaging process of the present invention. The image sensor 21 includes a plurality of shift registers for sequentially transmitting and outputting a plurality of light-receiving pixels arranged in rows and rows and the information charges stored in the light-receiving pixels, and generating an image signal Y in accordance with the driving clock of the driving circuit 22 〇⑴. This imaging element 21 corresponds to the imaging element 1 shown in the first circle. The driving circuit 22 generates a vertical driving clock and a horizontal driving clock, and drives the imaging element 11 by the vertical non-clocking clock and the horizontal driving clock. The operation timing of the automatic circuit 22 is set at the writing timing of the image data memory 28 by the CPU 17 described later in synchronization. The analog processing circuit 23 generates an image signal after performing the analog signal processing on the image signal input from the imaging element 21? ! ⑴. Is the A / D conversion circuit 24 an image signal input from the analog processing circuit 23? ] Synchronization After digitally transforming the operation timing of the analog processing circuit 23, the image data ratio 产生 is generated. The operations of the analog processing circuit 23 and the A / D conversion circuit 24 are also consistent with the operations of the analog processing circuit 3 and the A / D conversion circuit 4 shown in FIG. The digital processing circuit 25 is connected to the A / D conversion circuit 24, and performs processing such as color separation and matrix calculation on the image data D1 (n) inputted from the A / D conversion circuit 24. For example, a color component R ( n), G (n), B (n). In other words, since the color filter mounted on the imaging element 21 is as shown in FIG. 4

432873 ^ V. Description of the invention (10) 'When composed of white (W), green (G), cyan (Cy) and yellow (Y), the red (R) component can be taken out with ff_Cy' can be taken with ff-Ye Take out the blue (B) component. In addition, the Ye component can obtain the R component, and the Cy-G component can obtain the B component. To implement this color calculation processing, a digital signal processing circuit 25 constitutes a space color mirror such as 3 rows × 3 columns. The color component data R (n), G (n), and B (η) obtained by the digital processing circuit 25 have the number of bits corresponding to the A / D conversion circuit 24, respectively. The data compression circuit 26 performs a compression process on the color components R (n), G (n), and B (n) to generate compressed data r (n), g (n), and b (n) that reduce the number of bits. The compression process may be a high-frequency vibration process and an error diffusion process. For example, when high-frequency vibration processing is used, the color component data R (n), G (n), and B (n) are binarized based on the arbitrarily set high-frequency vibration pattern, as shown in FIG. 7 'Synchronization At the horizontal transfer clock of the driving circuit 22, compressed data r (n), g (n), and b (n) of each bit representing each color component are generated by a bit. When the error diffusion process is used, the color component data R (n), G (n), and B (n) are binarized according to a certain reference value, and the errors occurring at that time are allocated to the surrounding pixels and added. Using this error diffusion processing, like high frequency vibration processing, compressed data r (n) > g (n), b (n) as shown in Fig. 7 can be obtained. In addition, in the compressed data r (n) 'g (n), b (n), in addition to the binary representation', it can also be expressed in the form of 4-bit (2 bits) or 8-bit (3 bits) or more. The number of bits mentioned above can be determined by considering the operating speed of the circuit or the desired quality of the reproduced picture. The CPU 27 controls the operations of each part according to the control program, and simultaneously takes in three types of compressed data r (n), g (n), and b (n) output by the data compression circuit 26 and sequentially stores them into the image data memory 28 for storage. Of it. In this CPU27, the system

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2. ^ h £ r 5. Description of the invention (11) The cockroach data r (n), g (n), and b (n), respectively expressed in one bit, are taken into the input interface and directly written into the circle image data The memory 28 is written as shown in Figure 7 at this time. The setting is synchronized with the horizontal rotation of the driving circuit 22. Therefore, the CPU 27 does not need to perform compression processing on the compressed data r (n) 'g (n), b (n), so that the arithmetic processing can be greatly simplified. Also related to the CPU 27's exposure control of the drive electronics 22 and analog processing electronics 23 and the digital processing circuit 25, the same operations as the CPU 8 shown in the first circle to the data compression circuit 26, as well as the digital processing The control action of the circuit 25 is the same, and the signal processing timing is synchronized with the previous circuit, that is, the digital processing circuit 25. The image data memory 2 is the same as the image data memory shown in Figure 1. It is connected to the CPU27, and the compressed data r (n), g (n), and b (n) of the CPU27 are sequentially recorded. Billion. Memory capture image data memory 28; compressed data r (n), g (n), b (n) are read out to CPU 27 when necessary, and output directly to external equipment. The compressed data r (n), g (n), b (n) of the above-mentioned compressed data display system or printing system is better than the image quality of the reproduced image when the image data D2 (n) is displayed or printed. Although it may be deteriorated, high-frequency vibration processing is applied to each component to obtain sufficient image quality from the gradation simulation display. In particular, the more light-receiving pixels of the imaging element 21, the higher the quality of the reproduced picture can be obtained, so the effect of the present invention is great. According to the present invention, it is corresponding to the chronological data record and memory writing sequence of the compressed data, and the video is automatically recorded without parts. Therefore, a frame memory is not required during the message processing. Since the structure of the device circuit is simplified, a low-cost camera system is realized.

C: \ Ptogmm Files \ patent \ 310654.ptc Page 14 2000.10.27.0J4 432873 ^ V. Description of the invention (12) It also 'compresses the image data in advance and writes it to the image data memory through the CPU' to simplify the CPU The input interface can also simplify the calculation system and further reduce costs. Third Embodiment FIG. 8 is a block diagram showing a third embodiment of the imaging device of the present invention. The image sensor 31 is a CCI like the image sensor 1 shown in FIG. 1) The image sensor 'contains a plurality of prior pixels arranged in rows and columns and sequentially transfers output to output a plurality of shifts of information charges stored in each light receiving pixel The plurality of light-receiving pixels arranged in the β-column of the register are as shown in FIG. 8, and the three primary colors of light or the auxiliary colors thereof are arranged according to a predetermined color filter, and each light-receiving pixel corresponds to a specific color component. The light-receiving pixels located in the surrounding area are shielded with an optically opaque film 'to constitute a removable black reference level. The plurality of shift registers are arranged with a plurality of vertical shift registers corresponding to the columns of the light-receiving pixels, and the horizontal shift registers are arranged in a plurality of vertical shift registers wheels ΓΝ to drive the circuit. 3 2 Generates a vertical transfer clock and a horizontal transfer clock, and supplies the vertical transfer clock to the vertical shift register of the imaging element 31, and the horizontal transfer clock to the horizontal shift register of the imaging element 31. Therefore, the information charges stored in the plurality of light-receiving pixels independently and sequentially are transmitted in turn, and one piece of image information can be obtained in a line unit: image signal Yfl⑴. This image signal, due to the surroundings of the light-receiving pixel shadow element 31, shows the black reference level during the beginning (or end) of the horizontal sweep as shown in FIG. During the analog processing circuit 33, the image rotated by the image sensor 31

/ 1 328T3 V. Description of the Invention (13)

Perform signal processing on analog systems such as sample hold to generate the image signal Y! ⑴. The A / D conversion circuit 34 synchronizes the image signal Y1 (t) input from the analog processing circuit 33 with the operation timing of the analog processing circuit 33 to perform digital conversion to generate image data D1 (t) «digital processing circuit 35 Connected to the A / D conversion circuit 34, the image data h⑴ input from the A / D conversion circuit 34 is subjected to processing such as color separation and matrix calculation to generate three color component data R (n) 'G ( n) 'B (n) »If Amber ’s color filter on the image sensor 31 is white 0Π' Green (G) 'Cyan (Cy) and Yellow (Y) As shown in Figure 9, take out the red with ff-Cy (R) component 'Take out the blue (B) component as W-Ye. The R component was obtained with Ye-G, and the B component was obtained with Cy-G. To implement this color calculation processing, a spatial filter of 3 rows by 3 columns is formed in the digital signal processing circuit 35. The operations from the analog processing circuit 32 to the digital processing circuit 35 described above correspond to the operations of the analog processing circuit 3 to the digital processing circuit 5 shown in FIG. As shown in FIG. 10, the matrix generating circuit 36 is based on the sampling signal corresponding to the black reference level period K of the image signal Y0. The sampling signal is set to sample image data at each horizontal scanning period. The sampled values are repeatedly arranged in a predetermined number to generate a high-frequency vibration matrix. That is, in a plurality of light-receiving pixels in the surrounding area that is shielded from light, the information charge of photoelectric conversion does not occur, but the

The electric charge generated by the current. The amount of dark current generated is the black reference level obtained from a plurality of light-receiving pixels in the surrounding area that is blocked due to pixel variations, and random data can be obtained as a result of direct sampling. Therefore, a plurality of sample values are repeatedly arranged in a row to form a high frequency vibration matrix in a row. The high-frequency vibration matrix thus generated supplies the individual data τ⑷ to the high-frequency vibration circuit 37 in order.

4S2S73 ..... V. Description of the invention (14) The high-frequency vibration circuit 37 is the high-frequency vibration data τ supplied from the matrix generating circuit 36 based on the color component data R (n), G (n), and B (n). (ιη) After binarization, as shown in FIG. 7, the clock is horizontally transmitted in synchronization with the driving circuit 32 to generate compressed data r (n), g (n), b (η) in which each color component is represented by 1 bit. ). The high-frequency vibration matrix used in the high-frequency vibration circuit 37 is generated by the dark current component in each row in the matrix generation circuit 36, and it corresponds to the change of the dark current component. Therefore, the same effect as that of the most suitable frequency vibration array can always be obtained . The timing control circuit 38 controls the operation of each part according to the reference clock. The timing control circuit 38 synchronizes with the operation timing of the driving circuit 32, and generates a sampling signal corresponding to the black reference level period κ setting timing of the circular image signal Yfl ， for the matrix generation circuit 36. At the same time, the matrix generation circuit 36 gives An instruction to update the high frequency vibration matrix is issued at the beginning of each horizontal scanning period. In addition, the timing control circuit 38 and the high-frequency vibration circuit 37 synchronize the timing of taking in the color component data R (n) G (n) and B (π) with the output operation of the digital processing circuit 35. The operation control of the timing control circuit 38 driving circuit 32 and the operation control of the analog processing circuit 33 to the analog processing circuit 35 are the same as the operation of the timing control circuit 7 shown in FIG. The compressed data r (n), g (n), and b (n) generated by the high-frequency vibration circuit 37 are recorded in a non-volatile memory or a large-capacity recording medium represented by a magnetic disk, or used for a display machine and a printing machine „The compressed data r (n), g (n), and b (n) output as described above are binarized using a high-frequency vibration matrix corresponding to the change in the dark current component, so they are not easily affected by the change in dark current. Reproduces images of stable quality regardless of the action environment. In addition, because it is not easy to be dark C: \ ProgramFiles \ Patent \ 310654.ptd Page 17 432873 _ Case No. 88108802 Year A Goods AC? Since Chrome _ V. Description of the Invention U5) The relationship between the electrical and electronic components' can be stored in the imaging element 21 for a long time to maintain the information charge and can be freely selected from the imaging element 2 to each processing circuit 23, 24 < the timing of reading. Figure 11 shows the matrix generation A block diagram of the configuration of the circuit 36 and the high-frequency vibration circuit 37. The matrix generation circuit 36 is composed of a dark current detection section 41 'a peak detection section 43, a differential detection section 44' a matrix section 42 and a multiplier 45, and a "dark current detection section" 41 corresponds to the sampling signal supplied by the timing control circuit 38 The implementation of the sampling of the image data due to display and display the black reference level part. Generally, the light receiving element of the camera element 314 is from its surrounding area to 20 pixels multiplied by shading, so it can be taken out from the black reference level of the image signal. 0 to 20 pixel points. The matrix section 42 is to generate a high-frequency vibration matrix by periodically or arbitrarily arranging a plurality of black reference levels detected by the dark current detection section 41 into a row of pixel points. The unit 43 is based on the dark current detected by the dark current measurement unit 41 during each horizontal scan. The complex black reference level poison value is detected and maintained. The differential detection unit 44 is generated by the peak detection unit 43 during each horizontal scanning period. The calculated difference between the peak value and the peak value detected during the previous horizontal scanning period generates coefficient data according to the calculation result. Then, the multiplier 45 multiplies each high-frequency vibration data τ⑷ 'of the high-frequency vibration matrix generated by the matrix portion 42 by the multiplier 45. The coefficient data provided by the differential detection unit 44 is used to modify the high-frequency vibration matrix β. This correction is to correct the dark current component caused by the time difference when the information element 31 transfers information charges. When the configured plurality of light-receiving pixels are transferred and output, there is a relationship that the current component increases according to the time difference of the transfer timing of each row.

43287 3

Multiply the high-frequency vibration data τ (η) by the coefficient data. The inter-frequency vibration circuit 37 is composed of an adder 46 and a binary unit 4. The adder 46 is for color component data. , G (n), B (η) are respectively added to the high-frequency vibration data input from the matrix generating circuit 36, and each added value is supplied to the binary unit 47. The binarization unit 47 compares the addition value of the color component data R (n), G (n), and B (η) corresponding to the rounds from the adder 46 with a certain judgment value, and generates a pair judgment represented by a binary. Compressed data r (n), g (n), b (n). As a result, the color component data R (n) becomes a double evolution corresponding to the high-frequency vibration matrix. In the above-mentioned embodiment, the example is shown in which the matrix generating circuit 36 and the high-frequency vibration circuit 37 are independently provided from the digital processing circuit 35, but the matrix processing circuit 3 5 can also be implemented in the output stage of the digital processing circuit 35. The processing is the same as that of the high-frequency vibration circuit 37. According to the present invention, a dark current or a distribution of a high-frequency vibration moment is generated arbitrarily in accordance with the operating environment. The result of the array 'does not need to remember many high-frequency vibration patterns, and it is possible to obtain the optimum high-frequency vibration corresponding to the deviation of the dark current component. Pattern. Therefore, it is possible to reproduce a picture with stable image quality regardless of the operating environment of the device. It is also possible to increase the dark current component of image data. The timing width of the image signal taken from the imaging element can be set to be wide, and the operation timing of each processing circuit of the circular image signal and image data can be freely selected. Therefore, the circuit configuration can be simplified and the cost of the device can be reduced. Fourth Embodiment FIG. 12 is a square circle of the fourth embodiment of the imaging device of the present invention.

432873 V. Description of the invention (17) The diagram is a sequence diagram to explain its operation. Β apricot ^ image element Λ51 is a coffee image sensor with a tip transfer method. It has a receiving unit: 2S, a horizontal transfer unit 51h, and a wheel output unit 51d. . Light receiving: The Sichuan system is formed by a plurality of shift registers which are continuous in the vertical direction, and each element of the shift register constitutes a light receiving pixel. The storage section 51s is formed by a plurality of shift registers successive to the shift register of the light receiving section 51 i, and each element of the shift register constitutes a storage pixel. The horizontal transfer unit 51h is formed by a single shift register, and the wheel out of the plurality of shift registers of the storage unit 51s is connected to each element of the shift register. The output section 51d has an independent electric capacity, and receives the information charges sequentially output from the horizontal transfer section 51h to convert the charge amount into a voltage value and output. In addition, as shown in Fig. 14, the light receiving section 51i of the image pickup element 51 is provided with a plurality of segments corresponding to the three primary colors of light, and a color filter arranged in accordance with a predetermined rule is installed so that each light receiving pixel corresponds to a specific color component. In this embodiment, G (green) and R (red) segments' are alternately arranged on the singular line, and B (blue) and G segments are alternately arranged on the even line.

Each of the driving circuits 52 includes a vertical clock generating section 52 v that operates in accordance with a common reference clock, a storage clock generating section 52 s, and a horizontal clock generating section 52 h. The discharge clock φ (ΐ and the vertical transfer clock Φν 'are supplied to the light receiving section 51i of the imaging element 51 in the vertical clock generating section 52v. Therefore, the information charges of the light receiving pixels remaining in the light receiving section 51i can be discharged. After time L, the information charge re-stored is transferred from the light receiving section 51i to the storage section 51s. The storage clock generating section 52s generates the storage transfer clock for the storage section 51s of the image sensor 51. Thus, the light receiving section 51i Forwarding output

A32873 V. Description of Invention (18)

The information charge is taken into the storage section 51s, and at the same time, it is transferred from the storage section 51s to the horizontal transfer section 51h in one line unit. In addition, the storage clock generation unit 52s is vacated for a predetermined period E from the completion of taking in information charges in the storage unit 51s to the start of the transfer to the horizontal transfer unit 5ih according to the instructions of the timing control circuit 57 described later. Therefore, during the period E, the electric charge (dark current charge) generated by the dark current is mixed into the information charge held by the storage section 51s ^ The horizontal clock generation section 52h generates a horizontal transfer clock φη for the imaging element 51 Horizontal transfer section 51h. Therefore, the information charge transmitted and output in the unit of one line from the storage unit 515 is in the _row transfer wheel out of the output unit 51d, and one screen of image information is output from the output unit 51d. The image information is a continuous circle image signal in one row. I⑴. This image signal Y0⑴ ′ is mixed with an arbitrarily generated dark current charge in the storage section during the period E, so the dark current component is added as compensation as shown in FIG. 15.

The analog processing circuit 53 performs the signal processing of an analog system such as sample hold on the image signal γ〇⑴ from the photographic element 51 to generate an image signal. The A / D conversion circuit 54 will be input by the analog processing circuit 53 The image signal ¥! ⑴ is synchronized with the operation timing of the analog processing circuit 53 for digital transformation to generate image data 0! ⑷. The digital processing circuit 55 is connected to the a / d conversion circuit 54 'for image data DUn input from the A / D conversion circuit 54 and performs processing such as color separation and matrix calculation' to generate three colors corresponding to the three primary colors of light Composition information R (n) 'G (n), B (n). If it is necessary to correspond to the color filter shown in FIG. 14 ', each component of R, G, and B can be obtained by assigning a pixel to each of the singular and variable variables. In addition, color components that cannot be obtained in each line, and the color components that can be obtained in the upper and lower lines are averaged. Β is to be performed. The color calculation processing is performed in the digital signal processing circuit 55, which can be composed of 3 × 3.

C: \ Program Files \ Patent \ 310654.ptd Page 21 V. The space color filter in column (19) of the invention description.

The binary circuit 5 6 is a binary data which is obtained by comparing the color component data R (n), G (n), and B (n) input from the digital processing circuit 55 with a certain judgment reference value, thereby generating binary data. r (n), g (n), b (n) β The binary data r (n), g (n), b (n) are synchronized to the horizontal transfer clock Φΐι of the median circuit 52, which are respectively 1 Bit output. This binary circuit 56 simply compares the color component data R (n), G (n), B (η) with a certain determination reference value, and generates binary data r (n), g according to the size. (n), b (n). However, in the color component data R (n), G (n), and B (n), the storage portion 51's containing the imaging element 51 has a dark current charge arbitrarily generated in the period 3E, so the dark current component and the high-frequency vibration matrix Have the same effect. The timing control circuit 57 controls the operation of each unit in response to a CPU (not shown) instruction that controls the entire device. When the timing control circuit 57 receives a storage control command from the CPU, the storage clock generator 52s of the drive circuit 52 is set to set the period from when the storage unit 51s has taken in the information charge and then starts to transfer to the horizontal transfer unit 51h. E »This The period E is set according to the average level of the image signal γβ ', so that when the component image data R (n), G (n), and B (n) of the image signal YD⑴ are binarized, no judgment result will occur. Bias β

The compressed data r (n), g (n), and b (n) generated by the binary circuit 56 are recorded in a non-volatile memory or a large-capacity recording medium represented by a magnetic disk or the like, or provided to a display device and Printing machine. For example, the compressed data r (n), g (n), and b (n) of the above rounds can be used in a high-frequency vibration matrix of the same size as the number of pixels constituting a screen. . According to the present invention, it is possible to change the operation timing without adding a circuit configuration.

C: \ ProgramFiles \ Pateiit \ 310654.ptd Page 22 432873 V. Description of the invention (20) In the completed state, ‘realize high-frequency vibration simulation, and realize the camera system at low cost. This imaging device can be applied to simple surveillance cameras and toys. "Because the timing of the information charge read from the imaging element is delayed, although the dark current component contained in the image data is increased", the determination criterion at the time of binary processing can be changed to easily offset the increase of the dark current component. [Brief Description of the Drawings] FIG. 1 is a block diagram showing the configuration of the imaging device for f. FIG. 2 is a timing chart illustrating the operation of a conventional imaging device. Fig. 3 is a block diagram showing the constitution of the first embodiment. FIG. 4 is a schematic diagram showing an example of a sharp filter configuration. Figure 5 shows the timing circle of binary data. Fig. 6 is a block diagram showing the structure of the second embodiment. Figure 7 is a timing diagram showing the compressed data. Fig. 8 is a block diagram showing the structure of the third embodiment. FIG. 9 shows a mode M of an example of sharp filter configuration. Figure 10 is a timing diagram showing the sampling signal. Fig. 11 is a block diagram showing the structure of a matrix generating circuit and a high-frequency vibration circuit. The twelfth circle is a block circle constituting the fourth embodiment. Fig. 13 is a timing chart showing the operation sequence of the fourth embodiment. The 14th circle is a checker diagram showing an example of the color filter configuration. The 15th circle is a waveform diagram of the current component of the image signal. [Explanation of symbols]

C: \ Program Files \ Patent \ 310654.ptd 432873 Case No. Qiu 108802 ^ year / £? Month 7th amendment 5 *, invention description (21) 1, 11, 21, 31, 51 camera element 2, 1 of ， 22, 32, 52 Driving circuit 3, 1 3, 23, 33, 53 Analog processing circuit 4, 14, 24, 34, 54 A / D conversion circuit 5, 1 5, 25, 35, 55 Digital processing circuit 6 Memory Body control circuit 7 Memory 8, 17, 27 CPU 9, 18, 28 Image data memory 16, 26, 36 Matrix generation circuit 37 High-frequency vibration circuit 38, 57 Timing control circuit 41 Dark circuit detection section 42 Matrix section 43 Peak detection section 44 Differential detection section 45 Multiplier 46 Adder 47 Binary section 5 Id Output section 51h Horizontal transfer section 51i Light receiving section 51s Storage section 52v Weeping clock generation section 52h Horizontal clock generation section 52s Stored clock Occurrence department

C: \ PFOgiam FiIesWteiitV310654rptc Page 24 2000.10.27. G24

Claims (1)

^ 3287 3 ^ ----- Case No. 88108802_Good Year's Day and Month Knowing Article 1 "-" " ·-'" f' λ, patent application Fangu I A camera device, talking about the camera device A photographing device that captures an image of a subject and draws two units of chronicle image data per one includes: arranging a plurality of light-receiving pixels corresponding to a specific color component in rows and columns, and independently storing the light-receiving pixels according to each color component Information charge of the fixed image element; The information charge of the light receiving pixel stored in the above-mentioned body imaging element is sequentially transmitted and output to obtain the driving signal of the circle image signal; the corresponding three primary colors are generated according to the above image signal Signal processing circuits for the image data of the 丨 to the 3rd; Binary the image data of the 1st to the 3rd to generate the 1st to the 3rd digit represented by 1 bit respectively The data binary circuit and the circuit connected to Jiwei body, in order to take in the above-mentioned first to third binary data and memorize it in the above-mentioned memory, and then memorize it in the above-mentioned first to third of the memory Binary data is read and output Control circuit, etc. 2. The imaging device according to item 1 of the scope of patent application, wherein the binary circuit includes a high-frequency vibration processor. 3 * An image pickup device which captures the image of the subject and records the image data of one hundred million images per one screen unit, and includes: a plurality of light receiving pixels arranged in rows and columns, and information is stored for each light receiving pixel Charged solid-state imaging element: A linkage circuit that transfers the information charge stored in each photo-receiving pixel of the above-mentioned imaging element to obtain an image signal; E 87 3 A signal processing circuit for generating image data according to the above image signal; a compression circuit for generating compressed data by compressing the upper circle image data, and a circuit connected to the memory to take in the compressed data and record it at the same time as the above-mentioned Ji Ni A fetching circuit for outputting the dust shrinkage data stored in the memory, and the control circuit is to set the operation timing of the media motion circuit corresponding to the writing speed of the compressed data to the shame ship. 4. For the camera device described in item 3 of the patent application, wherein the control circuit is to set the operation timing of the drive circuit and the signal processing circuit corresponding to the writing speed of embedding the compressed data into the memory of the fan. The sequence of actions. 5 · —A kind of image pickup device, which is an image pickup device that captures a photographic image and stores image data in each frame unit, and includes: a plurality of information arranged in rows and columns and independently generated by photoelectric conversion to store information charges. A light-receiving pixel 'at least a part of the light-receiving pixel is a solid-state image pickup element; the information charge stored in each light-receiving pixel of the solid-state image pickup element is transmitted and output in a predetermined frame order to obtain a gull image signal driving circuit; generated according to the aforementioned image signal' A signal processing circuit corresponding to the image data of each of the plurality of light-receiving pixels; a matrix generation circuit for generating a high-frequency vibration matrix based on the circle image data of the light-receiving pixels corresponding to the part of the solid-state imaging element that is shielded from light; Frequency vibration matrix binarizes the above image data 432§7§ Vengeful two carry the circuit. 6. The imaging device as described in item 5 of the patent application, wherein the matrix generation circuit has the following information: the circle image data is taken in at a timing corresponding to the light-shielding area of the fixed camera element to generate dark current data. A current detection unit and a matrix unit that arranges the dark current data to generate at least one line of a high-frequency vibration matrix. 7. The imaging device as described in item 6 of the patent application, wherein the upper matrix generating circuit is further provided with: a value detection unit for detecting the maximum value of the above dark current data in units of rows, and each row A differential detection unit that detects the maximum difference and corrects the high-frequency vibration matrix according to a detection result of the differential detection circuit. / 8. —A kind of camera device 'The camera device is an image pickup device that takes an image of a subject on a mattress and stores image data in each frame unit, and includes: arranged in rows and columns and generating information charges independently by photoelectric conversion of bismuth At the same time, the plurality of light-receiving pixels stored in germanium correspond to each light-receiving pixel as a row. The solid-state image pickup element of the frame transfer method of the plurality of storage pixels arranged in a row transfers the information charge stored in each light-receiving pixel of the above-mentioned image pickup element to each After the vertical shift register, a driving circuit is obtained from each of the vertical shift registers in a predetermined order to obtain the image signal; it is used to control the vertical shift registers of the light receiving pixels of the image pickup element. A timing control circuit that transfers the abnormal order of the information charge and the timing of the transfer output of the information charge of each vertical shift register, according to the above-mentioned image signal, generates a plurality of corresponding light receiving 432873 Case No. 8S108802_A month 年 Amendment_ VI. Signal processing circuit for applying patents to generate image data for pixels; and a binary circuit for comparing the above image data with a certain judgment reference value and binarizing it, and The above-mentioned timing control circuit is a period in which the information charge is transferred from each vertical shift register to the time when the information charge starts to be transferred, and the predetermined time interval is maintained and the information charge overlaps with the charge generated by the dark current. By. a. The imaging device described in item 8 of the patent application park, wherein * the solid-state imaging element includes a chromatic mirror corresponding to the above-mentioned plurality of light-receiving pixels and having a plurality of fragments formed by three primary colors of light.