^26919 A7 B7 五、發明説明（ 發明領域 本發明是有關一種金氧半元件之閘氧化層的熱退火方 法’特別是有關於一種金氧半元件之閘氧化層，利用、，舌& 原子進行低溫熱退火製程的方法。 ' 經濟部中央標準局貝工消費合作社印製 發明背景： 在積體電路的設計之中’係利用金氧半場致電晶#作 為微電子開關，這些微電子開關形成邏輯電略， 殊的指令。金氧半場效電晶體的結構係利用金屬材料^ & 化矽材料/半導體材料的疊層結構，在二氧化硬材料中^成 強反轉狀態，以控制金氧半場效電晶體的開關狀離。 現行的金氧半場效電晶體係利用二氧化發材料，作為 疊層結構的中間層，或經氮化的二氧化矽（Si〇xNy)，以提 高閘介層品質與電性表現。 .在西元1998年9月14曰所公開的"Applied Physics Letters”第73冊的第1517至1519頁，刊登一篇標題為 "Intermixing at the tantalum oxide/silicon interface in gate dielectric structures"的學術論文，其中詳細敘述使用Ta2〇5 與Si02的疊層作為閘介電層結構。在這篇論文之中’敘 述利用疊層結構作為閘介電層的方法，以及這種閘層結構 的電特性與材料特性，例如具有較低的電容密度’而且利 用低溫預後熱退火（Post annealing process)以得到穩定的氧 化物疊層。這篇論文的結論是此種疊層結構具有較高的介 電常數與較低的漏電流，而且可以使用較低的製程溫度’ 2 本紙張尺度適用中國國家標準{ CNS ) Λ4現格（21〇 X297公釐） (諳先閱讀背面之注意事項再填两本頁) 訂 經濟部t央標率局負工消f合作社印製 A7 B7五、發明説明（） 來進行疊層結構的處理。根據這篇論文的技術揭露，可以 使用疊層結構作為金氧半元件的閘介電層，而且可以使用 低溫製程進行閘介電層的處理製程。 在西元1998年3月16日所公開的”Applied Physics Letters”第72冊的第13〇8至ΠΙΟ頁，刊登一篇標題為 "Nitrogen plasma annealing for low temperature Ta205 films" 的學術論文，其中詳細敘述利用Ta205作為金氧半元件的 介電層’並且利用低溫氮氣電漿處理此種介電層，以降低 介電層的漏電流，而且這種低溫介電層電漿處理製程，可 以使用於高層金屬化製程之後的介電層。這篇論文的結論 為使用氮氣或氧氣電漿處理Ta205介電層，能夠減少漏電 流與電荷捕獲現象（charge trapping)，而且僅需使用低溫的 電漿處理製程’即可得到與高溫快速熱退火製程相同的效 果’有效減少製程之中的熱預算。 根據前述的兩篇論文，可以得知：利用疊層結構可以 作為金氧半元件的閘介電層，或者是利用Ta205作為積體 電路的介電層，都需要注意有關介電層的漏電流問題，以 及在膜層之中的原子缺陷問題所造成的電荷捕獲現象。雖 然在第二篇論文之中’敘述使用低溫電漿處理製程，進行 介電層的後熱製程，能夠有效減少介電層的漏電流與缺 陷。但是在現行的技術之中，具有疊層結構的介電層的預 後熱退火製程’是使用高溫快速熱退火製程（RTP)，不但 需要較高的熱預算，而且不能使用於多重金屬化製程之 後’還會造成積體電路製造的許多問題。 3 本紙張尺度適用中國國家標隼（CNS )八4现格U10X297公^ 一 ~ ^^^1 H^I I \^, i !-»- T1 - 3 、vs (請先閱讀背面之注意事項再填寫本頁) A7 B7 4269^ 五、發明説明（） 因此’需要-種針對金氧半元件之開介電叠層的低溫 預後熱退火製程，能夠具有較少的熱預算，而且不會因為 高溫影響積體電路的其他製程，並且能夠使用有別於二氧 化矽材料之外的其他材料作為閘介電層。 發明目的與簡要說明，· 本發明提供一種利用活性原子進行金氧半元件之閘氧 化層的低溫熱退火製程方法，提供一半導體基材；沈積— 絕緣層至半導體基材之上；利用活性原子對絕緣層進行熱 退火製程，修補絕緣層之中的原子缺陷，以減少絕緣層的 漏電流，其中活性原子係選自活性氮原子、活性氧原子與 上述兩種原子的任意組合所組成群組的其中之一；以及形 成一閘極至絕緣層之上，閘極、絕緣層與半導體基材為一 金氧半結構。 本發明係提供一種利用活性原子對金氧半元件進行閘 介電層的電漿處理製程’此活性原子為具有激發態電子的 原子，可以降低閘介電層的漏電流，與修補閘介電層上的 缺陷。 本發明係提供一種活性原子的形成方法，係將氣體通 入至具有微波的處理器，使得氣體具有激發態電子，然後 對絕緣層進行低溫熱退火製程，其中處理器中的微波係由 一遠端微波處理器所產生。 圖式簡單說明： 4 本紙張尺度適用中國國家標準（CNS ) A4規格{ 210X 297公釐） I , Λ : . ^-- (請先閱讀背面之注意事項再填寫本頁)^ 26919 A7 B7 V. Description of the Invention (Field of the Invention The present invention relates to a thermal annealing method for a gate oxide layer of a metal-oxide half-element. In particular, it relates to a gate oxide layer of a metal-oxide half-element. Method for performing a low temperature thermal annealing process. 'Printed by the Central Standards Bureau of the Ministry of Economic Affairs, Shellfish Consumer Cooperatives. Background of the Invention: In the design of integrated circuits' is the use of metal-oxygen half-field calls to crystal # as microelectronic switches, these microelectronic switches Logic logic strategy, special instructions. The structure of the metal-oxide half field effect transistor is a metal material ^ & silicon material / semiconductor material layered structure, in the hard dioxide material ^ into a strong inversion state to control On-off switching of metal oxide half field effect transistor. The current metal oxide half field effect transistor system uses a dioxide emitting material as an intermediate layer of a laminated structure or a nitrided silicon dioxide (SiOxNy) to improve The quality and electrical performance of the dielectric interlayer.. Published on September 14, 1998, "Applied Physics Letters" Volume 73 pages 1517 to 1519, published an article entitled "Intermixing at t he tantalum oxide / silicon interface in gate dielectric structures ", which describes in detail the use of a stack of Ta205 and SiO2 as the gate dielectric layer structure. In this paper, 'the use of a stack structure as the gate dielectric is described Layer method, as well as the electrical and material properties of this gate structure, such as having a low capacitance density and using a low temperature post annealing process to obtain a stable oxide stack. Conclusions of this paper This kind of laminated structure has higher dielectric constant and lower leakage current, and can use lower process temperature. 2 This paper size is applicable to Chinese national standard {CNS) 4 grid (21 × 297 mm) (Please read the notes on the back first and then fill in two pages.) Order A7 B7 printed by the Ministry of Economic Affairs, the Central Bureau of Standards and Labor, Cooperatives, and Fifth, the description of the invention () to process the laminated structure. According to this paper's According to the technical disclosure, a stacked structure can be used as the gate dielectric layer of the metal-oxide half-element, and a low-temperature process can be used to process the gate dielectric layer. In 1998 1998 3 "Applied Physics Letters" Volume 72 published on pages 1630 to 1110, published an academic paper titled " Nitrogen plasma annealing for low temperature Ta205 films ", which details the use of Ta205 as gold The dielectric layer of the oxygen half element is treated with a low temperature nitrogen plasma to reduce the leakage current of the dielectric layer, and the low temperature dielectric layer plasma processing process can be used after the high-level metallization process. Dielectric layer. The conclusion of this paper is that the use of nitrogen or oxygen plasma to treat the Ta205 dielectric layer can reduce leakage current and charge trapping, and only requires a low temperature plasma treatment process to obtain rapid thermal annealing with high temperature. The same effect of the process' effectively reduces the thermal budget in the process. According to the two previous papers, it can be known that the stacked structure can be used as the gate dielectric layer of the metal-oxide half-element, or the Ta205 is used as the dielectric layer of the integrated circuit, and the leakage current of the dielectric layer needs to be paid attention to. Problems, and charge trapping caused by atomic defect problems in the film. Although in the second paper, 'the use of a low-temperature plasma treatment process and the post-heating process of the dielectric layer can effectively reduce the leakage current and defects of the dielectric layer. However, in the current technology, the prognosis thermal annealing process of a dielectric layer with a stacked structure is a high-temperature rapid thermal annealing process (RTP), which not only requires a high thermal budget, but also cannot be used after a multiple metallization process. 'It also causes many problems in the manufacture of integrated circuits. 3 This paper size applies to China National Standards (CNS) 8 4 U10X297 male ^ a ~ ^^^ 1 H ^ II \ ^, i!-»-T1-3, vs (Please read the precautions on the back before (Fill in this page) A7 B7 4269 ^ V. Description of the invention () Therefore 'need-a low-temperature prognosis thermal annealing process for the open dielectric stack of metal-oxygen half-elements, which can have a lower thermal budget and not be affected by high temperatures Affects other processes of integrated circuits, and can use materials other than silicon dioxide materials as the gate dielectric layer. Purpose and brief description of the invention: The present invention provides a low-temperature thermal annealing process method for the gate oxide layer of metal-oxide half-elements using active atoms, providing a semiconductor substrate; depositing-an insulating layer on the semiconductor substrate; The thermal annealing process is performed on the insulating layer by atoms to repair the atomic defects in the insulating layer to reduce the leakage current of the insulating layer. The active atom is selected from the group consisting of an active nitrogen atom, an active oxygen atom, and any combination of the above two atoms. One of the groups; and forming a gate electrode on the insulating layer, wherein the gate electrode, the insulating layer, and the semiconductor substrate have a gold-oxygen half structure. The present invention provides a plasma treatment process for the gate dielectric half of a metal-oxygen half element using active atoms. The active atom is an atom with excited electrons, which can reduce the leakage current of the gate dielectric layer and repair the gate dielectric. Defects in layers. The invention provides a method for forming an active atom. A gas is passed to a processor having a microwave so that the gas has excited electrons, and then the insulating layer is subjected to a low-temperature thermal annealing process. The microwave system in the processor consists of a Generated by a remote microwave processor. Brief description of the drawing: 4 This paper size is applicable to Chinese National Standard (CNS) A4 specification {210X 297 mm) I, Λ:. ^-(Please read the precautions on the back before filling this page)
*tT 經濟部智慧財產局員工消費合作社印髮 269、9 A7 -----B7 五、發明説明（） (請先閲讀.背面之注意事項再填寫本頁：> 第一圖係顯示本發明之熱退火設備，利用遠端微波產生 器’在處理器之中形成活性原子，輸入至反應室中， 進行閘氧化層的低溫熱退火製程：以及 第二圖係顯示一般金氧半元件的剖面示意圖。 發明詳細說明： 本發明係揭露一種利用活性原子進行金氧半元件之閘 氡化層的熱退火製程方法，提供一半導體基材，作為金氧 半元件的基底；沈積一絕緣層至半導體基材之上，此絕緣 層為金氧半元件的閘介電層’為數層所合成的疊層或者是 為單一材料的膜層；利用活性原子對絕緣層進行熱退火製 程’修補絕緣層之中的原子缺陷與摻雜離子至絕緣層之 中，以減少絕緣層的漏電流，其中活性原子係選自活性氮 原子、活性氧原子與上述兩種原子的任意組合所組成群組 的其中之一，而形成活性原子的方法是利用微波激發氮氣 或氧氣，使得氮氣或氧氣在經過微波處理之後’成為具有 激發態電子的氣體，比起一般的氣體，具有較高的能量； 經濟部智慧財產局員工消費合作社印製 形成一閘極至絕緣層之上，閘極、絕緣層與半導體基材為 一金氧半結構。 在本發明之中，係利用遠端微波產生器，產生微波來 激發氮氣與氧氣，產生具有激發態電子的活性原子，利用 &些活性原子進行閘介電層的電漿處理，修補閘介電層的 缺陷與摻雜原子至閘介電層之中，降低閘介電層的漏電流 與電荷捕獲現象。 5 本纸張尺度適用中賴家標準（c則(2胸297公董） 五 經 濟 部 智 財 產 局 員 工 消 费 h 社 印 製 ' 4269 ^ 9 A7 i—— B7 、發明説明（） 在本發明之中所敘述的金氧半元件的閘介電層’其組 成材料為二氧化矽材料' 氮化矽材料、Ta205材料與上述 材料的任意組合疊層。 請參閱第一圖，顯示本發明之熱退火設備，利用遠端 微波產生器，在處理器之中形成活性原子，輸入至反應室 中’進行閘氧化層的低溫熱退火製程。遠端微波產生器300 利用一波導305連接至處理器200之中，波導305是將微 波從遠端微波產生器300傳送至處理器200之中。處理器 200具有一個氣體入口 21〇，用來送入氮氣或氧氣，或者 是上述兩種氣體的任意組合。輸入至處理器2〇〇之中的氣 體，經過微波處理之後，將氣體轉換成具有激發態電子的 活性原子，然後經由氣體導管2〇5，經活性原子輸送到反 應室100之中，進行半導體晶圓的低溫熱退火製程。 在處理器之中，氮氣或氧氣經過微波解離之後，所產 生的化學反應如下所述： n2h+n*(活性原子）或者是N3+n(活性原子）； o2^oh〇-+o*+o3*... 這些經過微波解離之後所產生的正負離子，在經過重新結 合之後’會成為具有中性原子’但是具有激發態電子，所 具有較高的能量’這些中性原子被稱為活性原子師e Radical在本發明的一具趙實施例之中，遠端微波產生 器所產生的微波’其頻率係介於3〇〇到3__z之間， 能夠鍵結’達到形成活性原子的目的。 凊參閱第一圖，顯示一般金氧半元件的剖面示意圖， 6 本紙張尺度適用中國國家標準（ (請先閲讀背面之注意事項再填寫本頁)* tT Issued 269, 9 A7 ----- B7 by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention () (Please read. Note on the back before filling out this page: > The first picture shows this The thermal annealing equipment of the invention uses a remote microwave generator to form active atoms in the processor, input them into the reaction chamber, and performs the low-temperature thermal annealing process of the gate oxide layer: and the second picture shows a general metal-oxygen half element Detailed description of the invention: The present invention discloses a method for thermal annealing of a gate oxide layer of a metal oxide half-element using active atoms, and provides a semiconductor substrate as a base of the metal oxide half-element; and deposits an insulating layer. Above the semiconductor substrate, this insulating layer is the gate dielectric layer of the metal-oxygen half element. 'It is a laminate of several layers or a film of a single material. The insulating layer is thermally annealed with active atoms to repair the insulation. Atomic defects in the layer and doped ions into the insulating layer to reduce the leakage current of the insulating layer, wherein the active atom system is selected from the group consisting of active nitrogen atoms, active oxygen atoms, and the above two types. One of the groups formed by any combination of electrons, and the method of forming active atoms is to use microwaves to excite nitrogen or oxygen, so that after microwave treatment, nitrogen or oxygen will become a gas with excited electrons, compared with ordinary gases. Has a high energy; printed by the consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs to form a gate electrode on the insulating layer, the gate electrode, the insulating layer and the semiconductor substrate have a metal-oxygen half structure. In the present invention, the system A remote microwave generator is used to generate microwaves to excite nitrogen and oxygen to generate active atoms with excited electrons. The active dielectric atoms are used for plasma treatment of the gate dielectric layer to repair defects and doping of the gate dielectric layer. Atoms into the gate dielectric layer, reducing the leakage current and charge trapping phenomenon of the gate dielectric layer. 5 This paper size applies the Lai Jia standard (c rule (2 chests, 297 public directors). 5 Employees ’Intellectual Property Bureau consumption "4269 ^ 9 A7 i——B7 printed by h company, description of the invention () The gate dielectric layer of the metal-oxygen half element described in the present invention, its composition material is dioxygen Silicon material 'Silicon nitride material, Ta205 material and any combination of the above materials are stacked. Please refer to the first figure, which shows the thermal annealing equipment of the present invention, using a remote microwave generator to form active atoms in the processor, input To the reaction chamber, the low-temperature thermal annealing process of the gate oxide layer is performed. The remote microwave generator 300 is connected to the processor 200 by a waveguide 305. The waveguide 305 transmits microwaves from the remote microwave generator 300 to the processor. 200. The processor 200 has a gas inlet 21, which is used to feed nitrogen or oxygen, or any combination of the two gases. The gas input into the processor 200 is subjected to microwave processing, and The gas is converted into active atoms having excited state electrons, and then the active atoms are transported into the reaction chamber 100 through the gas conduit 205, and a low-temperature thermal annealing process of a semiconductor wafer is performed. In the processor, the chemical reaction produced by nitrogen or oxygen after microwave dissociation is as follows: n2h + n * (active atom) or N3 + n (active atom); o2 ^ oh〇- + o * + o3 * ... These positive and negative ions generated after microwave dissociation, after recombination, will 'become neutral atoms' but have excited state electrons and have higher energy.' These neutral atoms are called active Atomist e Radical In a Zhao embodiment of the present invention, the microwaves generated by the remote microwave generator have a frequency between 300 and 3_z and can be bonded to achieve the purpose of forming active atoms.凊 Refer to the first figure, which shows a schematic cross-section of a general metal-oxygen half element. 6 This paper size applies to Chinese national standards ((Please read the precautions on the back before filling this page)
4269 1 9 --—----- I -五、發明説明（ A7 B7 經濟部中央榡準局員工消費合作社印製4269 1 9 -------- I-V. Description of the invention (A7 B7 Printed by the Consumers' Cooperative of the Central Government Bureau of the Ministry of Economic Affairs
提供-半導體基材1G，作為金氧半元件的基底。接著，在 半導體基材1G的上方形成場氧化層2()，以定義金氧半元 件的區域 '然後’在場氧化層2〇之間的半導體基材⑺之 上’形成閑介電層30。在形成閘介電層％之後，進行開 介電層30的低溫熱退火製程，將半導體基材1〇放置在第 一圖所不的反應室10〇之中，利用活性原子對閘介電層 進行低溫熱退火製程。 在本發明的較佳具體實施例之中，閘介電層3〇的組 成材料為二氧化矽材料、氮化矽材料、τ^〇5材料與上述 材料的任意組合疊層。以二氧化矽材料作為閘介電層，所 使用的活性原子為單獨使用氮氣，或者氮氣與氧氣的混合 氣體；使用氮化矽材料作為閘介電層，所使用的活性原子 為單獨使用氧氣，或者是氮氣與氧氣的混合氣體；使用 刊2〇5材料作為閘介電層，所使用的活性原子為單獨使用 氧氣，或者是氮氣與氧氣的混合氣體。 在本發明的較佳實施例之中，閘介電層的較佳組成材 料為二氧化矽材料、氮化矽/Ta205組合疊層或是氮化矽材 料。利用二氧化石夕材料作為金氧半元件的閘介電層，在低 溫熱退火製程之後，利用活性原子對二氧化矽材料進行電 漿處理製程，會在接面之處產生氮化矽阻障層，防止在後 續的熱製程之中，產生硼離子擴散至閘介電層的現象。利 用本發明之低溫預後熱退火製程，會摻雜原子到氮化矽層 與Ta2〇5材料之中，修補膜層在沈積製程之中所產生的原 子缺陷，避免在膜層之中所產生的電荷捕獲現象（cha 本紙張尺度遥用中國國家梯準（CNS ) A4規格（2丨0X297公釐〉 {請先閲靖背面之注意事項再填寫本頁} 訂· ----味-------- j— · ϋ 2 6 9 1 9 Α7 --- Β7 經濟部中失標準局員工消費合作社印$» 五、發明説明（） trapping) 〇 再於其上形成閘極40，則閘極40、閘介電層3〇與半 導體基材10，形成一個金氧半疊層結構。最後，在閘介電 層30兩側的半導體基材1〇之中，形成源汲極區域5〇，完 成整個金氧半元件的結構。 在一般的積體電路製造技術之中，對金氧半元件之閘 介電層的預後熱處理製程，通常是使用快速加熱退火製程 (RTP)，所使用的反應氣體為no或n2〇,製程溫度超過8〇〇 °C以上。這種使用高溫的退火製程，會造成金氧半元件之 中不當的離子擴散，而且會使得製程所需的熱預算較高。 在本發明之較佳具體實施例中’使用遠端微波產生 器’產生微波來解離反應氣體，以產生活性原子，對金氧 半元件之閘介電層進行電漿處理，所使用的製程溫度低於 一般所使用的熱退火製程。以Ta2〇5材料而言，利用氧氣 進行預後熱退火製程，若是使用快速熱退火製程，所需的 溫度約在850到1000t之間；若是使用遠端微波產生器所 生成的活性原子’進行電漿處理時，所需的製程溫度係介 於420到500°C之間。根據上述的數據’利用遠端微波產 生器’產生活性原子來進行電漿處理製程，因為活性原子 具有較高的能量，能夠有效摻雜原子至膜層之中，並且修 補膜層之間的缺陷，而僅需要較低的製程溫度。這對於積 體電路製造朝向低溫製程的趨勢，將成為一種很有用的製 程0 本發明以較佳實施例說明如上，而熟悉此領域技藝 8 (请先閱讀背面之注意事項再填寫本頁) 訂 本紙張尺度適用中國國家棣準（CNS ) A4規格（210X29?公釐) 4269 ^ 9 A7 ΙΠ 五、發明説明（） 者，在不脫離本發明之精神範圍内，當可作些許更動潤飾， 其專利保護範圍更當視後附之申請專利範圍及其等同領域 而定。 (讀先閱讀背面之注意事項再填寫本頁) 經潦部中央標隼局貝工消費合作社印製 本紙張尺度適用中國國家標隼（CNS ) Λ4現格（210X 297公蝥）A semiconductor substrate 1G is provided as a base for the metal-oxide half-element. Next, a field oxide layer 2 () is formed over the semiconductor substrate 1G to define a region of the metal-oxide half-elements, and then a 'free dielectric layer 30' is formed 'over the semiconductor substrate ⑺ between the field oxide layers 20. . After forming the gate dielectric layer%, a low-temperature thermal annealing process of the open dielectric layer 30 is performed, and the semiconductor substrate 10 is placed in the reaction chamber 100 shown in the first figure, and the gate dielectric is activated with active atoms. The layer undergoes a low temperature thermal annealing process. In a preferred embodiment of the present invention, the composition material of the gate dielectric layer 30 is a silicon dioxide material, a silicon nitride material, a τ ^ 05 material, and any combination of the foregoing materials. Using silicon dioxide material as the gate dielectric layer, the active atoms used are nitrogen alone, or a mixed gas of nitrogen and oxygen; using silicon nitride material as the gate dielectric layer, the active atoms used are oxygen alone, Or it is a mixed gas of nitrogen and oxygen; using the material of Journal 205 as the gate dielectric layer, the active atom used is oxygen alone, or a mixed gas of nitrogen and oxygen. In a preferred embodiment of the present invention, the preferred composition material of the gate dielectric layer is a silicon dioxide material, a silicon nitride / Ta205 combination stack, or a silicon nitride material. The silicon dioxide material is used as the gate dielectric layer of the metal-oxide half-element. After the low-temperature thermal annealing process, the silicon dioxide material is plasma-treated with active atoms, which will cause silicon nitride resistance at the interface. The barrier layer prevents boron ions from diffusing into the gate dielectric layer during subsequent thermal processes. Using the low-temperature prognosis thermal annealing process of the present invention, atoms will be doped into the silicon nitride layer and the Ta205 material, and atomic defects generated during the deposition process of the film layer will be repaired to avoid the defects generated in the film layer. Charge trapping phenomenon (cha This paper is scaled to the Chinese National Standard (CNS) A4 specification (2 丨 0X297 mm) {Please read the precautions on the back of Jing before filling out this page} Order · ------------ ----- j— · ϋ 2 6 9 1 9 Α7 --- Β7 Printed by the Consumers' Cooperatives of the Bureau of Loss and Standards of the Ministry of Economic Affairs. The gate electrode 40, the gate dielectric layer 30, and the semiconductor substrate 10 form a gold-oxygen semi-laminated structure. Finally, a source drain region 5 is formed in the semiconductor substrate 10 on both sides of the gate dielectric layer 30. 〇, complete the structure of the metal oxide half element. In the general integrated circuit manufacturing technology, the prolonged heat treatment process for the gate dielectric layer of the metal oxide half element is usually a rapid heating annealing process (RTP). The reaction gas is no or n20, and the process temperature exceeds 800 ° C. This kind of high temperature is used The annealing process will cause improper ion diffusion in the metal-oxide half-element, and will cause a higher thermal budget for the process. In a preferred embodiment of the present invention, the use of a remote microwave generator to generate microwaves for dissociation Reactive gas to generate active atoms, plasma treatment of the gate dielectric layer of the metal-oxygen half element, the process temperature used is lower than the commonly used thermal annealing process. In the case of Ta205 materials, oxygen is used for prognosis. For the thermal annealing process, if the rapid thermal annealing process is used, the required temperature is between 850 and 1000t; if the active atoms generated by the remote microwave generator are used for plasma processing, the required process temperature is between 420 to 500 ° C. According to the above data, 'remote microwave generator' is used to generate active atoms for the plasma processing process, because active atoms have higher energy and can effectively dope atoms into the film. And to repair the defects between the film layers, and only requires a lower process temperature. This will become a very important trend for integrated circuit manufacturing towards low-temperature processes. The process of the present invention is described above in the preferred embodiment, and is familiar with the skills in this field. 8 (Please read the notes on the back before filling out this page.) The size of the paper is applicable to China National Standard (CNS) A4 (210X29? (Centi) 4269 ^ 9 A7 ΙΠ 5. The invention description (), without departing from the spirit of the invention, should be slightly modified, the scope of its patent protection should be based on the scope of the attached patent application and its equivalent fields. (Read the precautions on the back before you fill in this page) Printed by the Central Bureau of Standards, Ministry of Standards and Industry, Shellfish Consumer Cooperatives, this paper is printed in accordance with China National Standards (CNS) Λ4 (210X 297)