TW425523B - Universal serial bus converter - Google Patents

Universal serial bus converter Download PDF

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Publication number
TW425523B
TW425523B TW87104000A TW87104000A TW425523B TW 425523 B TW425523 B TW 425523B TW 87104000 A TW87104000 A TW 87104000A TW 87104000 A TW87104000 A TW 87104000A TW 425523 B TW425523 B TW 425523B
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Taiwan
Prior art keywords
serial bus
universal serial
data
command
host controller
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TW87104000A
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Chinese (zh)
Inventor
Shr-Jung Huang
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Integrated Technology Express
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Publication of TW425523B publication Critical patent/TW425523B/en

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Abstract

The present invention relates to an universal serial bus (USB) converter consisting of two USB receivers/transmitters, two serial interface devices, two FIFO controllers, two massive FIFO memory devices, a ROM, a microcontroller, an interruption controller, and a RAM. By means of firmware cooperation of the ROM, USB host controllers on two computers can be connected together for high-speed data transmission.

Description

經濟部中央標準局員工消費合作社印製 4 255 2 3 2558twf.doc/006 A7 ____B7 五、發明説明(/ ) 本發明是有關於·一種通用串列匯流排(Universal Serial Bus ; USB)系統,且特別是有關於一種利用USB系統之主 機控制器(Host Controller)到主機控制器之資料轉換器。 目前’在電腦內部一般使用通用串列匯流排之主機控制 器系統’所以只能夠外接通用串列匯流排裝置功能之元 件’例如USB滑鼠、USB鍵盤以及USB印表機或USB喇 叭等,如第1圖所繪示,爲習知之USB系統下,主機與周 邊元件之連接方塊圖。在圖中包括有電腦主機2、螢幕4、 鏈盤6、集線器8、電話10、麥克風12、喇叭14、滑鼠16 以及筆18,首先電腦主機2連接到集線器8、電話10以及 螢幕4,再經由螢幕4以串列方式連接到麥克風12、喇叭 14以及鍵盤6,再經鏈盤6串接到滑鼠16和筆18。 但是,若想要以兩台電腦之USB主機控制器直接連 接’利用USB具有高傳輸速度功能,進行大量資料傳送的 目的是不可能,因爲USB系統結構,使用菊鏈式(Daisy chain) 佈局,只能存在一個USB主機控制器,不能像通用非同步 接收與 傳輸器(Universal asynchronous receive/transmission;UART)—樣,例如使用 RS232C 協定, 以兩台電腦間之UART相連,加上傳輸程式配合,就可以 進行資料傳送。 因此,本發明的主要目的,爲提供一種通用串列匯流排 轉換器’以改善以菊鏈式之通用串列匯流排系統,只能存 在一個通用串列匯流排主機控_器情形,所以設計一硬體 來模擬具有兩個USB裝置功能之元件,使得兩台電腦之 (請先閲讀背面之注^^項再填寫本頁) οί 裝- 425523 255Stwf.doc/006 A 7 B7 五、發明説明(4 ) USB主機控制器以爲彼此都連接成爲USB裝置。 本發明之另一目的,在提供一種通用串列匯流排轉換 器,以一內建之微處理機和韌體,來處理USB之協定以及 先進先出之讀與寫問題,以達到USB主機控制器資料對傳 之功能,並利用USB高達12Mbps之傳輸速率,來進行大 量資料傳輸之運作。 根據本發明的主要目的,提供一種通用串列匯流排轉換 器,連接在一第一電腦之一第一通用串列匯流排主機控制 器與一第二電腦之一第二通用串列匯流排主機控制器之 間,用以傳送一資料,並共用複數個通用串列匯流排元件, 其中該第一通用串列匯流排主機控制器,送出一第一命 令,且該第二通用串列匯流排主機控制器,送出一第二命 令,用以控制接收傳送該資料,該通用串列匯流排轉換器 包括: 一第一通用串列匯流排接收/傳送器,連接到該第一通 用串列匯流排主機控制器,用以接收傳送該資料以及該第 一命令; 經濟部中央標準局貝工消費合作社印製 (讀先閲讀背面之註意寧項再填寫本頁) 一第二通用串列匯流排接收/傳送器,連接到該第二通 用串列匯流排主機控制器,用以接收傳送該資料以及該第 二命令; 一第一串列介面裝置,連接到該第一通用串列匯流排接 收/傳送器,用以接收傳送該資料以及該第一命令; 一第二串列介面裝置,連接到該第二通用串列匯流排接 收/傳送器,用以接收傳送該資料以及該第二命令; 4 本紙張尺度適用中國國家標準(CNS ) A4規格(2丨0X297公釐) 經濟部中央標準局員工消費合作社印製 425523 2558twf.doc/006 A 7 B7 五、發明説明(3 ) 一第一先進先出器,連接到該第一串列介面裝置,用以 儲存該第一通用串列匯流排主機控制器之該第一命令與接 收傳送該資料; 一第二先進先出器,連接到該第二串列介面裝置,用以 儲存該第二通用串列匯流排主機控制器之該第二命令與接 收傳送該資料; 一隨機存取記憶體,用以暫時存放該資料; 一中斷控制器,產生一中斷服務信號,將該資料放入該 隨機存取記憶體,並控制該第一先進先出之該資料與該第 二先進先出之該資料; 一唯讀記憶體,具有一協定控制軔體,產生一控制信 號,用以協調該第一通用串列匯流排主機控制器與該第二 通用串列匯流排主機控制器之接收傳送該資料; 一微控制器,連接到該唯讀記憶體,並執行該唯讀記憶 體之該控制信號、該中斷控制器之該中斷服務信號、該第 一命令以及該第二命令;以及 一介面匯流排,連接到該第一先進先出器、該第二先進 先出器、該中斷控制器、該隨機存取記憶體以及該微處理 器。 爲讓本發明之上述和其他目的、特徵、和優點能更明顯 易懂,下文特舉一較佳實施例,並配合所附圖式,作詳細 說明如下: 圖式之簡單說明: 第1圖繪示習知之USB系統下,主機與之週邊元件之 5 (請先閱讀背面之注意事項再填寫本頁) 裝. -一0 本紙張尺度適用中國國家標準(CNS ) A4規格(2丨0X297公釐) A7 B7 4 255 2 3 2558twf.doc/006 五、發明説明(¥) 連接方塊圖;以及 第2圖繪示依照本發明之一較佳實施例的一種通用串 列匯流排轉換器之方塊圖。 標號之簡單說明: 2:電腦主機 4:螢幕 6:鍵盤 &集線器 10:電g舌 12:麥克風 14:喇叭 16:滑鼠 18:筆 20,52:電腦 22,54:USB主機控制器 24:通用串列匯流排轉換器 26,50:USB接收/傳送器 28,48:串列介面裝置 3〇,46:控制先進先出器 32,44:大量記憶體先進先出器 34:隨機存取記憶體 36:唯讀記憶體 38:微處理機 40:介面匯流排 本紙張尺度適用中國國家標準(CNS ) Α4規格(2〗〇Χ297公釐) (請先閱讀背面之注意事項再填寫本頁)Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 4 255 2 3 2558twf.doc / 006 A7 ____B7 V. Description of the Invention (/) The present invention is related to a universal serial bus (USB) system, and In particular, there is a data converter using a host controller to a host controller using a USB system. At present, 'the host controller system of a universal serial bus is generally used in a computer', so only external components of the universal serial bus device function can be connected 'such as a USB mouse, a USB keyboard, a USB printer or a USB speaker, such as Figure 1 shows a block diagram of the connection between the host and peripheral components under the conventional USB system. Included in the figure are the host computer 2, screen 4, link 6, hub 8, phone 10, microphone 12, speaker 14, mouse 16, and pen 18. First, host computer 2 is connected to hub 8, phone 10, and screen 4, It is then connected to the microphone 12, the speaker 14 and the keyboard 6 in series via the screen 4, and then connected to the mouse 16 and the pen 18 via the chainring 6. However, if you want to use the USB host controller of two computers to directly connect, 'the use of USB has a high transfer speed function, the purpose of mass data transfer is impossible, because the USB system structure uses a daisy chain layout, There can only be one USB host controller, not like Universal asynchronous receive / transmission (UART). For example, using the RS232C protocol, using a UART connection between two computers, plus the cooperation of a transmission program, Data can be transferred. Therefore, the main object of the present invention is to provide a universal serial bus converter to improve the daisy-chained universal serial bus system. Only one universal serial bus host controller can exist, so design One piece of hardware to simulate two USB device functions, so that two computers (please read the note ^^ on the back before filling this page) οί installation-425523 255Stwf.doc / 006 A 7 B7 V. Description of the invention (4) The USB host controller thinks that they are connected to each other to become a USB device. Another object of the present invention is to provide a universal serial bus converter that uses a built-in microprocessor and firmware to handle USB protocols and FIFO read and write issues to achieve USB host control. Device data transmission function, and the use of USB up to 12Mbps transmission rate to carry out a large number of data transmission operations. According to the main object of the present invention, a universal serial bus converter is provided, which is connected to a first universal serial bus host controller of a first computer and a second universal serial bus host of a second computer. The controllers are used to transmit data and share a plurality of universal serial bus components. The first universal serial bus host controller sends a first command and the second universal serial bus. The host controller sends a second command to control receiving and transmitting the data. The universal serial bus converter includes: a first universal serial bus receiver / transmitter connected to the first universal serial bus A host controller for receiving and transmitting the information and the first command; printed by the Shellfish Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs (read the note on the back first and then fill out this page) A second universal serial bus A receiver / transmitter connected to the second universal serial bus host controller for receiving and transmitting the data and the second command; a first serial interface device connected to A first universal serial bus receiver / transmitter for receiving and transmitting the data and the first command; a second serial interface device connected to the second universal serial bus receiver / transmitter for receiving Send the information and the second order; 4 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (2 丨 0X297 mm) Printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 425523 2558twf.doc / 006 A 7 B7 V. Description of the Invention (3) A first-in-first-out device connected to the first serial interface device for storing the first command of the first universal serial bus host controller and receiving and transmitting the data; a first Two FIFOs connected to the second serial interface device for storing the second command of the second universal serial bus host controller and receiving and transmitting the data; a random access memory for Temporarily storing the data; an interrupt controller, generating an interrupt service signal, putting the data into the random access memory, and controlling the data of the first-in-first-out and the data of the second-first-out A read-only memory with a protocol control block to generate a control signal to coordinate the reception of the first universal serial bus host controller and the second universal serial bus host controller to transmit the Data; a microcontroller connected to the read-only memory and executing the control signal of the read-only memory, the interrupt service signal of the interrupt controller, the first command and the second command; and an interface The bus is connected to the first FIFO, the second FIFO, the interrupt controller, the random access memory, and the microprocessor. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings for detailed description as follows: Brief description of the drawings: FIG. 1 Show 5 of the host and its peripheral components under the known USB system (please read the precautions on the back before filling this page). -1 0 This paper size is applicable to China National Standard (CNS) A4 specification (2 丨 0X297) (Centi) A7 B7 4 255 2 3 2558twf.doc / 006 V. Description of the invention (¥) Connection block diagram; and FIG. 2 shows a block diagram of a universal serial bus converter according to a preferred embodiment of the present invention Illustration. Brief description of the labels: 2: Computer host 4: Screen 6: Keyboard & hub 10: Electric tongue 12: Microphone 14: Speaker 16: Mouse 18: Pen 20, 52: Computer 22, 54: USB host controller 24 : Universal Serial Bus Converter 26, 50: USB Receiver / Transmitter 28, 48: Serial Interface Device 30, 46: Control FIFO 32, 44: Large Memory FIFO 34: Random Storage Take memory 36: read-only memory 38: microprocessor 40: interface bus This paper size is applicable to China National Standard (CNS) Α4 specification (2) 0 × 297 mm) (Please read the precautions on the back before filling in this page)

、1T 經濟部中央標準局員工消費合作社印製 A7 B7 4 2 5 b 2 b 2558twf.doc/0〇6 五、發明説明(夕) 42:中斷控制器 實施例 請參照第2圖,其繪示依照本發明之一較隹實施例的一 種通用串列匯流排轉換器之方塊圖。 在第2圖中,本發明之通用串列匯流排轉換器24連接 在電腦20之USB主機控制器22和電腦52之USB主機控 制器54之間,包括兩個USB接收/傳送器26和50、兩個 串列介面裝置(Serial Interface Engine ; SIE)28 和 48、兩個 控制先進先出器(Control FIFO)30和46、兩個大量記憶體先 進先出器(Bulk FIFO)32和44、一隨機存取記憶體 34(Random Access memory; RAM)、一唯讀記憶體(Read Only Memory ; R〇M)36、一微處理機38、一介面匯流排40以及 一中斷控制器42。 其中,在本發明之通用串列匯流排轉換器24中,控制 先進先出器30和46是一種具有先進先出特性及記憶容量 爲複數個位元組(Byte),用以儲存USB主機控制器22或54 所下命令,然後經由介面匯流排40,轉送到微處理機38 執行命令,處理接下來之任何動作,這包含回答元件身分、 功能等資料給USB主機控制器22或54。 大量記憶體先進先出器32和44也是一種具有先進先 出特性,記憶容量爲數千個位元組,用來儲存USB主機控 制器22或54大量傳輸之資料,再經由微處理機38將資料 收入RAM34,等待到傳送時機,再將資料存入另一個埠的 7 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先聞讀背面之注意事項再填寫本頁) 、τ 經濟部中央標準局員工消費合作社印製 2558twf.doc/006 2558twf.doc/006 經濟部中央標率局員工消費合作杜印製 B7 五、發明説明(έ). 大量記憶體先進先出器44。 微處理機38及ROM%中之韌體’主導對兩個USB系 統之協定之任何傳輸與運送動作,使得同時能夠處理USB 系統上,兩個埠之USB主機控制器所作之半雙工傳輸與接 收,其中,微處理器38例如可爲8031處理器或80M處理 器,至於ROM36之韌體爲儲存控制程式之記憶體,記憶容 量爲數千個位元組。 串連介面裝置28和48,用以詢問可否接收傳送資料與 命令,以作爲USB連接層轉換。USB接收轉換器26和50 爲一類比電路,用以接收由USB主機控制器22和54之命 令與資料。 - 對於中斷控制器42,在每一次傳遞動作結束時,都會 發出一中斷信號給中斷控制器42,然後由中斷控制器42 作優先仲裁後,再產生一中斷服務信號給微處理器38,使 得在ROM之韌體內部含有兩套程序程式,能依所輸入微處 理機38之命令進行運作,分別去服務兩組(USB傳輸接收 器+串列介面裝置+控制先進先出器+大量記憶體先進先出 器)之結構方塊。 其中,當電腦20之USB主機控制器22,要將資料傳送 到電腦52之USB主機控制器54,使得ROM36之韌體模擬 兩電腦20和52之USB主機控制器22和54,以爲都分別 連接在個自之USB系統上,並且進行協調資料在整個傳送 流程中。 運作時,首先電腦20之USB主機控制器22,利用大量 本紙張尺度適用中國國家標车(CNS) A4^_ (2⑴χ297^ ) - (請先閲讀背面之注意事項再鎮寫本頁) .裝. 訂 經濟部中央標準局員工消費合作社印製 4 2552 3 A7 2558twf,doc/006 A/ B7 ___ 五、發明説明(7〉 傳輸(Bulk transfer)方式,將資料及送出資料命令透過USB 接收/傳送器26以及串列介面裝置28 ’分別存入控制先進 先出器30和大量記憶體先進先出器34中’接著經由匯流 排介面40 ,使得中斷控制器42產生一中斷服務信號’給微 處理機38,將大量記憶體先進先出器32中資料’放入 RAM34內部。 當電腦52之USB主機控制器54,利用大量傳輸(Bulk Transfer)方式要求接收資料時’由USB主機控制器54發出 一命令,經由USB接收/傳送器及串連介面裝置48,傳 到控制先進先出器46,再由匯流排介面40送到中斷控制器 42 ’產生一中斷服務信號到微處理機38 ’微處理機38會將 在RAM34之資料,送到大量記憶體先進先出器44,再透 過串連介面裝置48和USB接收/傳送器5〇,傳到電腦52 之USB主機控制器54,達到資料傳送之目的。 爲防止電腦20和電腦52同時下命令情形,而發生衝 突,即資料鎖死(Dead lock) ’所以在設計軟體方面,必須 考慮中斷之優先順序。1.1T printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7 4 2 5 b 2 b 2558twf.doc / 0〇 V. Description of the invention (Evening) 42: Please refer to Figure 2 for an example of an interrupt controller. A block diagram of a universal serial bus converter according to a comparative embodiment of the present invention. In the second figure, the universal serial bus converter 24 of the present invention is connected between the USB host controller 22 of the computer 20 and the USB host controller 54 of the computer 52, and includes two USB receivers / transmitters 26 and 50. , Two Serial Interface Engine (SIE) 28 and 48, Two Control FIFOs (Control FIFO) 30 and 46, Two Massive Memory First In First Out (Bulk FIFO) 32 and 44, A random access memory 34 (Random Access memory; RAM), a read only memory (ROM) 36, a microprocessor 38, an interface bus 40, and an interrupt controller 42. Among them, in the universal serial bus converter 24 of the present invention, the control of the first-in-first-out devices 30 and 46 is a first-in-first-out feature and the memory capacity is a plurality of bytes (Byte) for storing the USB host control. The commands issued by the controller 22 or 54 are then transferred to the microprocessor 38 via the interface bus 40 to execute the commands and process any subsequent actions. This includes responding to the identity, function and other data of the USB host controller 22 or 54. Mass memory first-in-first-out devices 32 and 44 are also a first-in-first-out feature with a memory capacity of thousands of bytes. They are used to store large amounts of data transmitted by the USB host controller 22 or 54. The data is stored in RAM34. Wait until the transmission time, and then store the data in another port. The 7 paper sizes are applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) (please read the precautions on the back before filling this page) , Τ Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 2558twf.doc / 006 2558twf.doc / 006 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economics Du printed B7 5. Description of the Invention 44. The firmware 'in the microprocessor 38 and ROM%' dominates any transmission and delivery of the agreement between the two USB systems, enabling simultaneous processing of half-duplex transmission and The receiver 38 may be, for example, an 8031 processor or an 80M processor, and the firmware of the ROM 36 is a memory for storing a control program, and the memory capacity is thousands of bytes. The serial interface devices 28 and 48 are used to inquire whether it is possible to receive transmission data and commands as a USB connection layer conversion. The USB receiving converters 26 and 50 are analog circuits for receiving commands and data from the USB host controllers 22 and 54. -For the interrupt controller 42, at the end of each transfer action, an interrupt signal is sent to the interrupt controller 42. After the interrupt controller 42 performs priority arbitration, an interrupt service signal is generated to the microprocessor 38, so that The ROM firmware contains two sets of programs, which can operate according to the input command of the microprocessor 38 and serve two groups (USB transmission receiver + serial interface device + control FIFO + large amount of memory). FIFO) structure block. Among them, when the USB host controller 22 of the computer 20 needs to transfer data to the USB host controller 54 of the computer 52, the firmware of the ROM 36 emulates the USB host controllers 22 and 54 of the two computers 20 and 52, thinking that they are connected respectively On a personal USB system, and coordinate data throughout the transfer process. When in operation, first, the USB host controller 22 of the computer 20 uses a large number of paper standards to apply the Chinese National Standard Car (CNS) A4 ^ _ (2⑴χ297 ^)-(Please read the precautions on the back before writing this page). . Order printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 4 2552 3 A7 2558twf, doc / 006 A / B7 ___ V. Description of the invention (7> Bulk transfer method, the data and the data sending command are received / transmitted via USB Device 26 and serial interface device 28 'are stored in the FIFO control device 30 and a large amount of memory FIFO device 34' respectively, and then via the bus interface 40, the interrupt controller 42 generates an interrupt service signal 'for micro processing Machine 38, put a large amount of memory in the first-in-first-out device 32 into the RAM 34. When the USB host controller 54 of the computer 52 requests to receive data by using the Bulk Transfer method, it is issued by the USB host controller 54 A command is transmitted via the USB receiver / transmitter and the serial interface device 48 to the control FIFO 46, and then sent from the bus interface 40 to the interrupt controller 42 'to generate an interrupt service signal to the microprocessor 38 'The microprocessor 38 sends the data in the RAM 34 to a large amount of memory FIFO 44 and then transmits it to the USB host controller 54 of the computer 52 through the serial interface device 48 and the USB receiver / transmitter 50. To achieve the purpose of data transmission. In order to prevent the computer 20 and computer 52 from ordering at the same time and conflicts occur, that is, data lock (Dead lock), so in the design of software, you must consider the priority of interruption.

又爲防止大量記憶體先進先出器32或44,在未μ胃耳又 用記憶容量之資料下,放入超過記憶容量之資料,即過度 放入(Overrun),在未適當放入記憶容量之資料下,取用超 過大量記憶體先進先出器32或44之資料,即不足放入 (imdemm)情形發生’以及過多之USB主機控制器μ再試 之動作。 H 所以,當電腦52所要求傳送之資料,電腦2〇來不及送 9 ^紙張尺度適用中關家標準(CNS ) A4^· ( 2丨0X297公釐) ------ (請先閱讀背面之注意事項再填寫本頁)In order to prevent a large amount of memory, the first-in-first-out device 32 or 44 is used. When the memory capacity is not used in the μ ear and ears, the data exceeding the memory capacity is put, that is, Overrun, and the memory capacity is not properly placed. Under the data, the data of more than a large amount of memory FIFO 32 or 44 is taken, that is, an imdemm situation occurs and too many USB host controller μ try again. H Therefore, when the information requested by computer 52 is transmitted by computer 20, it is too late to send 9 ^ Paper size applies the China Standard (CNS) A4 ^ · (2 丨 0X297 mm) ------ (Please read the back first (Notes for filling in this page)

.1T .> 425523 2558twf.doc/006 ΑΊ B7 五、發明説明(g) 到本發明之通用串列匯流排轉換器24內部之大量記憶體先 進先出器32、或微處理機38來不及處理,將資料放到 RAM34時,串列介面裝置器48會自動送一信號,給電腦 52之USB主機控制器54,要求電腦52再進行重試,此種 程序可能一直重覆,直到微處理機38,將電腦20之資料, 放入大量記憶體先進先出器44爲止,接著串列介面裝置器 48,會在電腦52下一次要求時,將資料傳出去。 因此,本發明之主要特徵,設計一微處理機、一韌體以 及一中斷控制器,來處理兩個USB系統傳送之協定,以及 在大量記憶體先進先出器之資料傳送問題,並利用USB系 統高達12Mbps之傳輸速率,來進行大量資料傳輸之運作。 雖然本發明已以一較佳實施例揭露如上,然其並非用以 限定本發明,任何熟習此技藝者,在不脫離本發明之精神 和範圍內,當可作各種之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者爲準。 I TJ- (請先閲讀背面之注意事項再填寫本頁) •裝· 訂 經濟部中央標準局ΪΚ工消費合作杜印製 本紙張尺度適用中國國家標準(CNS ) Α4規格(210Χ297公釐).1T. ≫ 425523 2558twf.doc / 006 ΑΊ B7 V. Description of the invention (g) A large amount of memory in the universal serial bus converter 24 of the present invention, the FIFO 32, or the microprocessor 38 is too late to process When the data is placed in the RAM 34, the serial interface device 48 will automatically send a signal to the USB host controller 54 of the computer 52 and ask the computer 52 to retry. This procedure may be repeated until the microprocessor 38. Put the data of the computer 20 into a large amount of memory FIFO 44, and then the serial interface device 48 will transfer the data when the computer 52 requests it next time. Therefore, the main feature of the present invention is to design a microprocessor, a firmware, and an interrupt controller to handle the transfer protocol of two USB systems, and the data transfer problem of FIFO in a large amount of memory. The system has a transmission rate of up to 12Mbps for large-scale data transmission. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and decorations without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application. I TJ- (Please read the notes on the back before filling out this page) • Binding and Binding Printed by the Central Standards Bureau of the Ministry of Economic Affairs, Japan, Japan, Japan, Japan, Japan, Japan, Japan, etc. This paper size applies to China National Standard (CNS) Α4 (210 × 297 mm)

Claims (1)

ABCD 425523 2558twf.doc/006 六、申請專利範圍 1.一種通用串列匯流排轉換器,連接在一第一電腦之一 第一通用串列匯流排主機控制器與一第二電腦之一第二通 用串列匯流排主機控制器之間,用以傳送一資料,並共用 複數個通用串列匯流排元件,其中該第一通用串列匯流排 主機控制器,送出一第一命令,該第二通用串列匯流排主 機控制器,送出一第二命令,用以控制接收傳送該資料, 該通用串列匯流排轉換器包括: \ 一第一通用串列匯流排接收/傳送器,連接到該第一通 用串列匯流排主機控制器,用以接收傳送該資料以及該第 一命令; 一第二通用串列匯流排接收/傳送器,連接到該第二逋 用串列匯流排主機控制器,用以接收傳送該資料以及該第 二命令; 一第一串列介面裝置,連接到該第一通用串列匯流排接 收/傳送器,用以接收傳送該資料以及該第一命令; 一第二串列介面裝置,連接到該第二通用串列匯流排接 收/傳送器,用以接收傳送該資料以及該第二命令; 一第一先進先出器,連接到該第一串列介面裝置,用以 儲存該第一通用串列匯流排主機控制器之該第一命令與接 收傳送該資料; 一第二先進先出器,連接到該第二串列介面裝置,用以 儲存該第二通用串列匯流排主機控制器之該第二命令與接 收傳送該資料; 一隨機存取記憶體,用以暫時存放該資料; (請先閱讀背面之注意事項再填寫本頁) 〇 、τ 經濟部中央標準局員工消費合作社印製 本纸張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) A8 B8 C8 D8 4 255 2 3 2558twf.doc/006 六、申請專利範圍 一中斷控制器,產生一中斷服務信號,將該資料放入該 隨機存取記憶體,並控制該第一先進先出之該資料與該第 二先進先出之該資料; 一唯讀記憶體,具有一協定控制軔體,產生一控制信 號,用以協調該第一通用串列匯流排主機控制器與該第二 通用串列匯流排主機控制器之接收傳送該資料; 一微控制器,連接到該唯讀記憶體,並執行該唯讀記憶 體之該控制信號、該中斷控制器之該中斷服務信號、該第 一命令以及該第二命令;以及 —介面匯流排,連接到該第一先進先出器、該第二先進 先出器、該中斷控制器、該隨機存取記憶體以及該微處理 器。 2.如申請專利範圍第1項所述之通用串列匯流排轉換 器,該第一先進先出器更包括: 一第一控制先進先出器,用以儲存該第一通用串列匯流 排主機控制器之該第一命令,連接到該第一串列介面裝 置, 一第一大量記憶體先進先出器, 料,並連接到該第一串列介面裝置 3. 如申請專利範圍第2項所述串列匯流排轉換 器,其中該第一控制先進先出器具個位元組。 4. 如申請專利範圍第2項所述之通用串列匯流排轉換 器,其中該第一大量記憶體先進先出器具有數千個位元 組。 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 請- 先 閱 ik 背 %ABCD 425523 2558twf.doc / 006 6. Scope of patent application 1. A universal serial bus converter, which is connected to one of a first computer, a first universal serial bus host controller and a second computer, a second The universal serial bus host controller is used to transmit a data and share a plurality of universal serial bus components, wherein the first universal serial bus host controller sends a first command and the second The universal serial bus host controller sends a second command to control receiving and transmitting the data. The universal serial bus converter includes: a first universal serial bus receiver / transmitter connected to the A first universal serial bus host controller for receiving and transmitting the data and the first command; a second universal serial bus receiver / transmitter connected to the second universal serial bus host controller For receiving and transmitting the data and the second command; a first serial interface device connected to the first universal serial bus receiver / transmitter for receiving and transmitting the data and First command; a second serial interface device connected to the second universal serial bus receiver / transmitter for receiving and transmitting the data and the second command; a first first-in first-out device connected to the A first serial interface device for storing the first command of the first universal serial bus host controller and receiving and transmitting the data; a second first-in first-out device connected to the second serial interface device, Used to store the second command of the second universal serial bus host controller and to receive and transmit the data; a random access memory to temporarily store the data; (please read the precautions on the back before filling in this Page) 〇 、 τ Printed by the Consumers' Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) A8 B8 C8 D8 4 255 2 3 2558twf.doc / 006 6. Application for patent A range interrupt controller generates an interrupt service signal, puts the data into the random access memory, and controls the first-in-first-out data and the second-in-first-out data. A read-only memory with a protocol control block to generate a control signal to coordinate the reception and transmission of the data between the first universal serial bus host controller and the second universal serial bus host controller A microcontroller connected to the read-only memory and executing the control signal of the read-only memory, the interrupt service signal of the interrupt controller, the first command and the second command; and-interface convergence Row, connected to the first FIFO, the second FIFO, the interrupt controller, the random access memory, and the microprocessor. 2. The universal serial bus converter according to item 1 of the scope of patent application, the first FIFO further comprises: a first control first-in first-out device for storing the first universal serial bus The first command of the host controller is connected to the first serial interface device, a first mass memory FIFO, and is connected to the first serial interface device 3. If the scope of the patent application is the second The serial bus converter according to the item, wherein the first control first-in-first-out device bytes. 4. The general-purpose serial bus converter according to item 2 of the scope of patent application, wherein the first large memory FIFO has thousands of bytes. This paper size applies to China National Standard (CNS) A4 (210X297mm) Please read ik back% 儲存接收傳送該資 經濟部中央標準局員工消費合作社印製 經濟部中央標準局員工消費合作社印製 425523 AS 2558twf.doc/006 Bg C8 D8 六、申請專利範圍 5. 如申請專利範圍第1項所述之通用串列匯流排轉換 器,該第二先進先出器更包括: 一第二控制先進先出器,連接到該第二串列介面裝 置,用以儲存該第二通用串列匯流排主機控制器之該第二 命令> 一第二大量記憶體先進先出器,連接到該第二串列介 面裝置,用以儲存接收傳送該資料。 > 6. 如申請專利範圍第5項所述之通用串列匯流排轉換 器,其中該第二控制先進先出器,具有複數個位元組。 7. 如申請專利範圍第5項所述之通用串列匯流排轉換 器,其中該第二大量記憶體先進先出器,具有數千個位元 組。 8. 如申請專利範圍第1項所述之通用串列匯流排轉換 器,其中該第一通用串列匯流排接收/傳送器與該第二通用 串列匯流排接收/傳送器,係爲一類比電路。 9. 如申請專利範圍第1項所述之通用串列匯流排轉換 器,其中該微處理機係爲一 8031微處理機。 10. 如申請專利範圍第1項所述之通用串列匯流排轉換 器,其中該微處理機係爲一 8051微處理機。 11. 如申請專利範圍第1項所述之通用串列匯流排轉換 器,其中該韌體具有數千個位元組。 12. 如申請專利範圍第1項所述之通用串列匯流排轉換 器,其中該第一命令爲送出該資料,該第二命令爲接收該 資料。 13 本紙張尺度適用中國國家標隼(CNS > A4规格(210X297公釐) (請先閱讀背面之注意事^:填寫本頁)Store, receive and transmit the information printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs. Printed by the Consumers Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs. 425523 AS 2558twf.doc / 006 Bg C8 D8. In the universal serial bus converter described above, the second FIFO further includes: a second control FIFO connected to the second serial interface device for storing the second universal serial bus The second command of the host controller > a second large memory FIFO connected to the second serial interface device for storing, receiving and transmitting the data. > 6. The universal serial bus converter according to item 5 of the scope of patent application, wherein the second control first-in first-out device has a plurality of bytes. 7. The general-purpose serial bus converter according to item 5 of the scope of patent application, wherein the second large amount of memory is a first-in-first-out device having thousands of bytes. 8. The universal serial bus converter according to item 1 of the scope of patent application, wherein the first universal serial bus receiver / transmitter and the second universal serial bus receiver / transmitter are one Analog circuit. 9. The general-purpose serial bus converter according to item 1 of the scope of patent application, wherein the microprocessor is an 8031 microprocessor. 10. The general-purpose serial bus converter according to item 1 of the scope of patent application, wherein the microprocessor is an 8051 microprocessor. 11. The universal serial bus converter according to item 1 of the patent application scope, wherein the firmware has thousands of bytes. 12. The universal serial bus converter according to item 1 of the scope of patent application, wherein the first command is to send the data, and the second command is to receive the data. 13 This paper size applies to the Chinese national standard (CNS > A4 size (210X297 mm) (Please read the note on the back first: fill in this page) :1 5 2 3 2558twf.doc/006 B8 C8 D8 六、申請專利範園 Π.—種通用串列匯流排轉換器,具有接收傳送一資料作 用,連接在一第一電腦之一第一通用串列匯流排主機控制 器與一第二電腦之一第二通用串列匯流排主機控制器之 間,用以傳送一資料,並共用複數個通用串列匯流排元件, 其中該第一通用串列匯流排主機控制器,送出一第一命 令,該第二通用串列匯流排主機控制器,送出一第二命令, 用以控制接收傳送該資料,該通用串列匯流排轉換器包括: 一第一通用串列匯流排接收/傳送器,連接到該第一通 用串列匯流排主機控制器,用以接收傳送該資料以及該第 一命令; 一第二通用串列匯流排接收/傳送器,連接到該第二通 用串列匯流排主機控制器,用以接收傳送該資料以及該第 —*命令; 一第一串列介面裝置,連接到該第一通用串列匯流排接 收/傳送器,用以詢問可接收傳送該資料以及該第一命令; 一第二串列介面裝置,連接到該第二通用串列匯流排接 收/傳送器,用以接收傳送該資料以及該第二命令; 經濟部中央標準局員工消費合作社印製 Γ請先聞讀背面之注意事f界填寫本頁) 一第一控制先進先出器,連接到該第一串列介面裝置, 用以儲存該第一通用串列匯流排主機控制器之該第一命’ 令; 一第二控制先進先出器,連接到該第二串列介面裝置, 用以儲存該第二通用串列匯流排主機控制器之該第二命 令; 一第一大量記憶體先進先出器,連接到該第一串列介面 14 本紙張尺度逋用中國國家標準(CNS ) Α4規格(2〖0Χ297公釐) 425523 2558twf.doc/006 会8 C8 D8 六、申請專利範圍 裝置,用以儲存接收傳送該資料; 一第二大量記憶體先進先出器,連接到該第二串列介面 裝置,用以儲存接收傳送該資料; 一隨機存取記憶體,用以暫時存放該資料; 一中斷控制器,產生一中斷服務信號,將該資料放入該 隨機存取記憶體,並控制該第一大量先進先出之該資料與 該第二大量先進先出之該資料; 一唯讀記憶體,具有一協定控制軔體,產生一控制信 號,用以協調該第一通用串列匯流排主機控制器與該第二 通用串列匯流排主機控制器之接收傳送該資料; 一微控制器,連接到該唯讀記憶體,並執行該唯讀記憶 體之該控制信號、該中斷控制器之該中斷服務信號、該第 —命令以及該第二命令;以及 一介面匯流排,連接到該第一控制先進先出器、該第二 控制先進先出器、該第一大量記憶體先進先出器、該第一 大量記憶體先進先出器、該中斷控制器、該隨機存取記憶 體以及該微處理器。 經濟部中央標丰局員工消費合作社印製 (請先閲讀背面之注意事哥再填寫本頁) 14. 如申請專利範圍第13項所述之通用串列匯流排轉換 器,其中該第一通用串列匯流排接收/傳送器與該第二通用 串列匯流排接收/傳送器,係爲一類比電路。 15. 如申請專利範圍第13項所述之通用串列匯流排轉換 器,其中該第一控制先進先出器與該第二控制先進先出 器,分別具有複數個位元組。 16. 如申請專利範圍第13項所述之通用串列匯流排轉換 本紙張尺度適用中國國家標準(CNS ) A4規格(21〇x297公釐) A8 B8 CS D8 4 2552 3 2558twf.doc/006 六、申請專利範圍 器,其.中該第一大量記憶體先進先出器與該第二大量記憶 體先進先出器,分別具有數千個位元組。 Π.如申請專利範圍第13項所述之通用串列匯流排轉換 器,其中該微處理機係爲一 8031微處理機》 18. 如申請專利範圍第13項所述之通用串列匯流排轉換 器.,其中該微處理機係爲一 8051微處理機。 19. 如申請專利範圍第13項所述之通用串列匯流排轉換 > 器,其中該韌體具有數千個位元組。 2〇.如申請專利範圍第13項所述之通用串列匯流排轉換 器,其中該第一命令爲送出該資料,該第二命令爲接收該 資料。 請 先 閲 拳 1° i 經濟部中央標準局員工消費合作社印製 6 本紙張尺度適用中國國家標準(CNS ) A4規格(210X2奵公釐>: 1 5 2 3 2558twf.doc / 006 B8 C8 D8 VI. Patent Application Fanyuan Π. A universal serial bus converter with the function of receiving and transmitting a data, connected to one of the first universal serial computers A serial bus host controller and a second universal serial bus host controller of a second computer are used to transmit data and share a plurality of universal serial bus components, where the first universal serial The bus host controller sends a first command, and the second universal serial bus host controller sends a second command to control receiving and transmitting the data. The universal serial bus converter includes: a first A universal serial bus receiver / transmitter connected to the first universal serial bus host controller to receive and transmit the data and the first command; a second universal serial bus receiver / transmitter, Connected to the second universal serial bus host controller for receiving and transmitting the data and the-* command; a first serial interface device connected to the first universal serial bus receiving / transmitting Device for inquiring and receiving the data and the first command; a second serial interface device connected to the second universal serial bus receiver / transmitter for receiving and transmitting the data and the second command Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs, please read the notice on the back, and fill in this page) A first-control first-in first-out device connected to the first serial interface device to store the first The first command of a universal serial bus host controller; a second control FIFO connected to the second serial interface device for storing the second universal serial bus host controller The second command; a first large memory first-in-first-out device connected to the first serial interface 14 paper sizes using Chinese National Standard (CNS) A4 specifications (2 〖0 × 297mm) 425523 2558twf.doc / 006 会 8 C8 D8 VI. Patent application device for storing, receiving and transmitting the data; a second large-scale first-in-first-out device, connected to the second serial interface device, for storing receiving and transmitting The data; a random access memory for temporarily storing the data; an interrupt controller that generates an interrupt service signal, places the data in the random access memory, and controls the first mass first-in-first-out The data and the second first-in-first-out data; a read-only memory with a protocol control body to generate a control signal to coordinate the first universal serial bus host controller and the second Receiving and transmitting the data by the universal serial bus host controller; a microcontroller connected to the read-only memory and executing the control signal of the read-only memory, the interrupt service signal of the interrupt controller, the The first command and the second command; and an interface bus connected to the first control FIFO, the second control FIFO, the first mass FIFO, the first mass Memory FIFO, the interrupt controller, the random access memory, and the microprocessor. Printed by the Central Consumer Standards Cooperative Bureau of the Ministry of Economic Affairs (Please read the notice on the back before filling this page) 14. The universal serial bus converter described in item 13 of the scope of patent application, where the first universal The serial bus receiver / transmitter and the second universal serial bus receiver / transmitter are analog circuits. 15. The universal serial bus converter according to item 13 of the scope of patent application, wherein the first control FIFO and the second control FIFO each have a plurality of bytes. 16. The general serial bus conversion as described in item 13 of the scope of the patent application. The paper size applies the Chinese National Standard (CNS) A4 specification (21 × 297 mm) A8 B8 CS D8 4 2552 3 2558twf.doc / 006 6 The patent application scope device, in which the first large memory FIFO and the second large memory FIFO have thousands of bytes, respectively. Π. The universal serial bus converter according to item 13 of the scope of patent application, wherein the microprocessor is an 8031 microprocessor "18. The universal serial bus according to item 13 of the scope of patent application Converter. The microprocessor is an 8051 microprocessor. 19. The universal serial bus converter > as described in item 13 of the patent application scope, wherein the firmware has thousands of bytes. 20. The universal serial bus converter according to item 13 of the patent application scope, wherein the first command is to send the data, and the second command is to receive the data. Please read Boxing 1 ° i Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 6 This paper size applies to the Chinese National Standard (CNS) A4 specification (210X2 奵 mm >
TW87104000A 1998-03-18 1998-03-18 Universal serial bus converter TW425523B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI570627B (en) * 2014-06-06 2017-02-11 蘋果公司 Interface emulator using fifos

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI570627B (en) * 2014-06-06 2017-02-11 蘋果公司 Interface emulator using fifos

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