421794 4158twf,d〇c/002 A7 B7 五、發明説明（I ) 本發明是有關於一種啓動設定之裝置與方法，且特 別是有關於一種PCI匯流排相容元件之啓動設定裝置與 方法，經由連續讀取指令，將JI先儲存在串列式電性可 迷除可程式唯讀記憶體中的組態設定資料，載入PCI組 態暫存器。 科技的日新月異，個人電腦系統（pc)越來越複雜， 許多的系統元件亦是由許多不同的設計者所製造的。所 以新的設計必須具備多變的組態啓動來相容於其他系統 元件。習知較受歡迎的一些方法有： (1) 電源開機啓動設定（P〇wer-On-Strap Setting)，此 種方法爲將元件的某一腳位加入上推（pull-up)或下推 (pull-down)的電路，當電源開啓時元件根據該腳位上推 或下推的狀態，來完成啓動組態設定的動作。. (2) 使用軟體來啓動組態設定，此種方法利用所提 供的驅動程式，當..¾件需要啓動組態設定時，以驅動程 式載入電腦來完成啓動組態設定的動作 (3) 系統讀取儲存在額外的唯讀記憶體（ROM)的啓 動組態設定資料來啓動組態設定，此種方法是使用在個 人電腦的基本輸出入系統（Basic Input Output System， BIOS)，當電腦開機時電腦從基本輸出入系統讀入啓動 組態設定的値來完成啓動組態設定的動作。 綜上所述，習知之技術有下列的缺點： \(i)電源開機啓動組態設定，此方法的缺點是其運 作的模式只能夠以電源開機啓動設定來動作，其設定的 3 本紙張尺度適用中國國家標準（CNS ) A4規袼（2ί〇Χ 297公釐） ：---^—.—J---“裝— C請先鬩讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消費合作社印製 421794 4158twf.doc/002 A7 B7 五、發明説明（i) 模式被完全的限制住了。 (2) 使用軟體來啓動組態設定，此方法的缺點是晶 片設計者必須另外再提供裝置的驅動程式。當驅動程式 要再載入個人電腦系統時，對於系統資源搜尋而言可能 . 就太遲了。 (3) 系統讀取預先儲存在額外的唯讀記憶體（ROM) 的啓動組態設定，此種方法的缺點是當此設計的裝置不 是運用在主機板上時，BIOS將不存在並且沒有辦法啓 動組態設定。· 因此本發明係提供一種PCI匯流排相容元件之啓動 設定方法與裝置，利用一串列式電性可抹除可程式唯讀 記憶體和系統控管通道介面，將組態設定資料送入PCI •組態暫存器中並且完成啓動設定。 本發明將特殊格式的組態設定資料送入PCI組態暫 存器中並且完成啓動設定，其特格式的組態設定資料對 於PCI組態暫存器來說是最有效率的資料。 本發明可隨時利用系統控管通道來更改PCI暫存器 的設定値，並且完成設定後系統控管通道會自動地停 止。 爲達成本發明，因此提出一種PCI匯流排相容元件 之啓動設定裝置與方法，經由連續讀取指令，將預先儲 存在串列式電性可抹除可程式唯讀記憶體中的組態設定 資料，載入PCI組態暫存器。該PCI匯流排相容元件之 啓動設定裝置包括串列式電性可抹除可程式唯讀記憶體 4 本紙張尺度適用中國國家標準（CNS ) A4規格（2丨0><297公釐） f--^------Jl.il-- C (請先閱讀背面之注意事項再填寫本頁) 訂 4 經濟部智慧財產局員工消費合作社印製 421794 4158twf.doc/002 八7 B7 五、發明説明（/ ) .----^---.-丨1-裝-II (請先閱讀背面之注意事項再填寫本頁) (Serial E2PROM)、系統控管通道（System management Bus，SMB)、系統控管通道介面（SMB I/F)、系統控管通 道唯讀記憶體連續讀取狀態器（SMB ROM Sequential Read State Machine)、系統控管通道組態主控制狀態器 (SMB Configure Main Control State Machine)、系統控管 通道組態寫入狀態器（SMB Configure Write Status Machine)、PCI 組態存取狀態器（PCI Configure Write Status Machine)、存取仲裁器（Access Arbiter)、PCI 組態 暫存器（PCI Configuration Registers)、系統控管通道致 能狀態位元（SMB_In_Progress Enable/Status bit)、以及 電源開機啓動設定（P〇wer-On-Strap Setting)。 經濟部智慧財產局員工消費合作社印製 其中該串列式電性可抹除可程式唯讀記憶體，負責 接收連續讀取指令、認可繼續讀取指令，送出組態設定 資料。系統控管通道唯讀記憶體連續讀取狀態器，耦接 至該系統控管通道介面，接收組態資料讀取命令，送出 連續讀取指令，經系統控管通道介面給串列式電性可抹 除可程式唯讀記憶體，來讀取該組態設定資料。系統控 管通道組態主控制狀態器，耦接至系統控管通道唯讀記 憶體連續讀取狀態器，送出組態資料讀取命令，並接收 組態設定資料，送出寫入請求、認可繼續讀取指令、以 及組態設定資料。PCI組態暫存器，用以儲存部分組態 設定資料。系統控管通道組態寫入狀態器，耦接至系統 控管通道組態主控制狀態器，接收寫入請求以及組態設 定資料，並將部分組態設定資料寫入PCI組態暫存器。 5 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） 經濟部智慧財產局員工消費合作社印製 421794 4158twf.doc/002 A7 B7 五、發明説明（K ) PCI組態存取狀態器，用以使該PCI匯流排得以存取PCI 組態暫存器內之部分組態設定資料。存取仲裁器，耦接 至系統控管通道組態寫入狀態器、PCI組態存取狀態器 以及PCI組態暫存器，用以將系統控管通道組態寫入狀 .態器寫入PCI組態暫存器或者PCI組態存取狀態器存取 該PCI組態暫存器。電源開機啓動設定，耦接至；PCI組 態暫存器，用以接收上推電路的信號，並送出開機信號 給PCI組態暫存器。 本發明之'PCI匯流排相容元件之啓動設定方法，是 從與系統控管通道相容之一串列式電性可抹除可程式唯 讀記憶體中，讀取一組態設定資料，並寫入部分該組態 設定資料至一 PCI暫存器。 爲讓本發明之上述目的、特徵、和優點能更明顯易 懂，下文特舉較佳實施例，並配合所附圖式，作詳細說 明如下： 圖式之簡單說明： 第1圖繪示爲本發明一種PCI匯流排相容元件之啓 動設定裝置之方塊圖； 第2圖繪示在串列式電性可抹除可程式唯讀記憶體 中組態設定資料位置圖；以及 第3圖繪示爲本發明一種PCI匯流排相容元件之啓 動設定方法之流程圖。 圖示中標示之簡單說明：. 5 本發明元件之裝置方塊圖 6 ，本紙張尺度適用中國國家標準（CNS ) A4規格（2[0X297公 (請先閱讀背面之注意事項再填寫本頁)421794 4158twf, doc / 002 A7 B7 V. Description of the Invention (I) The present invention relates to a startup setting device and method, and particularly to a startup setting device and method of a PCI bus compatible component. Continuously read the commands, and store the JI in the serial electrical programmable read-only memory configuration setting data and load it into the PCI configuration register. With the rapid development of technology, personal computer systems (PCs) are becoming more and more complex, and many system components are also manufactured by many different designers. Therefore, the new design must have variable configuration startup to be compatible with other system components. Some of the more popular methods are: (1) Power-On-Strap Setting. This method is to add a certain pin of the component to pull-up or push-down. (pull-down) circuit, when the power is turned on, the component completes the action of starting the configuration setting according to the state of the pin being pushed up or down. (2) Use the software to start the configuration settings. This method uses the provided driver. When .. ¾ needs to start the configuration settings, the driver is loaded into the computer to complete the action of starting the configuration settings (3 ) The system reads the startup configuration setting data stored in additional read-only memory (ROM) to start the configuration settings. This method is to use the Basic Input Output System (BIOS) of the personal computer. When the computer is turned on, the computer reads the startup configuration settings from the basic input / output system to complete the startup configuration settings. In summary, the known technology has the following disadvantages: \ (i) Power-on startup configuration settings. The disadvantage of this method is that its operation mode can only be operated by power-on startup settings. The set of 3 paper sizes Applicable to Chinese National Standards (CNS) A4 Regulations (2ί〇Χ 297 mm): --- ^ —.— J --- “Installation — C Please read the notes on the back before filling this page) Order the Ministry of Economic Affairs Printed by the Intellectual Property Bureau employee consumer cooperative 421794 4158twf.doc / 002 A7 B7 V. Description of the invention (i) The mode is completely restricted. (2) Use software to start configuration settings. The disadvantage of this method is the chip designer A device driver must be provided separately. When the driver is reloaded into the personal computer system, it may be too late for system resource searches. (3) The system reads the pre-stored in additional read-only memory ( ROM) boot configuration. The disadvantage of this method is that when the device designed is not used on the motherboard, the BIOS will not exist and there is no way to start the configuration setting. Therefore, the present invention provides a PCI bus phase Rong Yuan Method and device for software startup setting, using a serial electrical erasable programmable read-only memory and system control channel interface to send configuration setting data to PCI • Configuration register and complete startup setting The present invention sends the configuration setting data in a special format to the PCI configuration register and completes the startup setting. The special format configuration setting data is the most efficient data for the PCI configuration register. The invention can use the system control channel to change the setting of the PCI register at any time, and the system control channel will automatically stop after the setting is completed. In order to achieve the invention, a boot setting device for a PCI bus compatible component is proposed, and A method is to load configuration configuration data previously stored in serial electrical erasable programmable read-only memory through a continuous read command into a PCI configuration register. The compatible components of the PCI bus The startup setting device includes a serial electrical erasable and programmable read-only memory 4 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (2 丨 0 > < 297 mm) f-^ ---- --Jl.il-- C (Please Read the notes on the back and then fill out this page) Order 4 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 421794 4158twf.doc / 002 8 7 B7 V. Invention Description (/) .---- ^ ---.- 丨1-Pack-II (Please read the precautions on the back before filling this page) (Serial E2PROM), System Management Bus (SMB), System Control Channel Interface (SMB I / F), System Control Channel read-only memory continuous read state machine (SMB ROM Sequential Read State Machine), system control channel configuration main control state machine (SMB Configure Main Control State Machine), system control channel configuration write state machine (SMB Configure Write Status Machine), PCI Configure Write Status Machine, Access Arbiter, PCI Configuration Registers, System Control Channel Enable Status Bit (SMB_In_Progress Enable / Status bit), and power-on-strap setting. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. The serial electrical erasable programmable read-only memory is responsible for receiving continuous reading instructions, recognizing continued reading instructions, and sending configuration settings data. The system control channel read-only memory continuously reads the state device, which is coupled to the system control channel interface, receives configuration data read commands, sends continuous read commands, and sends serial electrical signals through the system control channel interface. The programmable read-only memory can be erased to read the configuration setting data. System control channel configuration main control state device, which is coupled to the system control channel read-only memory to continuously read the state device, send configuration data read commands, and receive configuration setting data, send write requests, and approve to continue Read commands and configuration data. The PCI configuration register is used to store some configuration setting data. System control channel configuration write state device, coupled to the system control channel configuration main control state device, receives write requests and configuration setting data, and writes some configuration setting data to the PCI configuration register . 5 This paper size applies Chinese National Standard (CNS) A4 (210X 297 mm) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 421794 4158twf.doc / 002 A7 B7 V. Description of Invention (K) PCI Configuration Access Status Device for enabling the PCI bus to access part of the configuration setting data in the PCI configuration register. The access arbiter is coupled to the system control channel configuration write state device, the PCI configuration access state device, and the PCI configuration register to write the system control channel configuration to the state. Enter the PCI configuration register or PCI configuration access state device to access the PCI configuration register. The power-on startup setting is coupled to; the PCI configuration register is used to receive the signal from the push-up circuit and send the boot signal to the PCI configuration register. The method for starting and setting the PCI bus-compatible component of the present invention is to read a configuration setting data from a serial electrical erasable programmable read-only memory compatible with the system control channel. And write part of the configuration data into a PCI register. In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, the preferred embodiments are described below in detail with the accompanying drawings as follows: A brief description of the drawings: FIG. 1 is shown as FIG. 2 is a block diagram of a boot setting device for a PCI bus compatible component according to the present invention; FIG. 2 is a diagram showing a location of configuration setting data in a serial electrical erasable and programmable read-only memory; and FIG. 3 is a diagram showing It is a flowchart of a method for starting and setting a PCI bus compatible component according to the present invention. Brief description marked in the picture:. 5 Block diagram of the device of the present invention 6. This paper size is applicable to China National Standard (CNS) A4 specification (2 [0X297 male (please read the precautions on the back before filling this page)
421794 Δ 7 4i58twf.doc/002 B7 五、發明説明（f) (請先閱讀背面之注意事項再填寫本頁) ι〇 串列式電性可抹除可程式唯讀記憶體 20 系統控管通道 30 系統控管通道介面 40 系統控管通道唯讀記憶體連續讀取狀態器 50 系統控管通道組態主控制狀態器 60 系統控管通道組態寫入狀態器 70 PCI組態存取狀態器 8〇 存取仲裁器 90 PCI組態暫存器 100電源開機啓動設定 110系統控管通道致能狀態位元 120上推電路 125 PCI介面 200串列式電性可抹除可程式唯讀記憶體位址分 布 300串列式電性可抹除可程式唯讀記憶體資料分 布 第一實施例 經濟部智慧財產局員工消費合作社印製 ‘請參照第1圖，.其繪示依照本發明一較佳實施例一 種PCI匯流排相容元件之啓動設定裝置之方塊圖。其裝 置包括串列式電性可抹除可程式唯讀記憶體10,系統控 管通道20，系統控管通道介面30，系統控管通道唯讀 記憶體連續讀取狀態器40,系統控管通道組態主控制狀 態器50，系統控管通道組態寫入狀態器60，PCI組態存 7 本紙張尺度適用中國國家標準（CNS ) A4規格（2Ϊ0Χ 297公釐） 421794 4158twf.doc/002 ^ B7 五'發明説明（6) 取狀態器70，存取仲裁器80，PCI組態暫存器90，電 源開機啓動設定100，系統控管通道致能狀態位元110。 (請先閲讀背面之注意事項再填寫本頁) 請參照第2圖爲依照本發明一較佳實施例在串列式 電性可抹除可程式唯讀記憶體1 0中組態設定資料位置 .圖，每一筆組態設定資料共五位元組，包含一位元組的 .指標位元組代表索引資料以及四位元組的資料位元組。 串列式電性可抹除可程式唯讀記憶體10組態設定資料 在最後的位置放置一結束位元組，本實施例爲AAh，用 以表示結束啓動設定。 經濟部智慧財產局員工消費合作社印製 當電源開啓，上推電路提供電源開機啓動設定100 動作，此時PCI組態暫存器90內之系統控管通道致能 狀態位元110被設定爲致能，系統控管通道組態主控制 狀態器50開始啓動設定。首先系統控管通道組態主控 制狀態器50送出組態資料讀取命令給系統控管通道唯 讀記憶體連續讀取狀態器40，送出連續讀取指令經由系 統控管通道介面30，系統控管通道20到達串列式電性 可抹除可程式唯讀記憶體10。當串列式電性可抹除可程 式唯讀記憶體10收到連續讀取指令時先送出指標位元 組，指標位元組經過系統控管通道20，系統控管通道介 面30，系統控管通道唯讀記憶體連續讀取狀態器40， 由系統控管通道組態主控制狀態器50接收並鎖住（latch) 指標位元組。判斷該指標位元組。當指標位元組爲索引 資料時，系統控管通道組態主控制狀態器50送出認可 繼續讀取指令，認可繼續讀取指令經過系統控管通道唯 8 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） 421794 4 15 8 twf . doc / Ο 02 ^ _ B7____ 五、發明説明（q) 讀記憶體連續讀取狀態器40，系統控管通道介面30， 系統控管通道20,由串列式電性可抹除可程式唯讀記憶 體1〇收到認可繼續讀取指令，並將四位組的資料位元 組送出，資料位元組經過系統控管通道20，系統控管通 .道介面30，系統控管通道唯讀記憶體連續讀取狀態器 40,由系統控管通道組態主控制狀態器50將資料位元 組接收並鎖住。系統控管通道組態主控制狀態器50接 著送出寫入請求，以及組態設定資料給系統控管通道組 態寫入狀態器60。存取仲裁器80判斷PCI組態存取狀 態器7〇的存取狀態，若PCI組態存取狀態器70正在存 取資料，則等待PCI組態存取狀態器70完成存取週期。 當沒有資料在做存取時，設定PCI組態暫存器90的寫 入旗標，並且將資料位元組根據指標位元組的索引資料' 放置於PCI組態暫存器90。完成一筆設定組態寶料的寫 入，並繼續下一筆設定組態資料的寫入。當系統控管通 道組態主控制狀態器50接收到結束位元組’本實施例 中爲AAh時，不再送出認可繼續讀取指令，並且將系 統控管通道致能狀態位元110淸除，完成所有的啓動組 態設定。 該PCI匯流排相容元件之啓動設定裝置’亦可由軟 體載入的方式，來將該系統控管通道致能狀態位元110 更改爲致能，並依照上列所述，完成所有的啓動組態設 定。 以上本發明之PCI匯流排相容元件啓動設定裝置之 9 _ •本紙張尺度適用中國國家榡準（CNS ) M規格（21〇X297公釐） (請先閱讀背面之注意事項再填寫本頁) /装.421794 Δ 7 4i58twf.doc / 002 B7 V. Description of the invention (f) (Please read the notes on the back before filling this page) ι〇 Serial electrical erasable programmable read-only memory 20 System control channel 30 system control channel interface 40 system control channel read-only memory continuous read state device 50 system control channel configuration master control state device 60 system control channel configuration write state device 70 PCI configuration access state device 80 access arbiter 90 PCI configuration register 100 power on startup setting 110 system control channel enable status bit 120 push-up circuit 125 PCI interface 200 serial electrical erasable programmable read-only memory bit Address distribution 300 serial electrical erasable programmable read-only memory data distribution First embodiment Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, please refer to FIG. 1, which shows a preferred embodiment Embodiment A block diagram of a boot setting device for a PCI bus compatible component. The device includes a serial electrical erasable and programmable read-only memory 10, a system control channel 20, a system control channel interface 30, a system control channel read-only memory continuous reading state device 40, and a system control Channel configuration main control state device 50, system control channel configuration write state device 60, PCI configuration storage 7 This paper size is applicable to China National Standard (CNS) A4 specification (2Ϊ0 × 297 mm) 421794 4158twf.doc / 002 ^ B7 Five 'Invention Description (6) State fetcher 70, access arbiter 80, PCI configuration register 90, power-on startup setting 100, system control channel enable status bit 110. (Please read the precautions on the back before filling in this page) Please refer to Figure 2 for the configuration data location in the serial electrical erasable programmable read-only memory 10 according to a preferred embodiment of the present invention. Each figure contains five bytes of configuration data, including one byte. The index byte represents the index data and four bytes of data bytes. The serial electrical erasable programmable read-only memory 10 configuration setting data is placed in the last position with an end byte. This embodiment is AAh, which is used to indicate the end of the startup setting. Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs when the power is turned on, the push-up circuit provides power to start and set the action of 100, at this time the system control channel enable status bit 110 in the PCI configuration register 90 is set to Yes, the system control channel configuration main control state device 50 starts to start setting. First, the system control channel configuration main control state device 50 sends configuration data read commands to the system control channel read-only memory to continuously read the state device 40, and sends continuous read commands through the system control channel interface 30, and the system controls The tube channel 20 reaches the serial electrical erasable programmable read-only memory 10. When the serial electrical erasable programmable read-only memory 10 receives the continuous read command, it first sends out the index byte. The index byte passes through the system control channel 20, the system control channel interface 30, and the system control The channel channel read-only memory continuously reads the state device 40, and the system control channel configuration main control state device 50 receives and latches the indicator byte. Determine the indicator byte. When the index byte is the index data, the system control channel configuration main control state device 50 sends an approval to continue reading command, and the authorization to continue reading command passes the system control channel. Only this paper standard is applicable to Chinese National Standard (CNS) A4 specification (210X 297 mm) 421794 4 15 8 twf .doc / Ο 02 ^ _ B7____ V. Description of the invention (q) Read the memory to continuously read the state device 40, the system control channel interface 30, the system control channel 20 The serial electrical erasable and programmable read-only memory 10 receives the approval to continue reading the command, and sends out the data bytes of the quartet. The data bytes pass through the system control channel 20, the system The control interface 30, the system control channel read-only memory continuously reads the state device 40, and the system control channel configuration main control state device 50 receives and locks the data bytes. The system control channel configuration main control state device 50 then sends a write request, and configures the setting data to the system control channel configuration write state device 60. The access arbiter 80 determines the access status of the PCI configuration access statuser 70. If the PCI configuration access statuser 70 is accessing data, it waits for the PCI configuration access statuser 70 to complete the access cycle. When no data is being accessed, the write flag of the PCI configuration register 90 is set, and the data byte is placed in the PCI configuration register 90 according to the index data of the index byte. The writing of one setting configuration material is completed, and the writing of the next setting configuration data is continued. When the system control channel configuration master control state device 50 receives the end byte 'AAh in this embodiment, it no longer sends an acknowledgement to continue reading the instruction, and the system control channel enable status bit 110 is deleted. To complete all startup configuration settings. The boot setting device of the PCI bus-compatible component can also be loaded by software to change the system control channel enable status bit 110 to enable, and complete all boot groups as described above. State setting. 9 of the above-mentioned PCI bus compatible component startup setting device of the present invention _ • This paper size is applicable to China National Standard (CNS) M specification (21 × 297 mm) (Please read the precautions on the back before filling this page) / Install.
.1T 經濟部智慧財產局員工消費合作社印製 Α7 Β7 415Stwf.doc/002 五、發明説明（^ ) 動作過程可用第3圖之流程圖來說明。 (請先閲讀背面之注意事項再填寫本頁) 步驟130，系統控管通道組態開始，此步驟是開啓 電源，經由上推電路提供，電源開機啓動設定1 00動作。 步驟135，系統控管通道組態致能否，此步驟是將 .PCI組態暫存器90內之系統控管通道致能狀態位元110 設定爲致能。可由電源開機啓動設定100來更改該位元， 亦可可由軟體載入的方式來更改該位元。 步驟190，停止系統控管通道組態，此步驟是當系 統控管通道致能狀態位元110沒有被致能時的動作。 步驟140,發出系統控管通道之連續讀取指令，此 步驟是系統控管通道組態主控制狀態器50命令系統控 管通道唯讀記憶體連續讀取狀態器40，送出連續讀取指 令給串列式電性可抹除可程式唯讀記憶體10。 步驟145,由串列式電性可抹除可程式唯讀記憶體 10中讀取指標位元組，作爲PCI暫存器90之索引，此 步驟是當串列式電性可抹除可程式唯讀記憶體10收到 連續讀取指令時送出指標位元組，由系統控管通道組態 主控制狀態器50接收並鎖住（latch)。 經濟部智慧財產局員工消費合作社印製 步驟150，判斷指標位元組爲AAh，此步驟是判斷 該指標位元組。 步驟155，送出認可繼續讀取指令，此步驟是當該 指標位元組爲索引資料時也就是該指標位元組不是 AAh，系統控管通道組態主控制狀態器50送出認可繼續 讀取指令給串列式電性可抹除可程式唯讀記憶體1〇。 „本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） 421794 415Stwf,doc/002 A7 B7 五、發明説明（"？） 步驟l6〇，由串列電性可抹除可程式唯讀記憶體10 讀取複數個資料位元組，此步驟由串列式電性可抹除可 程式唯讀記憶體10收到認可繼續讀取指令，將四位組 •'的資料位元組送出，並由系統控管通道組態主控制狀態 .器將資料位元組接收並鎖住。並且系統控管通道組 態主控制狀態器5〇接著送出寫入請求，以及組態設定 資料給系統控管通道組態寫入狀態器60。 \步驟165，PCI暫存器是否有存取的動作，此步驟 是由存取仲裁器80判斷PCI組態存取狀態器70的存取 狀態。 步驟170，等待PCI組態週期完成，此步驟是當PCI 組態存取狀態器70正在存取資料，則等待PCI組態存 取狀態器70完成存取週期。 步驟175,設定寫入旗標以指標位元組爲索引將複 數個資料位元組存入PCI組態暫存器90，此步驟是當沒 有資料在做存取時，設定PCI組態暫存器90的寫入旗 標，並且將資料位元組根據指標位元組的索引資料放置 於PCI組態暫存器90。 ¥驟180，不送出認可繼續讀取指令，此步驟是當 該指標位元組爲結束資料時也就是AAh，系統控管通道 組態主控制狀態器50不送出認可繼續讀取指令給串列 式電性可抹除可程式唯讀記憶體10。 步驟185，將系統控管通道致能狀態位元110淸 除，此步驟是系統控管通道組態主控制狀態器50將系 本紙浪尺度適用中國國家標準（CNS ) A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) .裝. 訂 經濟部智慧財產局員工消费合作社印製 經濟部智慧財產局員工消費合作社印製 421794 4158twf.d〇c/002 五、發明説明（β) 統控管通道致能狀態位元般1 1 0淸除。 因此本發明的優點係提出一種PCI匯流排相容元件 之啓動設定方法與裝置，利用一串列式電性可抹除可程 式唯讀記憶體和系統控管通道介面，運用連續讀取指令 將本發明格式的組態設定資料送入PCI組態暫存器中並 且完成啓動組態設定。 本發明的另一優點係將本發明格式的組態設定資料 存在送入PCI組態暫存器中並且完成啓動組態設定，其 中本發明格式的組態設定資料對於PCI組態暫存器來說 是最有效率的組態資料格式。 本發明的再一優點係可隨時利用系統控管通道來更 改PCI暫存器的設定値，並且完成設定後系統控管通道 會自動地停止。 . 綜上所述，雖然本發明已以較佳實施例揭露如上， 然其並非用以限定本發明，任何熟習此技藝者，在不脫 離本發明之精神和範圍內，當可作各種之更動與潤飾， 因此本發明之保護範圍當視後附之申請專利範圍所界定 者爲準。 A7 B7 (請先閱讀背面之注意事項再填寫本頁) •裝. 訂 旅 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐）.1T Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Α7 Β7 415Stwf.doc / 002 V. Description of the invention (^) The operation process can be explained with the flowchart in Figure 3. (Please read the precautions on the back before filling in this page) Step 130, the system control channel configuration begins. This step is to turn on the power, provided by the push-up circuit, and power on to set the setting to 1 00. In step 135, the system control channel configuration is enabled. In this step, the system control channel enable status bit 110 in the .PCI configuration register 90 is set to enable. This bit can be changed by power-on startup setting 100, and can also be changed by software loading. Step 190: Stop the system control channel configuration. This step is an action when the system control channel enable status bit 110 is not enabled. In step 140, a continuous read instruction of the system control channel is issued. In this step, the system control channel configuration main control state device 50 instructs the system control channel read-only memory to continuously read the state device 40, and sends a continuous read instruction to The serial electrical erasable programmable read-only memory 10. Step 145, read the index byte from the serial electrically erasable programmable read-only memory 10 as an index of the PCI register 90. This step is when the serial electrically erasable programmable When the read-only memory 10 receives a continuous read instruction, it sends an index byte, which is received by the system control channel configuration main control state device 50 and latched. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. Step 150, determine the indicator byte as AAh. This step is to determine the indicator byte. In step 155, an authorization continue reading instruction is sent. This step is when the indicator byte is index data, that is, the indicator byte is not AAh, and the system control channel configuration main control state device 50 sends an authorization continue reading instruction. Electrically erasable programmable read-only memory 10 for serial. „This paper size is in accordance with the Chinese National Standard (CNS) A4 specification (210X 297 mm) 421794 415Stwf, doc / 002 A7 B7 V. Description of the invention ("?) Step l60. The serial electrical properties can be erased and programmed. The read-only memory 10 reads a plurality of data bytes. In this step, the serial electrical erasable and programmable read-only memory 10 receives the authorization to continue reading the instruction, and converts the four bits of data bytes. The system control channel configures the main control state. The device receives and locks the data bytes. And the system control channel configuration main control state device 50 then sends a write request and configures the setting data. Write the state controller 60 to the system control channel configuration. \ Step 165, whether the PCI register has access action. This step is to determine the access status of the PCI configuration access state device 70 by the access arbiter 80. Step 170, wait for the PCI configuration cycle to complete. This step is to wait for the PCI configuration access state machine 70 to complete the access cycle when the PCI configuration access state machine 70 is accessing data. Step 175, set the write flag Multiple data bits indexed by index byte The group is stored in the PCI configuration register 90. This step is to set the write flag of the PCI configuration register 90 when no data is being accessed, and the data byte is based on the index of the index byte. The data is placed in the PCI configuration register 90. ¥ 180, continue to read without sending approval, this step is when the indicator byte is the end data, which is AAh, the system control channel configuration main control state device 50 does not send an authorization to continue reading the command to the serial electrical erasable programmable read-only memory 10. Step 185, the system control channel enable status bit 110 is erased, this step is the system control channel group The state master control state device 50 will be based on the Chinese paper standard (CNS) A4 specification (210 X 297 mm) (please read the precautions on the back before filling this page). Pack. Order the staff of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the Consumer Cooperative, printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by the Consumer Cooperative, 421794 4158twf.doc / 002 V. Description of the Invention (β) The status of the enable status of the control channel is 1 1 0. Therefore, the advantages of the present invention PCI bus compatible element The startup setting method and device use a series of electrically erasable programmable read-only memory and a system control channel interface, and use continuous reading instructions to send the configuration setting data in the format of the present invention to the PCI configuration temporarily. And complete the startup configuration setting. Another advantage of the present invention is to save the configuration setting data in the format of the present invention into the PCI configuration register and complete the startup configuration setting, in which the configuration in the format of the present invention The setting data is the most efficient configuration data format for the PCI configuration register. Another advantage of the present invention is that the system control channel can be used to change the setting of the PCI register at any time. The control channel will stop automatically. In summary, although the present invention has been disclosed in the preferred embodiment as above, it is not intended to limit the present invention. Any person skilled in the art can make various changes without departing from the spirit and scope of the present invention. And retouching, therefore, the scope of protection of the present invention shall be determined by the scope of the attached patent application. A7 B7 (Please read the notes on the back before filling out this page) • Binding. Order Travel This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm)