TW418493B - Integrated micro-channel sensor and manufacturing method thereof - Google Patents

Integrated micro-channel sensor and manufacturing method thereof Download PDF

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TW418493B
TW418493B TW87112500A TW87112500A TW418493B TW 418493 B TW418493 B TW 418493B TW 87112500 A TW87112500 A TW 87112500A TW 87112500 A TW87112500 A TW 87112500A TW 418493 B TW418493 B TW 418493B
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layer
component
etching
micro
channel
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TW87112500A
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Chinese (zh)
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Guo-Lung Lei
Tian-Shing Jau
Jen-Guei Jung
Dung-Shing Wu
Ching-Yi Wu
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Ind Tech Res Inst
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Abstract

The present invention is provided to form the device between two protection layers, and form the micro-channel containing devices therein by using the IC manufacturing technique and anisotropic etching. In the manufacturing process, the device and the micro-channel peripheral system can form an isolation. The disclosed inventive manufacturing method can form the closed channel and sensors on the silicon chip simultaneously without bonding the chips. The integrated device is planarized after the processing. The present invention also discloses a manufacturing method for producing the micro-channel device component.

Description

r 418493 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明(/ ) 【發明之應用範疇】 本發明是關於一種積體化微通道元件組件及其製法,特別是關於一種 積體化微通道感測元件及其製法。本發明提供直接將元件以ic製程及非 等向蝕刻技術,直接與微通道積體化於單一晶片之製法,及以該製法製成 之微通道元件。 【發明之背景】 利用半導體加工技術製作微機械之應用已有長足發展。以I C製程製 作各種微機械,特別是各驢測元件,已是各界努力硏發的課題。 在微通道之製作技術方面,瑞典Industrial Microelectronics Center於 1997年提出利用多晶矽作爲犧牲層,以定義非等向性蝕刻區域,進而製作 微通道之技術。該方法係在砂質基板上形成一多晶矽作爲犧牲層,以定義 蝕刻之區域。接著以低壓化學氣相沈積(LPCVD)披覆一層低應力之氮 化砂(SiNx),再以反應性離子餓刻(RIE)法在多晶矽上方之氮化矽層, 蝕刻出許多小孔。將此晶片投入KOH軸刻槽中蝕刻,蝕刻液會將有許多 小孔之氮化砂層下方之多晶矽,以及其下方之矽質基板鈾出一 V形槽。最 後在砂晶片,包括佈滿小孔之氮化砍區域上方,以Si02封住,使之平坦 化,完之製作。IMC公司將此技術應用於光纖被動對準及雷射 二極β^Ρ)難中。 蝕刻形成v形通道後,如將另一玻璃基板或矽晶片與前述 形成V形通道之矽晶片接合(陽極接合或擴散接合),即可組合成一封閉 之微通道。若干微通道感測元件之製法,便是在上述雜板之V麵道正 上方,預先形成感測元件,再進行非等向性蝕刻,直接形成含有感測元件 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) I Ml — — —--- --— — — — — — ^ *---— II--^ (請先閱讀背面之注音心事項再填寫本頁) 8 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明(二) 之V形通道。之後再與另一基板接合。此種作法可見諸如Honda之美國 專利第5,620,929號。 習用技術在砂晶片上製作含有元件之微型通道時,是直接利用蝕刻液 對砂晶片由各方向蝕刻,形成所欲製作之微型通道的下半部。於餓刻同 時,可在砂晶片上預先留下設置元件的區域,以形成一具有元件之開放通 道。最後再在晶片上方以晶片接合技術,將上蓋板(材質爲玻璃或矽晶片) 與該晶片結合,形成一完整之封閉迴路。由於在製程中應用晶片接合技 術,會產生降低良率及提高製程成本等缺點。 因此目前有必要提供一種簡化的積體化微通道元件組件之製法,可將 含元件之微小通道,積體化於單一矽晶片上,而不須使用晶片接合技術。 同時也必須有一種積體化微通道元件組件之製法,可將封閉通道及元件同 時形成在矽晶片上。此外,也必須有一種積體化微通道元件組件之製法, 提供在元件製作中,同時完成平坦化之目的。 【發明之目的】 本發明之目的在提供一種新穎的積體化微通道感測元件及其製法。 本發明之目的也在提供一種簡化的積體化微通道元件組件之製法,可 將含元件之微小通道,積體化於單一矽晶片上,而不須使用晶片接合技術。 本發明之目的也在提供一種積體化微通道感測元件之製法,可將封閉 通道及感測元件同時形成在砂晶片上。 本發明之目的也在提供一種積體化微通道元件組件之製法,以在元件 製作中,同時完成平坦化之目的。 本發明之目的也在提供一種與一般1C製程相容的積體化微通道感測 請 先 閱 讀 背 拳r 418493 A7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (/) [Application scope of the invention] The present invention relates to an integrated microchannel element assembly and its manufacturing method, especially to an integrated Micro-channel sensing element and manufacturing method thereof. The invention provides a manufacturing method of directly integrating a device with an ic process and an anisotropic etching technology, and integrating the microchannel with a single wafer directly, and a microchannel device manufactured by the manufacturing method. [Background of the Invention] The use of semiconductor processing technology to make micromechanics has made considerable progress. The manufacture of various micro-machines, especially the donkey measuring elements, using the IC process has been a subject that has been endeavored by various circles. In terms of microchannel fabrication technology, the Swedish Industrial Microelectronics Center proposed in 1997 a technique for making microchannels by using polycrystalline silicon as a sacrificial layer to define anisotropically etched areas. This method forms a polycrystalline silicon as a sacrificial layer on a sandy substrate to define an etched area. Then, a layer of low-stress silicon nitride (SiNx) was coated with low-pressure chemical vapor deposition (LPCVD), and then a number of small holes were etched on the silicon nitride layer over polycrystalline silicon by reactive ion etching (RIE). This wafer is etched into a KOH shaft groove, and the etchant will form a V-shaped groove under the polycrystalline silicon under the nitrided sand layer with many small holes and the silicon substrate uranium under it. Finally, the sand wafer, including the nitrided area covered with small holes, was sealed with SiO2 to make it flat and finished. IMC applies this technology to passive fiber alignment and laser diode (β ^ P) difficulties. After the v-shaped channel is formed by etching, if another glass substrate or a silicon wafer is bonded to the aforementioned silicon wafer forming the V-shaped channel (anodic bonding or diffusion bonding), a closed microchannel can be combined. The manufacturing method of several micro-channel sensing elements is to form the sensing element in advance directly above the V plane of the above-mentioned hybrid plate, and then perform anisotropic etching to directly form the paper containing the sensing element. This paper applies Chinese national standards ( CNS) A4 specification (210 X 297 mm) I Ml — — — —--— — — — — — ^ * ---— II-^ (Please read the note on the back of the phonetic note before filling out this page ) 8 A7 B7 V-shaped passage printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. It is then bonded to another substrate. Such an approach can be seen in, for example, U.S. Patent No. 5,620,929 to Honda. When conventional techniques are used to make micro-channels containing components on a sand wafer, the sand wafer is etched from all directions directly using an etchant to form the lower half of the desired micro-channel. At the same time, it is possible to leave an area where the component is arranged on the sand wafer in advance to form an open channel with the component. Finally, the top cover (made of glass or silicon wafer) is combined with the wafer by wafer bonding technology above the wafer to form a complete closed circuit. Due to the application of wafer bonding technology in the process, there are disadvantages such as lower yield and higher process costs. Therefore, it is necessary to provide a simplified manufacturing method of integrated microchannel element assembly, which can integrate the microchannels containing components on a single silicon wafer without using wafer bonding technology. At the same time, there must be a manufacturing method of integrated microchannel element components, which can form closed channels and components on a silicon wafer at the same time. In addition, there must also be a method for manufacturing an integrated microchannel element assembly, which is provided in the element manufacturing and at the same time completes the purpose of planarization. [Objective of the Invention] The object of the present invention is to provide a novel integrated microchannel sensing element and a method for manufacturing the same. The object of the present invention is also to provide a simplified method for manufacturing an integrated micro-channel component assembly, which can integrate micro-channels containing components on a single silicon wafer without using wafer bonding technology. An object of the present invention is also to provide a method for manufacturing an integrated micro-channel sensing element, which can form a closed channel and a sensing element on a sand wafer at the same time. The object of the present invention is also to provide a method for manufacturing an integrated microchannel element assembly, so as to achieve the purpose of planarization at the same time in the fabrication of the element. The purpose of the present invention is also to provide an integrated micro-channel sensing that is compatible with the general 1C process.

再 填 寫裝 頁I 訂 線 本紙張尺度適用中國國家標準(CNS)A4規格(21〇 X 297公釐) A7 4 1849 3 五、發明說明(:)) 元件之製法。 本發明之目的也在提供一種以上述方法製成之積體化微通道元件組 件。 [發明之簡述] 本發明所揭示之製法,乃是將元件形成於微通道基板與犧牲層之間, 元件則以保護層與外界環境隔絕。利用1C製造技術及非等向餓刻,蝕刻 該犧牲層及其下之基板,彤成內含元件之微小通道。在製作過程中,元件 與微小通道週邊系統可形成隔絕,以防止外界環境影響元件之準確性。本 發明所揭示之製作方法可將封閉通道及元件同時形成在砂晶片上,不須再 經晶片接合。整體元件在完成後均處於平坦狀態,在後續的製程中不須處 理元件平坦化的問題。本發明並揭示以上述製法製得之微通道元件組件。 上述及其他本發明之目的及優點,可由以下詳細說明,並參照下列圖 式,而更形淸楚。 【圖式之說明】 第1圖顯示本發明積體化微通道感測元件之製法一實施例之流程示 意圖。 第2圖爲其製成之積體化微通道感測元件結構示意圖。 【發明之詳細說明】 本發明所揭示之積體化微通道感測元件及其製法,可以適用在其他具 有電子電路元件之微通道組件。本發明之製法是將元件形成於兩層保護層 之間,再利用傳統1C製造技術及非等向蝕刻技藝,形成微小通道。在製 作過程中,元件與微小通道週邊系統可形成熱隔絕’以防止外界環境之熱 5 :--------^ in----訂----I ---線 ΐ請先間讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用令國國家標準(CNS)A4規格(210 x 297公釐) A7 418493 五、發明說明(// ) 效應影響元件之性質。換言之,本發明之製作方法可將整個封閉通道及元 件同時形成在矽晶片上,不須再倚賴晶片接合技術。不僅省去一道製程’ 也將提高製程良率。經由本發明方法製成之組件,晶片均處於平坦狀態, 故在後續的製程中並無須解決傳統技術中MEMS元件平坦化的問題。其 後晶片的後續處理與一般1C製程相同’不需要有特別處理技術及成本。 以下以熱敏電阻之感測元件爲例,根據圖式說明本發明之積體化_ 道感測元件及其製法之實施例。第1圖顯示本發明積體化微通道感測元件 之製法一實施例之流程示意圖。第2圖爲其製成之積體化微通道感測元件 結構示意圖。 如第I圖所示,於製備積體化麵道感測元件時,首先,於(101) 置備一(100掀晶片基板(1),並在該矽晶片(1)上成長一層氮化砂SiNx層 (2)。接著,以蝕刻方式,在該SiNx層(2)開出窗口 (3)及窗口(4),但留下中 間部份,作爲保護層(5),如第1圖之(101)所示。 其後,於(102)在該保護層(5)上鍍上一層熱敏電阻(或發熱薄膜)⑹, 作爲感測元件(如使用發熱薄膜,則作爲發熱元件(6))。此時,該熱 敏電阻(或發熱薄膜)⑹在SiNx (2)中間的保護層(5)上方的部份,須比該保 護層(5)寬度窄,以便將感測元件包覆於兩層保護層之間,於蝕刻微通道 時,不致受到蝕刻。保護層之材料包括SiNx ’但其他抗蝕刻材料,亦可 適用。接著,再成長一層SiNx層⑺,並在該SiNx層⑺上開出窗口⑻及 窗口(9),留下中間部份,作爲保護層(1〇),如第1圖(102)所示。於此, 保護層(1〇)之寬度也較感測元件(1)位於該處部份爲寬。窗口(8)、 (9)之大小及位置,大致與窗口(3) (4)相同。 <請先閱讀背面之注意事項再填寫本頁) 裝-------訂—I------線 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公t ) 1 A7 418493 五、發明說明(〇 其次於(103),在該窗口(8)、窗口(9)及保護層(10)之上方長成一層 犧牲層(11),並在中間的保護層(10)的正上方開出窗口(12)。如第1圖(1〇3) 所示。於(104 )在保護層(10 )上方再成長一層SiNx層(13),並在該SiNx 層(13)上開出窗口(14)。窗口(14)密佈於窗口⑻、窗口(9)之正上方,如第1 圖(104)所示。 於(1〇5 )將此晶片投入餓刻槽中,以蝕刻液蝕去犧牲層(11)後,繼續 利用非等向蝕刻液於砍晶片⑴上蝕刻出V形槽。如第1圖(105 )所示。 最後在SiNx (13)上方披上一層保護厭15),將所有窗口(14)都封閉,成爲 第1圖(106)所示之結構。 以上述步驟完成之積體化微通道感測元件,其結構如第2圖所示。圖 中,⑴爲矽晶片基板,(2)爲氮化矽層,(3)爲窗口,(4)爲窗口,(5)爲保護 層,⑹爲元件,⑺爲SiNx層,⑻爲窗口,(9)爲窗口,(10)爲保護層,(11) 爲犧牲層,(12僞窗口,(13)爲SiNx層,(14)爲窗口,(15)爲保護層。 【發明之效果】 如上所示,本發明之積體化微通道元件之製法’係將元件形成於兩層 保護層之間,於蝕刻微通道時,不致受到鈾刻。利用這種設計,可以實現 以傳統I C製程及非等向蝕刻技藝,將內含元件之微小通道,積體化於單 一砂晶片上。在製程中,元件與微小通道週邊系統可形成熱隔絕,以防止 外界賴之熱效應影響元件之準確性。 本發明所揭示之製作方法可將整個封閉通道及元件同時形成在砂晶 片上,不須倚賴晶片接合技術。不僅省去一道製程’也將提高製程良率。 由上述說明也可得知,本發明方法製成之組件’晶片均處於平坦狀態,故 7 - ----— — — — — IP— - I If--II 訂·------I-線 c請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS〉A4規格(2〗0 X 297公釐) 4'㈣ 93 五、發明說明(心) 在後續的製程中並無須解決元件平坦化的問題。其後晶片的後續處理與一 般ic製程相同,不需要有特別處理技術及成本。 在上述說明中,保護層是以SiNx爲材質,但在實際應用上,也可利 用其讎用之材料形成保護層。此外,也可考慮將基材與保護層’麵高 分子材料,一^成形。適用於本發明之鈾刻液,通常可以氫氧化鉀,但是 利用其他適用之蝕刻液,或以非化學餓刻,若能達到類似效果’均可應用 於本發明。 此外,在上述說明中係以熱敏電阻作爲感測元件之實施例,以發熱薄 膜作爲發熱元件之實施例。其他感測元件、發熱元件,乃至於其他電子電 路元件,只要適於上述製程,均可以本發明之方法製備。 以上是對本發明積體化微通道感測元件及其製法實施例之說明。習於 斯藝之人士不難由上述說明,了解本發明之精神,並據以作出各種變化與 衍伸。惟無論如何,均屬於本發明之範圍內。 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公楚)Refill Page I Alignment This paper size applies to China National Standard (CNS) A4 (21 × 297 mm) A7 4 1849 3 V. Description of Invention (:)) Component manufacturing method. The object of the present invention is also to provide an integrated microchannel element assembly manufactured by the above method. [Brief description of the invention] The manufacturing method disclosed in the present invention is to form an element between a micro-channel substrate and a sacrificial layer, and the element is isolated from the external environment by a protective layer. Using 1C manufacturing technology and anisotropic engraving, the sacrificial layer and the substrate underneath are etched to form tiny channels containing components. During the manufacturing process, the components can be isolated from the microchannel peripheral system to prevent the external environment from affecting the accuracy of the components. The manufacturing method disclosed in the present invention can form a closed channel and a component on a sand wafer at the same time, and it is unnecessary to bond the wafer. The whole components are in a flat state after completion, and the problem of flattening the components need not be dealt with in the subsequent processes. The invention also discloses a micro-channel element assembly obtained by the above-mentioned manufacturing method. The above and other objects and advantages of the present invention can be further described by the following detailed description and the following drawings. [Explanation of the drawing] Fig. 1 shows a schematic flow chart of an embodiment of a method for manufacturing an integrated microchannel sensing element according to the present invention. Figure 2 is a schematic diagram of the structure of the integrated micro-channel sensing element. [Detailed description of the invention] The integrated micro-channel sensing element and its manufacturing method disclosed in the present invention can be applied to other micro-channel components with electronic circuit elements. The manufacturing method of the present invention is to form a component between two protective layers, and then use the traditional 1C manufacturing technology and anisotropic etching technology to form a microchannel. During the manufacturing process, the components and the micro-channel peripheral system can form thermal insulation to prevent heat from the external environment. 5: -------- ^ in ---- order ---- I --- line Read the notes on the back first and then fill out this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Cooperatives, Paper Size Applicable National Standard (CNS) A4 Specification (210 x 297 mm) A7 418493 V. Description of Invention (/ /) The effect affects the nature of the component. In other words, the manufacturing method of the present invention can form the entire closed channel and the component on the silicon wafer at the same time, without relying on the wafer bonding technology. Not only omitting a process ’will also improve process yield. For the components made by the method of the present invention, the wafers are all in a flat state, so it is not necessary to solve the problem of planarization of the MEMS element in the conventional technology in the subsequent process. Subsequent processing of the wafer is the same as the general 1C process' and does not require special processing techniques and costs. In the following, the sensing element of the thermistor is taken as an example to explain an embodiment of the integrated sensing element of the present invention and its manufacturing method according to the drawings. FIG. 1 is a schematic flowchart of an embodiment of a method for manufacturing an integrated microchannel sensing element according to the present invention. Figure 2 is a schematic diagram of the structure of the integrated microchannel sensing element. As shown in Figure I, when preparing the integrated surface sensing element, first, a (100 flip chip substrate (1) is prepared at (101), and a layer of nitrided sand is grown on the silicon wafer (1). SiNx layer (2). Next, a window (3) and a window (4) are opened in the SiNx layer (2) by etching, but the middle part is left as a protective layer (5), as shown in FIG. 1 (101). Thereafter, a layer of thermistor (or heating film) 薄膜 is plated on (102) on the protective layer (5) as a sensing element (if a heating film is used, it is used as a heating element (6 )). At this time, the part of the thermistor (or heat-generating film) above the protective layer (5) in the middle of SiNx (2) must be narrower than the protective layer (5) in order to package the sensing element. It is covered between two protective layers, which will not be etched when the microchannel is etched. The material of the protective layer includes SiNx ', but other anti-etching materials can also be used. Then, another SiNx layer is grown, and the SiNx layer The window ⑻ and window (9) are opened on ⑺, leaving the middle part as the protective layer (10), as shown in Figure 1 (102). Here, the width of the protective layer (10) is also more sensitive. Measurement The component (1) is wide at this location. The size and position of the windows (8), (9) are roughly the same as the windows (3) (4). ≪ Please read the precautions on the back before filling this page) Packing ------- Order-I ------ Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. The paper size is applicable to Chinese National Standard (CNS) A4 (210 X 297 g) 1 A7 418493 5. Description of the invention (0 followed by (103), a layer of sacrificial layer (11) is grown above the window (8), window (9) and protective layer (10), and the middle protective layer (10) A window (12) is opened directly above, as shown in Figure 1 (103). At (104), a further SiNx layer (13) is grown on the protective layer (10), and on the SiNx layer (13) The window (14) is opened. The window (14) is densely arranged on the window frame and directly above the window (9), as shown in Fig. 1 (104). The wafer is placed in the starved groove at (105) to After the sacrificial layer (11) is removed by the etching solution, the non-isotropic etching solution is used to etch a V-shaped groove on the chipped wafer. As shown in Figure 1 (105). Finally, a layer of protection is placed on the SiNx (13). Annoyed 15), all windows (14) are closed and become The structure shown in Fig. 1 (106). The integrated microchannel sensing element completed by the above steps has a structure as shown in FIG. 2. In the figure, ⑴ is a silicon wafer substrate, (2) is a silicon nitride layer, (3) is a window, (4) is a window, (5) is a protective layer, ⑹ is an element, ⑺ is a SiNx layer, and ⑻ is a window. (9) is a window, (10) is a protective layer, (11) is a sacrificial layer, (12 pseudo windows, (13) is a SiNx layer, (14) is a window, and (15) is a protective layer. [Effects of the Invention] As shown above, the method of manufacturing an integrated microchannel device according to the present invention is to form a device between two protective layers, and it will not be etched by uranium when the microchannel is etched. With this design, the traditional IC process can be realized. And non-isotropic etching technology, the micro-channels containing components are integrated on a single sand wafer. During the process, the components and the micro-channel peripheral system can be thermally isolated to prevent external heat effects from affecting the accuracy of the components The manufacturing method disclosed in the present invention can form the entire closed channel and components on the sand wafer at the same time, without relying on the wafer bonding technology. Not only omitting a process, but also improving the yield of the process. It can also be learned from the above description that The wafers of the components made by the method of the present invention are everywhere It is flat, so 7----- — — — — — IP —-I If--II order · ------ I-line c, please read the notes on the back before filling this page) Ministry of Economic Affairs Printed by the Intellectual Property Bureau Staff Consumer Cooperatives The paper size is applicable to Chinese national standards (CNS> A4 specification (2〗 0 X 297 mm) 4'㈣ 93 V. Description of the invention (heart) It is not necessary to solve the flatness of components in the subsequent process The subsequent processing of the wafer is the same as the general IC process, and no special processing technology and cost are required. In the above description, the protective layer is made of SiNx, but in practical applications, it can also be used. The material forms a protective layer. In addition, it is also possible to consider forming the substrate and the protective layer of the polymer material on the surface. The uranium etching solution suitable for the present invention can usually be potassium hydroxide, but other suitable etching solutions are used. Or if it is non-chemically carved, if similar effects can be achieved, it can be applied to the present invention. In addition, in the above description, the thermistor is used as the sensing element, and the heat-generating film is used as the heat-generating element. Others Sensing element, hair Thermal elements, and even other electronic circuit elements, can be prepared by the method of the present invention as long as they are suitable for the above-mentioned process. The above is an explanation of the integrated microchannel sensing element of the present invention and the embodiment of its manufacturing method. It is not difficult to understand the spirit of the present invention from the above description, and make various changes and extensions based on it. However, it is within the scope of the present invention in any case. (Please read the precautions on the back before filling this page) Wisdom of the Ministry of Economic Affairs The paper size printed by the Property Cooperative's Consumer Cooperative is applicable to China National Standard (CNS) A4 (210 X 297)

Claims (1)

888ΰ ABCS 經濟部智慧財產局員工消費合作社印製 六、申請專利範圍 1. 一種具有元件之微通道組件’包括: 一基板: 形成於該基板上之微通道; 該微通道之上蓋;及 固定於該微通道上蓋,位於該微通道內之元件; 其特徵在於’該元件具有一封閉之保護層,在微通道組件加工時可使 該元件不受損傷;且該保護層係一高熱傳導係數之抗触刻材料。 2. 如申請專利範圍第1項之組件,其中之元件爲感測元件。 3. 如申請專利範圍第1項之組件,其中之元件爲發熱元件。 4. 如申請專利範圍第1項之組件*其中該保護層爲SiNx。 5. 如申請專利範圍第卜2、3或4項之組件,其中該感測元件係以SiNx 固定於該上蓋。 6. —種製備具有元件之微通道組件之方法,包括: 製備一基板; 於次基板上形成一第一抗餓刻層,該第一抗蝕刻層開設至少一蝕刻 2¾ * 窗, 於該第一抗鈾刻層上方,未開設蝕刻窗之部份形成一元件材料; 於該第一抗翻層上方形成一第二抗餓刻層,該第二抗鈾刻層與該第. 一抗蝕刻層緊密包覆該感測元件材料,並開設與該第一抗蝕刻層位置及大 小實質相同之至少一蝕刻窗; 在該第二抗蝕刻層上方形成一犧牲層; 在該犧牲層上方形成一第三抗蝕刻層,該第三抗飽刻層相對該第一及 本紙張尺度適用中國國家標準(CNS)A4蜆格(210 X 297公釐) I J.--J I I----- I I--—II 訂·! !!線 {請先閱讀背面之注意事項再填寫本頁) AS B8 C8 D8888ΰ Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs of the ABCS 6. Application scope of patents 1. A micro-channel component with components includes: a substrate: a micro-channel formed on the substrate; a cover of the micro-channel; and fixed on The microchannel cover is a component located in the microchannel; it is characterized in that 'the component has a closed protective layer that can protect the component from damage during the processing of the microchannel component; Anti-etching material. 2. If the component of the scope of patent application is No. 1, the component is a sensing component. 3. As for the component in the scope of patent application, the component is a heating element. 4. If the component of the scope of patent application No. 1 * wherein the protective layer is SiNx. 5. For a component in the scope of claim 2, 2, or 4, wherein the sensing element is fixed to the upper cover with SiNx. 6. —A method for preparing a micro-channel component with a component, comprising: preparing a substrate; forming a first anti-hunger etched layer on a sub-substrate, the first anti-etching layer opening at least one etch 2¾ * window in the first Above a uranium-resistant etched layer, a portion of the etching resist is not formed to form an element material; a second anti-hunger etched layer is formed above the first anti-turned layer, the second uranium-resistant etched layer and the first anti-etching A layer tightly covering the sensing element material, and opening at least one etching window substantially the same in position and size as the first anti-etching layer; forming a sacrificial layer over the second anti-etching layer; forming a sacrificial layer over the sacrificial layer The third anti-etching layer, the third anti-saturation layer is applicable to the Chinese National Standard (CNS) A4 grid (210 X 297 mm) relative to the first and this paper size. I J .-- JI I ----- I I --- II Order! !! ! Line (Please read the notes on the back before filling this page) AS B8 C8 D8 4Ί8Α93 、申請專利範圍 第二抗蝕刻層之蝕刻窗之位置形成多數蝕刻孔; 將完成之組件置於一蝕刻液中蝕刻該犧牲層及該基板位於該犧牲層 下方部份;及 在該第三抗蝕刻層上方形成一封閉層。 7. 如申請專利範圍第6項之方法,其中該元件材料爲一感測元件材料。 8. 如申請專利範圍第ό項之方法,其中該元件材料爲一發熱元件材料。 9. 如申請專利範圍第6、7或8項之方法,其中該抗蝕刻層爲一高熱傳 導係數材料。 10. 如申請專利範園 方法,其中該抗蝕刻層爲SiNx <請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)4Ί8Α93, the majority of the etching holes are formed at the position of the etching window of the second anti-etching layer in the patent application range; the completed component is placed in an etching solution to etch the sacrificial layer and the portion of the substrate below the sacrificial layer; and in the third A sealing layer is formed above the anti-etching layer. 7. The method according to item 6 of the patent application, wherein the element material is a sensing element material. 8. The method of claim 6 wherein the element material is a heating element material. 9. The method according to claim 6, 7, or 8, wherein the anti-etching layer is a high thermal conductivity material. 10. If applying for the patented Fanyuan method, where the anti-etching layer is SiNx < please read the precautions on the back before filling out this page) Printed on paper scales applicable to Chinese National Standards (CNS) A4 size (210 X 297 mm)
TW87112500A 1998-07-29 1998-07-29 Integrated micro-channel sensor and manufacturing method thereof TW418493B (en)

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