經濟部中央標準局貝工消费合作社印裝 406372 at 4379twf-doc/008 ___B7 五、發明説明（f ) 本發明是有關於一種半導體元件之多重內連線 (Multilevel Interconnects)的製造方法’且持別是有^於 一種雙重金屬鑲嵌（Dual Damascene)結構的製&方法 當單位面積上的積體電路元件數目不斷地增^、關鍵 尺寸不斷縮減之際’材料的特性要求將更爲嚴謹，否則時 間常數（RC Constant)的延遲必然是元件速度增加的最大阻 力。而元件中電阻的主要來源爲佈滿在元件上的多層金屬 連線，因此金屬的選擇將是未來積體電路工業的主要課 題。 銅金屬由於其本身具有低電阻率、高抗電遷移性以及 可以以化學氣相沈積與電鍍方式成長的優點，因此在深次 微米元件其多層金屬連線的運用上備受矚目。然而，在應 \/用銅金屬時’仍存在一些問題亟待解決。例如，銅金屬在 空氣中容易氧化並且容易受濕氣的腐蝕，而且在定義圖案 時’銅金屬不容易以乾式蝕刻方式製成微細圖樣。此外， 銅金屬具有高擴散係數，在低溫時即易與矽反應形成砂銅 合金’而且銅金屬與介電質的黏著性不佳，且在電場的加 速下能穿透介電質而快速的擴散，造成深層的缺陷，使元 件的可靠度降低。 目前針對上述問題的解決方法，係應用一種化學機械 硏磨的雙重金屬鑲嵌技術。雙重金屬鑲嵌製程是一種將金 屬內連線巧妙地嵌入於絕緣層的技術，其作法係在基底上 先形成一層絕緣層，並將其平坦化後，再依照所需之金屬 導線的圖案以及介層窗的位置，蝕刻絕緣層，以形成溝渠 3 用ΫιΓΪ家標準（CNS ) Λ4祝格（210X297公釐) ' ~~~' (讀先閲讀背面之注意事項再填寫本頁) 、1Τ 線 經濟部中央標準局貝工消費合作社印製 A7 B7_____ 五、發明説明（> ) 以及介層窗開口（Via)。然後，再於基底上沈積〜層金屬 層’使其塡滿溝渠與介層窗口，以同時形成金屬導線與介 層窗。最後，再以化學機械硏磨法（Chemical-Mechanical Polishing，CMP)將元件的表面平坦化。由於在製程上並 不需要蝕刻，因此可以改善銅金屬細微圖樣蝕刻的問題。 而解決銅原子的擴散問題以及銅金屬層與介電質之間的黏 著問題’在雙重金屬鑲嵌結構的溝渠與介層窗開α形成之 後、將金屬層塡入溝渠與介層窗開口之前’則會先鎪一層 高穩定性的擴散阻絕層。此外，爲了避免銅金屬在空氣中 氧化的問題以及銅原子的擴散問題’在形成銅金屬層與化 學機械硏磨之後，通常會在銅金屬層上覆蓋一層頂蓋層， 以用來將銅金屬與空氣隔絕。 第1Α圖至第1C圖爲習知一種雙重金屬鑲嵌結構的製 造流程剖面圖。首先，請參照第1Α圖’典型雙重金屬鑲 嵌結構的製作方法係以習知的微影成像與蝕刻製程，在基 底100上方所覆蓋的介電層106與頂蓋層1(Μ之中，形成 裸露出銅金屬層102的溝渠108與介層窗開口 11〇。接著， 在基底100上先形成一層共形的阻障層112,再於基底1〇〇 上形成一層銅金屬層114，以覆蓋介電層106並且塡滿溝 渠108與介層窗開口 no，如第1Β圖所示。其後，請參照 第1C圖，再以化學機械硏磨法進行平坦化製程，以去除 介電層106之上表面所覆蓋的阻障層Π2以及銅金屬層 U4。然後’再於基底1〇〇上覆蓋一層保護層丨22，以避免 銅金屬層1丨4氧化，並且防止銅金屬層114的銅原子或銅 4 、 4379twf.doc/008 406372 (請先閱讀背面之注意事項再填寫本頁) ，1Τ 線 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） A7 A7 經濟部中央標隼局員工消費合作社印裝 __4379nvf.doc/008 __406A72_____ 五、發明説明（^ ) 離子擴散至後續沉積於基底上之介電層。 上述方法中，保護層122之材質多爲化學氣相沉積法 所沉積之氮化矽或碳化矽，由於氮化矽與碳化矽易在沉積 的過程中造成應力的累積，而使保護層122與銅金屬層114 之間的附著性質不佳，甚至造成保護層122產生剝離 (Peeling)124 的現象。 因此，本發明提供一種雙重金屬鑲嵌結構的製造方 法，可以降低保護層之應力，增加保護層與銅金屬層之間 的附著性，以避免發生保護層剝離的現象。 本發明提供一種雙重金屬鑲嵌結構的製造方法，其作 法係在基底上所覆蓋的介電層中形成介層窗開口與溝渠， 並在介層窗開口與溝渠之中形成阻障層與導體層。之後， 以化學機械硏磨法進行平坦化製程，以去除介電層上所覆 蓋的導體層與阻障層。然後，再以蝕刻溶液處理導體層之 表面，使導體層的表面因晶粒裸露出來而呈凹凸狀。接著， 在基底上形成一層保護層，以覆蓋導體層之表面。 依照本發明實施例所述，上述之導體層爲銅金屬時， 使其表面呈凹凸狀的蝕刻溶液包括鹽酸、用以平衡蝕刻溶 液中氯離子之成分以及溶劑，其中用以平衡氯離子之成分 包括三氯化鐵；溶劑包括水或乙醇。銅材質之導體層在蝕 刻溶液處理時，由於晶粒邊界的蝕刻速率較高於晶粒本 身，因此，經蝕刻溶液處理之後，導體層表面的銅晶粒可 以裸露出來，而使其表面呈凹凸狀。而凹凸狀的表面，則 可用以緩衝後續覆蓋於銅導體層其表面上之保護層的應 5 本紙張尺度適用中國國家標準（CNS ) A4規格（21〇X 297公釐） " (請先閱讀背面之注意事項再填寫本頁)Printed by the Shell Standard Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 406372 at 4379twf-doc / 008 ___B7 V. Description of the Invention (f) The present invention relates to a method for manufacturing a multilevel interconnect of a semiconductor device. It is a manufacturing method of a dual metal inlay (Dual Damascene) structure. When the number of integrated circuit components per unit area is increasing, and the key dimensions are decreasing, the material characteristics will be more stringent, otherwise The delay of the time constant (RC Constant) must be the greatest resistance to the increase in the speed of the component. The main source of resistance in the component is the multilayer metal wiring that is filled on the component, so the choice of metal will be the main topic of the integrated circuit industry in the future. Copper metal has attracted much attention in the application of multilayer metal connections for deep sub-micron devices due to its advantages of low resistivity, high resistance to electromigration, and can be grown by chemical vapor deposition and electroplating. However, there are still some problems that need to be resolved when using copper metal. For example, copper metal is susceptible to oxidation in the air and is easily corroded by moisture, and in defining a pattern, 'copper metal is not easily made into fine patterns by dry etching. In addition, copper metal has a high diffusion coefficient, and it is easy to react with silicon to form a sand copper alloy at low temperature. Moreover, the copper metal has poor adhesion to the dielectric, and can penetrate the dielectric quickly under the acceleration of the electric field. Diffusion causes deep defects and reduces component reliability. At present, the solution to the above problem is to apply a double metal inlay technology of chemical mechanical honing. The double metal damascene process is a technology that skillfully embeds metal interconnects in an insulating layer. The method is to first form an insulating layer on the substrate, flatten it, and then follow the required pattern of metal wires and dielectrics. The position of the layer window, etching the insulation layer to form the trench 3. Use ΫιΓΪ house standard (CNS) Λ4 Zhuge (210X297 mm) '~~~' (read the precautions on the back before filling this page), 1T line economy Printed by the Central Bureau of Standards, Shellfish Consumer Cooperative A7 B7_____ V. Description of the invention (>) and the interlayer window opening (Via). Then, a metal layer is deposited on the substrate to fill the trench and the via window, so as to form a metal wire and the via window at the same time. Finally, the surface of the element is planarized by chemical-mechanical polishing (CMP). Since etching is not required in the manufacturing process, the problem of fine pattern etching of copper metal can be improved. And solve the problem of diffusion of copper atoms and the adhesion between the copper metal layer and the dielectric 'after the formation of the channel and the interlayer window α of the dual metal damascene structure, before the metal layer is inserted into the channel and the interlayer window opening' A high-stability diffusion barrier layer will be formed first. In addition, in order to avoid the problem of copper metal oxidation in the air and the diffusion of copper atoms, after the copper metal layer is formed and the chemical mechanical honing is performed, a copper cap layer is usually covered with a capping layer for the copper metal. Isolated from the air. FIG. 1A to FIG. 1C are cross-sectional views of a manufacturing process of a conventional dual metal mosaic structure. First, please refer to FIG. 1A 'the manufacturing method of a typical dual metal damascene structure is a conventional lithography imaging and etching process, in which a dielectric layer 106 and a cap layer 1 (M, formed over the substrate 100) are formed on the substrate 100. The trench 108 and the interstitial window opening 11 of the copper metal layer 102 are exposed. Then, a conformal barrier layer 112 is formed on the substrate 100, and then a copper metal layer 114 is formed on the substrate 100 to cover The dielectric layer 106 covers the trench 108 and the dielectric window opening no, as shown in FIG. 1B. Thereafter, refer to FIG. 1C, and then perform a planarization process by chemical mechanical honing to remove the dielectric layer 106. The barrier layer Π2 and the copper metal layer U4 covered on the upper surface. Then, a protective layer 22 is covered on the substrate 100 to prevent oxidation of the copper metal layer 1 and 4 and prevent the copper of the copper metal layer 114. Atom or copper 4, 4379twf.doc / 008 406372 (please read the notes on the back before filling this page), the paper size of 1T line is applicable to China National Standard (CNS) A4 specification (210 × 297 mm) A7 A7 Central Standard of Ministry of Economic Affairs隼 Bureau employee consumer cooperatives printed __4379 nvf.doc / 008 __406A72_____ 5. Description of the Invention (^) Ions diffuse to the subsequent dielectric layer deposited on the substrate. In the above method, the material of the protective layer 122 is mostly silicon nitride or carbonized by chemical vapor deposition. Silicon, because silicon nitride and silicon carbide easily cause stress accumulation during the deposition process, the adhesion properties between the protective layer 122 and the copper metal layer 114 are poor, and even the protective layer 122 is peeled (Peeling) 124 Therefore, the present invention provides a method for manufacturing a dual metal damascene structure, which can reduce the stress of the protective layer and increase the adhesion between the protective layer and the copper metal layer to avoid the phenomenon of peeling of the protective layer. A method for manufacturing a heavy metal mosaic structure is to form a dielectric window opening and a trench in a dielectric layer covered on a substrate, and form a barrier layer and a conductor layer in the dielectric window opening and the trench. Then, chemically The mechanical honing method is used to perform a planarization process to remove the conductive layer and the barrier layer covered by the dielectric layer. Then, the surface of the conductive layer is treated with an etching solution. The surface of the conductor layer is uneven because the crystal grains are exposed. Next, a protective layer is formed on the substrate to cover the surface of the conductor layer. According to the embodiment of the present invention, when the above-mentioned conductor layer is copper metal, it is made The etching solution with an uneven surface includes hydrochloric acid, a component used to balance the chloride ions in the etching solution, and a solvent, wherein the component used to balance the chloride ions includes ferric chloride; the solvent includes water or ethanol. The conductor layer made of copper is being etched During the solution treatment, the grain boundary has a higher etching rate than the grains themselves. Therefore, after the etching solution treatment, the copper grains on the surface of the conductor layer can be exposed, and the surface of the conductor layer can be uneven. The uneven surface can be used to buffer the protective layer covering the surface of the copper conductor layer. The paper size is applicable to the Chinese National Standard (CNS) A4 (21〇X 297 mm) " (please first (Read the notes on the back and fill out this page)
、1T 線 406372 4379twf.doc/008 __ 五、發明説明（β) 力，增加保護層與銅導體層之間的附著性。因此，本發明 之方法可以避免保護層剝離的現象，使保護層可以確實發 揮保護導體層之功用。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉一較佳實施例，並配合所附圖式，作詳 細說明如下： 圖式之簡單說明： 第1A圖至第1C圖爲習知一種雙重金屬鑲嵌結構的製 造流程剖面圖； 第2A圖至第2F圖爲依照本發明實施例一種雙重金屬 鑲嵌結構的製造流程剖面圖；以及 第3圖爲第2E圖之局部放大示意圖。 圖式標記說明： 經濟部中央標準局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) 100、200 :基底 102 :銅金屬層 104、204 :頂蓋層 106、206 :介電層 108、208 :溝渠 110、210 :介層窗開口 1 1 2、2 1 2 :阻障層 1 14 :銅金屬層 122、222 ’·保護層 124 :剝離 202、214 :導體層 6 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 經濟部中央標準局員工消費合作社印聚 A7 __4379twf.doc/Q08____ B7_ 五、發明説明（（） 216 :表面 21 8 :晶粒 220 :晶粒邊界 230 :虛線 實施例 本發明的實施例係以雙重金屬鑲嵌的製程作爲說明。 但是’在實際的應用上本發明亦可以適用於金屬導線、接 觸窗或介層窗之製程中，而並不限定於雙重金屬鑲嵌之製 程。 第2A圖至第2F圖爲依照本發明實施例一種雙重金屬 鑲嵌結構之製造流程的剖面示意圖。首先，請參照第2A 圖，在已形成有導體層202與頂蓋層204的基底200上形 成一層介電層2〇6。上述之導體層202之材質包括金屬銅， 其形成的方法例如是物理氣相沉積法、化學氣相沈積法或 電鍍法等，其厚度例如爲3000埃至20000埃。而頂蓋層 204之材質係可以防止導體層202氧化、或防止導體層202 其原子或離子成分擴散至介電層206者，其厚度例如爲300 埃至1500埃。當導體層202之材質爲金屬銅時，頂蓋層 204之較佳的材質例如是化學氣相沈積法所形成之氮化矽 或碳化矽。介電層206之材質包括電漿化學氣相沉積法所 形成之氧化矽、含氟之氧化矽或是具有低介電常數之旋塗 式局分子（Spin on Polymer，SOP )，例如是由 Flare、SILK、、 1T line 406372 4379twf.doc / 008 __ V. Description of the invention (β) The force increases the adhesion between the protective layer and the copper conductor layer. Therefore, the method of the present invention can avoid the phenomenon of peeling of the protective layer, so that the protective layer can surely perform the function of protecting the conductive layer. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is described below in detail with the accompanying drawings as follows: Brief description of the drawings: FIG. 1A FIG. 1 to FIG. 1C are cross-sectional views of a manufacturing process of a conventional dual metal mosaic structure; FIGS. 2A to 2F are cross-sectional views of a manufacturing process of a dual metal mosaic structure according to an embodiment of the present invention; and FIG. 3 is FIG. 2E A partial enlarged diagram. Schematic description: Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs (please read the precautions on the back before filling this page) 100, 200: substrate 102: copper metal layer 104, 204: top cover layer 106, 206: introduction Electrical layers 108, 208: trenches 110, 210: interlayer window openings 1 1 2, 2 1 2: barrier layer 1 14: copper metal layers 122, 222 ', protective layer 124: peel 202, 214: conductor layer 6 Paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) Printed by A7 __4379twf.doc / Q08 ____ B7_, a consumer cooperative of employees of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (() 216: Surface 21 8: Grain 220: Grain Boundary 230: Dotted Example The embodiments of the present invention are described using a dual metal damascene process. However, in practical applications, the present invention can also be applied to the process of metal wires, contact windows or interlayer windows, and It is not limited to the manufacturing process of the double metal inlay. Figures 2A to 2F are schematic cross-sectional views showing a manufacturing process of a double metal inlaid structure according to an embodiment of the present invention. First, referring to Figure 2A, a conductive layer 20 is formed. 2 and a capping layer 204 to form a dielectric layer 206 on the substrate 200. The material of the above-mentioned conductive layer 202 includes metallic copper, and a method for forming the conductive layer 202 is, for example, a physical vapor deposition method, a chemical vapor deposition method, or an electroplating method. The thickness of the capping layer 204 can prevent the conductive layer 202 from oxidizing, or prevent the atomic or ionic components of the conductive layer 202 from diffusing into the dielectric layer 206, and the thickness is, for example, 300. Angstroms to 1500 angstroms. When the material of the conductor layer 202 is metallic copper, a preferred material of the cap layer 204 is, for example, silicon nitride or silicon carbide formed by a chemical vapor deposition method. The material of the dielectric layer 206 includes electrical Silicon oxide, fluorine-containing silicon oxide formed by slurry chemical vapor deposition, or spin on polymer (SOP) with low dielectric constant, such as Flare, SILK,
Parylene與PAE-II等所組成之有機材料其中之一種。 然後，請參照第2B圖，在介電層206與頂蓋層204 7 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ----------------ITI-„------^ (請先閱讀背面之注項再填寫本頁) 4379twf.doc/008 406372 A7 B7 經濟部中央標準局貝工消費合作社印製 五、發明説明（么） 之中形成雙重金屬鑲嵌結構的溝渠208與介層窗開口 21〇。典型的方法可以在介電層210上形成〜層具有開口圖 案的光阻層（未繪示於圖中），此開口即爲預定形成之介層 窗開口所在的位置，其對應於導體層202的上方。接著， 以光阻層爲蝕刻罩幕，頂蓋層2〇4爲蝕刻終點，進行蝕刻 程序，以將開口的圖案轉移，形成穿透介電層2〇6並且裸 露出頂蓋層204的介層窗開口 210。接著，將上述光阻層 去除，之後，再於介電層206上形成另一靥光阻層（未繪示 於圖中），用以定義溝渠所需的圖案。然後，以此光阻層爲 蝕刻罩幕，蝕刻去除部分的介電層206，以形成溝渠208， 其後’將光阻層剝除，並去除介層窗開口 21〇所裸露的頂 蓋層204。 其後，請參照第2C圖，在基底200上形成—層共形 的阻障層212，以覆蓋溝渠208以及介層窗開口 210之表 面。較佳的阻障層218例如是由物理氣相沉積法或化學氣 相沈積法所形成之鈦/氮化鈦、钽、氮化鉅或氮化鎢。接著， 在基底200上覆蓋一層導體層214以塡滿介層窗開口 210 與溝渠208。導體層214之材質例如是銅，其形成的方法 例如是物理氣相沉積法、化學氣相沉積法或電鍍法。 然後，請參照第2D圖，進行平坦化製程，以去除介 電層206上所覆蓋的阻障層212與導體層214。較佳的方 法包括使用化學機械硏磨法以執行之。 接著，請參照第2E圖，進行本發明之特徵步驟。以蝕 刻溶液處理導體層214之表面216，使導體層214其表面 8 本紙張尺度適用中國國家標準（CNS ) A4祝格（210X297公釐） (請先閱讀背面之注意事項再填寫本頁) 訂 線 4379twf.doc/008 406372 A7 B7 經濟部中央標準局貝工消费合作社印製 五、發明説明（?） 216因導體層214之晶粒218裸露出來而呈凹凸不平狀。 爲使本發明之特徵更爲淸楚明白，第3圖係繪示第2E圖中 虛線230之導體層214的局部放大示意圖。當導體層214 之材質爲金屬銅，較佳的蝕刻溶液包括鹽酸(HC1)、用以平 衡蝕刻溶液中氯離子的成分以及溶劑。其中，用以平衡蝕 刻溶液中氯離子的成例如爲三氯化鐵(FeCl3)，而溶劑例如 爲水或乙醇(C2H5OH)。以100克的蝕刻溶液爲例，較佳的 是將5克的鹽酸與5克的三氯化鐵溶於90克的水或乙醇。 銅材質之導體層214在此蝕刻溶液的作用下，由於銅晶粒 21 8邊界(Copper Grain Boundary)的蝕刻速率較高於銅晶粒 218,因此，銅導體層214其表面216的銅晶粒218可以裸 露出來，而使其表面216因銅晶粒218的裸露而呈現凸起 狀，因銅晶粒218邊界220被時刻去除而展現凹陷狀。此 凹凸不平的表面216爲本發明的重要特徵，其可以避免後 續形成之保護層發生剝離的現象。 其後，請參照第2F圖，在基底200上形成一層保護層 222,以防止導體層214氧化，並且避免導體層214其原子 或離子成分擴散至後續覆蓋於基底200之介電層，而使元 件的可靠度降低。較佳的保護層222其材質例如爲氮化矽 或碳化矽，形成的方法例如爲化學氣相沉積法。由於本發 明係將保護層222形成於表面216具有凹凸不平狀的導體 層214之上，其表面216的凹陷之處，即晶粒218之邊界 220處，可用以緩衝保護層222的應力，增加保護層222 與導體層214之間的附著性，因此’可以避免習知保護層 9 本紙張尺度適ϋΐ®家標準（CNS ) A4規格（210X297公釐了 I I ... n 線 (請先閱讀背面之注意事項再填寫本頁) 4379t\vf.doc/008 406372 A7 B7 五、發明説明（《） 與導體層之間因應力的累積，致使保護層與導體層之間的 附著不良所導致的剝離現象。 因此’本發明的優點是可以緩衝保護層與導體層之間 的應力，增加其彼此之間的附著性，以防止保護層剝離導 體層的現象’使保護層發揮其防止氧化、避免導體層之原 子或離子成分擴散所衍生的可靠度問題。 雖然本發明已以較佳實施例揭露如上，然其並非用以 限定本發明’任何熟習此技藝者，在不脫離本發明之精神 和範圍內’當可作各種之更動與潤飾，因此本發明之保護 範圍當視後附之申請專利範圍所界定者爲準。 請 先 閲 背 面One of organic materials composed of Parylene and PAE-II. Then, please refer to Figure 2B, the dielectric layer 206 and the cap layer 204 7 This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -------------- --ITI-„------ ^ (Please read the notes on the back before filling this page) 4379twf.doc / 008 406372 A7 B7 Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs The trench 208 and the dielectric window opening 21 are formed in the double metal mosaic structure. A typical method can form a photoresist layer (not shown in the figure) with an opening pattern on the dielectric layer 210. This opening This is the position where the opening of the interlayer window is to be formed, which corresponds to the top of the conductor layer 202. Next, the photoresist layer is used as the etching mask, and the cap layer 204 is used as the end point of the etching, and an etching process is performed to open the opening. The pattern is transferred to form a dielectric window opening 210 that penetrates the dielectric layer 206 and exposes the top cover layer 204. Then, the photoresist layer is removed, and then another phosphor is formed on the dielectric layer 206 A resist layer (not shown) is used to define the required pattern of the trench. Then, the photoresist layer is used as an etch Then, a portion of the dielectric layer 206 is etched and removed to form a trench 208, and then the photoresist layer is peeled off and the top cover layer 204 exposed by the dielectric window opening 21 is removed. Thereafter, please refer to FIG. 2C A conformal barrier layer 212 is formed on the substrate 200 to cover the surface of the trench 208 and the via window opening 210. The preferred barrier layer 218 is, for example, a physical vapor deposition method or a chemical vapor deposition method. The formed titanium / titanium nitride, tantalum, giant nitride, or tungsten nitride. Next, a conductive layer 214 is covered on the substrate 200 to fill the via openings 210 and the trenches 208. The material of the conductive layer 214 is, for example, copper The formation method is, for example, a physical vapor deposition method, a chemical vapor deposition method, or an electroplating method. Then, referring to FIG. 2D, a planarization process is performed to remove the barrier layer 212 and the barrier layer 212 covered by the dielectric layer 206. The conductive layer 214. A preferred method includes performing the chemical mechanical honing method. Next, please refer to FIG. 2E to perform the characteristic steps of the present invention. The surface 216 of the conductive layer 214 is treated with an etching solution, so that the conductive layer 214 is Surface 8 This paper size applies to China Home Standards (CNS) A4 Zhuge (210X297 mm) (Please read the notes on the back before filling out this page) Line 4379twf.doc / 008 406372 A7 B7 Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs Explanation (?) 216 is rugged because the crystal grains 218 of the conductor layer 214 are exposed. In order to make the features of the present invention clearer, FIG. 3 shows the conductor layer 214 of the dotted line 230 in FIG. 2E. A partially enlarged schematic view. When the material of the conductive layer 214 is metallic copper, a preferred etching solution includes hydrochloric acid (HC1), a component used to balance the chloride ion in the etching solution, and a solvent. Among them, the composition used to balance the chloride ions in the etching solution is, for example, ferric chloride (FeCl3), and the solvent is, for example, water or ethanol (C2H5OH). Taking 100 g of the etching solution as an example, it is preferable to dissolve 5 g of hydrochloric acid and 5 g of ferric trichloride in 90 g of water or ethanol. Under the action of the etching solution of the copper-based conductor layer 214, since the etching rate of the Copper Grain Boundary is higher than that of the copper grains 218, the copper grains on the surface 216 of the copper conductor layer 214 218 may be exposed, so that the surface 216 is convex due to the exposure of the copper grains 218, and the copper grains 218 boundary 220 is removed at all times to show a concave shape. The uneven surface 216 is an important feature of the present invention, which can avoid the phenomenon of peeling of the protective layer formed later. Thereafter, referring to FIG. 2F, a protective layer 222 is formed on the substrate 200 to prevent the conductive layer 214 from oxidizing, and to prevent the atomic or ionic components of the conductive layer 214 from diffusing to the subsequent dielectric layer covering the substrate 200, so that Reduced component reliability. The material of the preferred protective layer 222 is, for example, silicon nitride or silicon carbide, and a method for forming the protective layer 222 is, for example, a chemical vapor deposition method. Since the present invention forms the protective layer 222 on the surface 216 of the conductor layer 214 having unevenness, the depression of the surface 216, that is, the boundary 220 of the grain 218, can be used to buffer the stress of the protective layer 222 and increase The adhesion between the protective layer 222 and the conductor layer 214, so 'the conventional protective layer 9 can be avoided. This paper is suitable for the standard ® Home Standard (CNS) A4 specification (210X297 mm II ... n wire (please read first Note on the back, please fill in this page again) 4379t \ vf.doc / 008 406372 A7 B7 V. Description of the invention (") Due to the accumulation of stress between the conductor layer and the conductor layer, the poor adhesion between the protective layer and the conductor layer resulted Therefore, 'the advantage of the present invention is that it can buffer the stress between the protective layer and the conductor layer and increase the adhesion between them, so as to prevent the phenomenon that the protective layer peels off the conductor layer', so that the protective layer can exert its protection against oxidation and avoid The reliability problem caused by the diffusion of the atomic or ionic components of the conductor layer. Although the present invention has been disclosed above in the preferred embodiment, it is not intended to limit the present invention. Anyone skilled in the art will not From the spirit and scope of the invention 'can be made to a variety of modifications and variations, and the scope of the invention as defined by the following claims and their equivalents of the scope of the appended Please first read back surface
I I 装 訂 線 經濟部中央標準扃員工消费合作社印^. 一張 -紙 本 適 縣 Μ )/ S Ν 7/> 9 2I I Binding Line Central Standard of the Ministry of Economy 印 Printed by Employee Consumer Cooperatives ^. 1 sheet-Paper suitable county Μ) / S Ν 7 / > 9 2