TW400608B - The manufacturing method of the Shallow Trench Isolation (STI) - Google Patents

Abstract

This is a manufacturing method of the Shallow Trench Isolation (STI) to provide an etching stop layer with the edge opening of the aligned trench. The etching stop layer has a surface composed by SiOxNy and a down surface composed by SiN or Si3N4. The reflective index n of the silicon oxygen nitride is about 1.8-2.0. Next, fill up the trench by silicon monoxide and extend to the surface of the etching stop layer. Then, removing the excess oxide on the surface of the etching stop layer by the chemical mechanic polishing (CMP) method for identifying an oxide plug. Since the polishing property of the SiOxNy etching stop layer is close to the property of the oxide plug than the traditional one. Thus, when the etching process is proceeding on the surface of the SiOxNy etching stop layer, the phenomena of etching the oxide plug in priority will have the trend of alleviation gradually. After the polishing process, remove the etching stop layer to complete the identified structure of the shallow trench isolation (STI).

Description

1921TWF.DOC / 006 A7 1921TWF.DOC / 006 A7 Consumption cooperation by employees of the Central Standards Bureau of the Ministry of Economic Affairs __B7 V. Description of the invention (/) The present invention relates to a method for manufacturing a component isolation structure between integrated circuit components In particular, it relates to a manufacturing method for forming a shallow trench isolation structure by chemical mechanical honing. The element isolation region is used to prevent carriers from moving between adjacent elements through the substrate. Traditionally, the element isolation region is formed between adjacent field effect transistors in a dense semiconductor circuit, thereby reducing field effect. Charge leakage generated by field effect transistors (FETs). Such dense semiconductor circuits are, for example, dynamic random access memories (DRAMs). Element isolation regions often form in the form of thick field oxide layers and are formed under the surface of the semiconductor substrate. The most traditional and common technology is the silicon local oxidation technology (LOCOS). The LOCOS technology is becoming more and more mature, so this technology can be used to obtain a highly reliable and effective component isolation structure at a lower cost. However, LOCOS still has a number of disadvantages, including problems related to known stress generation and surrounding LOCOS field isolation structures. Formation of bird's beak and so on. In particular, the problems caused by the bird's beak area make the LOCOS field isolation structure on small components unable to effectively isolate, and cannot form high density components. Shallow trench isolation (STI) is also a common element isolation method. Generally, silicon nitride is used as a hard mask. Anisotropic etching is used to define a nearly vertical trench on a semiconductor substrate. . The trench is then filled with an oxide layer to provide an element isolation structure ', and the structure has an upper surface that is the same height as the original substrate surface. Next, the element is formed on a P-type silicon substrate, and a FET element is formed around the STI structure, including an N-type source / drain region around the substrate channel region. 3 This paper is in accordance with the Chinese National Standard (CNS) A4 specification ( 210X297 mm) (Read the precautions on the back before filling this page)-«-， 1Ί l92lTWF.DOC / 006 A7 B7______ V. Description of the invention (2) (source / drain), and the gate oxide layer and Complex crystal sand gate separated in channel area. The thickness of the STI structure can provide effective isolation and can be applied to smaller components. Here, the STI structure is different from the L0C0S isolation area 'because the latter will form a bird's beak structure around the LOCOS isolation area' and cannot provide effective Isolation. In addition, the technology of forming the STI structure can produce a comprehensive flattened surface on the isolation structure, which is beneficial for subsequent processes. The manufacturing method of the shallow trench isolation structure is detailed in FIGS. 1 to 4. Figure 1 illustrates the conventional steps for forming a shallow trench isolation structure in a general integrated circuit. In this process, a silicon nitride layer 12 is formed on the silicon substrate 10 by a chemical vapor deposition (CVD) method, and the silicon nitride layer is used as an etching end point of the chemical mechanical honing method. Then, a photoresist layer 14 defining a trench is formed by coating, and then the photoresist layer is exposed, developed, and selectively etched to form a mask layer 14 on the surface of the silicon nitride layer 12 and having one of the openings 16. Then using this mask layer to sequentially etch the silicon nitride layer 12 and the silicon substrate, a trench 18 is formed on the substrate. As described above, the etching process etches the silicon nitride layer 12 through the photoresist opening. A ditch is formed because the side wall of the ditch has a slight slope. After that, the trench etching mask 14 is removed. Then, the trench 18 is filled with a silicon oxide layer 20, for example, using tetra-ethyl-ortho-silicate (TEOS) as a gas source, for example, using atmospheric pressure chemical vapor deposition (APCVD) deposition, When sinking the trench, the trench is filled with silicon oxide, as shown in Figure 3. The TE0S oxide layer needs to undergo a densification step, and after the densification, the TE0S will shrink. Among them, the TE0S is densified at a temperature of about 1000 ° C for about 10-30 minutes. After the densification step, the chemical mechanical honing method (Cheimcal) is applied to the Chinese National Standard (CNS) A4 specification (210X297 mm) 192 1TWF.DOC / 006 Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs Β7 5. Description of the invention (s)

Mechanical Polishing (CMP) removes the TE0S oxide layer on the silicon nitride layer 12, and uses silicon nitride as the honing end point, leaving an oxide plug 12 in the trench area (Figure 4). As shown in Figure 4, when the chemical mechanical honing method is performed, since the oxide plug 22 is softer than the silicon nitride layer 12, the oxide plug 22 under the surface of the silicon nitride will be slightly Depression 24. Next, the silicon nitride layer 12 in contact with the surface of the substrate is removed, leaving an oxide plug 22 on the surface of the substrate. Generally, oxidative etching or other process steps cause partial etching of the oxide plug 22, so that the surface of the oxide plug 22 may be lower than the surface of the silicon substrate 10. The progress of the oxide layer etching step often causes over-etching of the oxide plug, and the surface of the oxide plug 22 is recessed to be lower than the surface of the substrate 10. Over-etching occurs at the edge of the oxide plug adjacent to the surface of the substrate 10, or the surface of the oxide plug will have a concave phenomenon below the surface of the substrate. Over-etching also causes the substrate to form a "shoulder" and The trench sidewalls are partially etched, or only a thin oxide layer can cover the surface of the substrate adjacent to the trench sidewalls. After the oxide plugs of the STI structure are defined, a gate oxide layer is formed on the active area on the substrate surface by thermal growth, and the gate oxide layer is usually formed near the shoulder region of the substrate near the trench isolation region. A prominent edge contour. Generally speaking, a polycrystalline sand layer is deposited on the surface of a substrate by chemical vapor deposition, and the polycrystalline sand layer is implanted with impurities by ion implantation and then annealed. The desired impurities are directly doped during deposition, and then a wiring line is formed by a lithographic etching process. And because the wire extends on the gate oxide layer and the oxide plug, the oxide plug 5 f '* (Please read the precautions on the back before filling this page)

The size of this paper is applicable to the country of China £ ^^ (CNS> M specification (21〇χ297 公 楚) 1921TWF.DOC / 006 A7 B7 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (f) The plug will also be extended To the shoulder area near the side of the ditch, so the poor quality gate oxide layer formed in the shoulder area causes the gate or wire to electrically couple with the substrate, and a parasite is formed in the shoulder area MOSFET (Parasitic MOSFET). The wires serve as part of the gate of the parasitic MOSFET, and the signals on the wires control the behavior of the parasitic MOSFTE. The formation of parasitic MOSFETs and the electrical coupling between other forms of wires and the substrate will reduce the transistor The threshold voltage of "on" causes abnormal subthreshold current in the kink effect, and the occurrence of the neck effect will affect the performance of components and circuits. In view of the Therefore, the main purpose of the present invention is to planarize the surface by a chemical mechanical honing method, so as to reduce the phenomenon of the surface depression of the shallow trench isolation structure. The invention provides a method for manufacturing a shallow trench isolation structure, which includes at least the following steps: First, a substrate having a trench is provided, and the trench has an upper edge on the surface of the substrate. Then, an etch stop layer is formed on the substrate, and the etching is performed. The termination layer has an opening related to the upper edge of the substrate trench, and a material layer is formed on the contact termination layer. The material layer has a sufficient thickness to fill the trench of the substrate. Finally, the material layer is defined by honing to remove the surface of the etching termination layer. A trench-filled plug. The etch stop layer has an upper surface and a lower surface, and the honing rate of one of the upper surfaces is similar to that of the lower surface. The honing rate is similar to the material layer of the trench. The method of manufacturing a trench isolation structure includes at least the following steps: First, provide a substrate with a trench, and the trench must be read first. Note: The binding line of this paper applies the Chinese National Standard (CNS) A4 specification (21〇). X297 mm) 192 1TWF.DOC / 006 192 1TWF.DOC / 006 Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 ---- B7 V. Description of the Invention (G) · The surface of the substrate has an upper edge. Then, a uranium-cut stop layer is formed on the substrate, and the uranium-cut stop layer has an opening related to the upper edge of the base trench. A material layer is formed on the etch stop layer. The material layer has a sufficient thickness to fill the trenches of the substrate and the trench material includes silicon oxide. Finally, honing removes the material layer on the surface of the etching stop layer to define a trench-filled trench. The etch stop layer has an oxynitride surface layer and a lower layer, the oxynitride surface layer has an oxynitride honing rate, and the lower layer has a slower honing rate in the oxidative etching process. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is exemplified below, and in conjunction with the accompanying drawings, the detailed description is as follows: Brief description of the drawings: FIG. 1 Fig. 4 to Fig. 4 are cross-sectional views showing a manufacturing process of a shallow trench isolation structure of a conventional technique. 5 to 10 are cross-sectional views showing a manufacturing process of a shallow trench isolation structure according to a preferred embodiment of the present invention. Among them, the relationship between each icon number and the component name is as follows: 10 '30: substrate 12' 32: silicon nitride layer 14 '36: cover layer 20, 42: oxide sand 24, 44: oxide plug 46: protective oxidation Physical layer 48 .Gate oxide layer 7 This paper size is applicable to China ^^ (CNsyA4S ^ (2 丨 0X297mm) " ~~ '----- tPlease read the precautions on the back before filling this page) -Load-

Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs, 19T, 1921TWF.DOC / 006 4 ^ A7 ___ _B7 V. Description of the invention (6) 50: Wire 52: Gate electrode embodiment The preferred embodiment of the present invention is in chemical mechanical engineering. During the grinding method, an etch stop layer having different layers or different compositions is provided, and the upper surface and the lower surface of the etch stop layer are at least a part of a distance apart. The upper surface of the etch stop layer has a material composition that is easier to hob, and the properties of the lower surface are less easy. In the honing process, the above-mentioned composition is used as the etch stop layer. Since the honing pads have different honing rates of the etch stop layer material, the deposited material that is overfilled with trenches or excessive openings can be removed by this. Similarly, the deposition rate in trenches or openings that have a higher honing rate compared to the etch stop layer can also slow down the honing rate. Therefore, this process is suitable for the process of forming a shallow trench isolation structure. A preferred embodiment of the present invention is to align the edge of a trench on a substrate so that the etch stop layer has an opening, the trench is overfilled with silicon oxide, and the silicon oxide layer extends to the surface of the etch stop layer. Generally, the silicon oxide material that fills the trenches is Si02. In this embodiment, the surface group of the etch stop layer is SiOxNy, and the composition of the lower surface is SiN or Si3N4. The above structure can be formed by two different material layers or by changing the composition of the deposition source gas during deposition. The refractive index of the silicon oxynitride surface material of the etch stop layer is about 1.8-2.0. The CMP method uses an excess of silicon oxide on the surface of the etch stop layer to define an oxide plug in the trench. When the etching process is carried out to the surface of the etching stop layer, the honing properties of the material of the etching stop layer are closer to oxygen than conventional techniques. 8 This paper is in accordance with the Chinese National Standard (CNS) A4 specification (210 ×: 297 mm) (read (Read the notes on the back before filling out this page)

1T line 1921TWF.DOC / 006 A7 B7 V. Description of the invention (η) ~~ _ ~~ Compound plugs' Therefore, the rate of etching oxide plugs will slow down. When the conventional technique and the honing method according to the embodiment of the present invention are performed, when the honing process is nearing the end point, the 'honing pad will face the etching stop layer and the oxide plug at the same time' and when the conventional technique is performed. The hardness of the silicon nitride etch stop layer and the oxide plugs are quite different, so the depression phenomenon shown in FIG. 4 will be caused. On the contrary, the surface of the silicon oxynitride etching stopper layer provided by the preferred embodiment of the present invention, because silicon oxynitride has a honing property closer to the oxide plug, therefore, the oxide plug will not be excessively honed. And can reduce the degree of depression. The embodiment of the present invention provides a planarized surface adjacent to the trench, and can improve the reliability of the element. For example, the present invention can reduce the frequency of the neck knot effect and the range of the effect when the neck knot effect occurs. When the trench honing process is slightly different from the optimal parameters, such as when the honing process is continued beyond a depth of the upper surface of the etching stop layer, that is, when the silicon oxynitride portion of the etching stop layer is exceeded, the honing process will be It will not occur, but will cause a slight depression of the oxide plug. In the variation of the optimal parameters of the honing process, the honing process extends to the silicon nitride portion of the etch stop layer, and the oxide plug is depressed. Although there will be some sags here, this is a lot better than conventional techniques. Another advantage of the embodiment of the present invention is that since the composition of silicon oxynitride is not very different from that of the conventional silicon uranium nitride etch stop layer, there is no need to match the etch stop layer in the manufacturing process. Make a big change. For example, before the substrate is etched to form a trench, dry etching is used to define the etch stop layer. It is also possible to use multiple layers of etch stop in the embodiment of the present invention. 9 ----------_____________ ____-- This paper standard is applicable to China Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling out this page) ο. .. 17 Printed by the Central Consumers Bureau of the Ministry of Economic Affairs 1921TWF.DOC / 00 6 Β7 Central of the Ministry of Economic Affairs Printed by the Consumer Bureau of Standards Bureau on the fifth, invention description (5) layer. In addition, after the trench oxide plug is defined, a hot phosphoric acid solution can be used to strip the etch stop layer. 5 to 10 are cross-sectional views showing a manufacturing process of a shallow trench isolation structure according to a preferred embodiment of the present invention. Please refer to FIG. 5. First, before the trench is formed, a pad oxide layer is formed on the surface of the substrate 30 to protect the substrate from damage during the honing process, and the pad oxide layer can be heated. Oxidation growth can also be performed by chemical vapor deposition (CVD). The thickness of the pad oxide layer needs to be sufficient to protect the substrate, and the presence of the pad oxide layer is required when the etch stop layer is consistent with the base material. In fact, when a thermal process such as densification of TEOS oxide is performed, stress is generated between the underlying silicon nitride layer as an etch stop layer and the substrate, and the presence of a pad oxide layer can release such stress. Next, an etch stop layer is formed on the substrate 30. A shallow trench isolation structure is defined by the etch stop layer, and a silicon oxide layer is filled in the trench. Therefore, the upper layer of the etch stop layer serves as a buffer layer of the etch stop layer and has a honing property similar to that of silicon oxide, and can be removed by honing. The honing properties of the lower layer of the uranium etch stop layer are similar to those known as uranium etch stop layers. The inventors have decided that the silicon oxynitride buffer layer as the upper layer of the etch stop layer needs to be combined with sufficient oxygen, and the nitrogen oxide does not need to be combined with sufficient oxygen to form a honing property similar to that of the manganese trench oxide material. . The most convenient way to measure the degree of combination of SiOxNy and oxygen is to use an optical measurement, such as the refractive index obtained by reflection spectroscopy or ellipsometry. And the better refractive index η of the SiOxNy of the present invention is about 1.8_2.〇, and the refractive index η of Si02 is about 1.45 plus or minus 10 (please read the precautions on the back before filling this page), 0. -17. ¾ paper The standard is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 1921TWF.DOC / 006 A7 1921TWF.DOC / 006 A7 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs B7_______ 5. The percentage of invention description (Ϋ). The refractive index of Si3N4 varies greatly 'but is generally about 2_1. As described above, the composition 'shown by the refractive index 1.8-2.0 represents nitrogen having a considerable content of oxygen and having a high composition. The thickness of the etch stop layer provided according to the present invention is about the same as the thickness of the conventional silicon nitride etch stop layer, and the thickness of the silicon nitride layer 32 and the silicon oxynitride layer 34 depends on the process requirements of the shallow trench structure element. . Among them, the nitrided layer 32 can be formed by a chemical vapor deposition method with a thickness of about 100 Å, and then a silicon oxynitride layer with a thickness of about 1000 A is deposited by the same CVD method. After depositing the silicon nitride layer, a different gas source mixture is used, and then a silicon oxynitride deposition step is performed. As the CVD growth process proceeds, the composition of the source gas mixture can be gradually changed, and more varying compositions can be produced between successive layers. After the engraving stop layer 3 2, 3, 4 is provided, a photoresist layer is formed on the etch stop layer, and the photoresist layer is exposed and developed to form a feed mask 36, and the buffer layer 34 is exposed to be formed. Surface 38 of the trench. In general, photoresist masks; 36 are used to define all uranium engraving steps that form the side of the base trench. After that, the layers 34, 32, and pad oxide layers (not shown) are carefully etched, and the substrate 30 is etched to define the trenches. The etching process is highly anisotropic, for example, by reactive ion etching , RIE). The etching gas mixture for etching a silicon oxynitride layer 34 and a nitrided sand layer 32 includes SF6, helium, and oxygen. The etching gas for the pad oxide layer includes CHF3, oxygen, and argon. The silicon substrate is etched by RIE, and the etching gas includes chlorine, helium, HBr, and oxygen, and the bottom of the trench is performed with SF6 to make the bottom of the trench have a rounded edge. Figure 6 shows the formation of 11 paper-size papers; (CNS) & Vision_ (2ι〇χ297mm) '-(Please read the precautions on the back before filling out this page) _σ • Packing. 1T 1921TWF.DOC / 006 A7 B7 V. Description of the Invention (/ 0) A shallow trench with a suitable trench isolation structure 40, and its etching depth is about 4000-6000A, preferably a depth of 4500A. If necessary, a thermal oxide layer can be formed at the bottom and sides of the trench to remove defects caused by etching. In subsequent seeding, the thermal oxide layer can be part of the trench plug, and this thermal oxide layer can also be removed. As shown in Fig. 7, a thick layer of insulating material 42 is deposited and fills the trench area to provide a surface for other materials to be deposited. A thick oxide layer is deposited using ozone TEOS or CVD TEOS. Traditional chemical vapor deposition (CVD) techniques include atmospheric pressure chemical vapor deposition (APCVD), low pressure chemical vapor deposition (LPCVD), and plasma chemical gas. The phase deposition method (PECVD) can form an oxide layer of a trench filled plug material. The TEOS oxide layer 42 has a thickness of about 6000 angstroms. The reason why the TEOS oxide layer needs to overfill the trench is because the TEOS oxide layer shrinks by about 6% after being densified. Here, the TEOS oxide layer is heated by heating to 1000 ° C. The cycle Densify in 10 to 30 minutes. In this embodiment, a TEOS oxide layer 42 or other insulator is used as a material for filling the trench, and then the etching is continued to remove the excess portion of the oxide layer 42 extending on the surface of the substrate 30. Preferably, CMP is used. It is completed in a fixed time, and stops when the etching step approaches the surface of the mask layer. FIG. 8 shows that the device of FIG. 7 removes an excessive oxide layer 42 ′ on the surface of the buffer etch stop layer 34 after a fixed time CMP process, thereby defining a trench-filled oxide plug 44 . After selecting a suitable buffer layer 34, that is, a material having a honing property similar to that of the oxide layer, the surface of the oxide plug 44 and the surface of the buffer honing layer 34 are made common. The paper size applies the Chinese national standard (CNS) Α4 specification (210X297 mm) (Read the precautions on the back before filling this page) • Packing. €} Printed by the Central Consumers Bureau of the Ministry of Economic Affairs 1921TWF.DOC / 006 A7 B7 Central Standard of the Ministry of Economic Affairs Printed by the Bureau ’s Consumer Cooperatives V. Invention Description (") Plane. Among them, the honing rate of the buffer layer of the etch stop layer is closer to the honing rate of the trench oxide plug than the bottom material of the etch stop layer (such as the silicon nitride layer described above). After performing CMP, the structure shown in FIG. 8 is formed, and the etch stop layers 34 and 32 are removed. In a single process, the device is placed in a hot phosphoric acid solution of about 150 to 180 ° to remove the silicon oxynitride layer 34 and the nitride cutting layer 32. After stripping the etch stop layer, the oxide plug 44 will extend to a distance of about 1000-2000 A on the surface of the substrate, and this protruding oxide plug portion is unnecessary, so a planarization step is performed. Since oxide plugs are more commonly defined using a more controlled honing process, a controlled etch process can complete the required oxide plug plane. Generally, a dilute HF solution is used to remove the pad oxide layer between the substrate and the uranium etch stop layer, and at the same time, a part of the oxide plug 44 can be removed. The HF solution requires a period of immersion to remove the pad oxide layer, so the oxide plug also needs to protrude from the substrate for a certain height, and is integrated with the previous step, and then includes a subsequent oxide etching step, so there is no need to oxidize at this time. The object plug 44 is coplanar with the substrate surface 30. After the layers 34 and 32 are removed, a new protective oxide layer 46 with a thickness of about 200-300 angstroms is generally formed, which can protect the surface of the substrate and restrict ion implantation in the ion implantation step. At the same time, the implantation of wells and the implantation of channels is formed by the protective oxide layer. The better method is to use the rapid thermal oxidation method to actively activate impurities in the well area and the channel area, and also activate the source area and the drain area. Impurities in the polar region (eg heating element at 1000 ° c for a few seconds or tens of seconds). When the protective oxide layer 46 is subsequently removed with diluted HF, part of the insulating plug 44 is also etched at the same time. After this process, the side walls of the trench are still covered (read the precautions on the back before filling this page)

I Λ--Λ AQ-installed, ya. © The size of the paper is applicable to the Chinese National Standard (CNS) A4 (210X297 mm) A7 1921TWF.DOC / 006 ___B7 V. Description of the invention (/ 1) Cover and protected In this case, the surface of the oxide plug 44 is slightly higher than the surface of the substrate 30. Refer to Figure 10. The required integrated circuit elements are formed on a substrate 30, such as a MOS transistor. In order to form a MOS transistor, a gate oxide layer 48 having a thickness of about 30-200 angstroms is formed in an oxygen atmosphere at a temperature of about 900-l0a0 ° C, and a wire is deposited on the element. Material to form a lowest wire layer. The substrate temperature is maintained at about 62 ° C, and a polycrystalline silicon layer having a thickness of about 2000-3000 angstroms is formed by low pressure chemical vapor deposition (LPCVD). When the wire layer contains polycrystalline silicon, ion implantation can be performed. Doped with impurities of boron ions or phosphorus ions, and the impurities are activated by a rapid thermal tempering process. A heat-resistant metal or metal silicide, such as tungsten silicide, is deposited on the polycrystalline silicon layer for self-alignment. Metallization (self_aligned silicide) process, lithographic etching of the polycrystalline sand layer. Therefore, the wire structure has a metal sand structure and the thickness of the wire is about 2000-3000 angstroms. When the wire material layer is formed as a gate of a FET, The required thickness of the gate electrode needs to be incorporated into the calculation of the thickness of the wire, and the semiconductor circuit continues to use the lithography to etch the wire layer to form the wire 50 or a gate w, as shown in Figure 10. Traditionally, a further process A source region and a drain region are formed around the gate electrode 52. A light-concentration implantation region is provided, and an oxide spacer is formed around the gate electrode. Then, a contact window or an interconnect line required by the element is completed to complete the semiconductor circuit. If part of the circuit in Figure 10 is formed on a DRAM memory cell, a structure such as a charge storage capacitor or a bit line can also be provided. In this DRAM memory cell, the wire 50 may be connected to a gate or another MOS transistor connection, this part is not illustrated in the figure 10. And the shallow groove set formed on this paper is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 192 1 T WF.DOC / 0 06 Α7 192 1 T WF.DOC / 0 06 Α7 Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs B7 V. Description of the Invention (/ 3) The method of isolating the zone so that it exists at the place where the wire passes, that is, the edge adjacent to the surface of the trench base The possibility of the formation of unreliable oxide layers is reduced. Therefore, the performance of the MOS transistor connected to the wire 50 is less likely to be caused by parasitic MOS transistors, or because unwanted electrical properties are formed at the wire 50 and the adjacent trench substrate The above-mentioned shallow trench isolation structure formed by the present invention reduces the chance that the surface of the insulating plug is lower than the surface of the substrate when the etching step is performed. Therefore, a gate oxide layer is formed adjacent to the trench. also Has higher quality. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications without departing from the spirit and scope of the present invention. Changes and retouching, so the protection scope of the present invention shall be determined by the scope of the attached patent application. (Please read the precautions on the back before filling this page)

This paper size applies to Chinese National Standard (CNS) A4 (210X297 mm)

Claims (2)

92 1TWF.DOC / 006 A8 B8 C8 D8 Patent scope 1. A method for manufacturing a shallow trench isolation structure, which includes at least the following steps: providing a substrate having a trench, the trench having an upper edge on the surface of the substrate; '_ An etch stop layer is formed on the substrate, the etch stop layer has openings related to the upper edge of the substrate trench; a material layer is formed on the etch stop layer, and the material layer has a sufficient thickness to fill the substrate. Trenches; and honing to remove the material layer on the surface of the melting stop layer—a plug of a hob and a full trench, wherein the etch stop layer has an upper surface and a lower surface, and one of the upper surfaces has a higher honing rate The honing rate of one of the lower surfaces is similar to that of the material layer in the Hom trench. 2. The manufacturing method according to item 1 of the scope of patent application, wherein the etching stop layer includes an upper layer of silicon oxynitride and a lower layer of silicon nitride. 3. The manufacturing method as described in item 2 of the scope of the patent application, wherein the refractive index of the sand oxynitride is about 1 8_2 0 left 1 ^ after an optical measurement. 4. As described in the item 1 of the scope of patent application The manufacturing method, wherein the insect-engraved termination layer has an upper layer and a lower layer, and for the material filled with the gully, the upper layer has a first honing rate, and the lower layer has a second honing rate, and the first One honing rate is greater than the second honing rate. 〜 研 1 磨 5. The manufacturing method described in item 4 of the scope of patent application, wherein > the opening of the etch stop layer is formed by a continuous dry etching process to form f 'the uranium 6. As described in the scope of patent application No. 4 The manufacturing method described above, including 16 — 1 packs. Ordering line (谙 Please read the precautions on the back before filling out this page} Printed by the Central Consumers Bureau of the Ministry of Economic Affairs, Consumer Cooperatives The paper size is applicable to Chinese national standards (CNS ) Α4 size (210X297mm) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs, 4006Q'S A8 1921TWFD0C / 006 cl D8 6. One step in the patent application process includes removing the upper layer and the lower layer in a single process step. 7 . The manufacturing method according to item 6 of the patent application scope, wherein the removing step is a wet etching process. '8. The manufacturing method according to item 7 of the patent application scope, wherein the removing step starts with a A solution including hot phosphoric acid is performed. 9. A method for manufacturing a shallow trench isolation structure, which includes at least the following steps: A substrate having a trench is provided on the base. The surface has an upper edge; an etch stop layer is formed on the substrate, the etch stop layer has an opening related to the upper edge of the substrate trench; a material layer is formed on the etch stop layer, and the material layer has sufficient The trench having a thickness that fills the substrate, the trench material including silicon oxide; and a plug that defines a trench filled by honing to remove the material layer on the surface of the etch stop layer, wherein the etch stop layer has an oxynitride The surface layer and the lower layer, the nitrogen oxide surface layer has an oxynitride honing rate, and the lower layer has a slower honing rate during the oxidizing honing process. The manufacturing method described above, wherein the refractive index of the oxynitride is about 1.8-2.0 after an optical measurement. 11. The manufacturing method according to item 9 of the scope of patent application, wherein the lower layer includes a silicon nitride 12. The manufacturing method as described in item 11 of the scope of patent application, wherein the 17 paper sizes are in accordance with China National Standard (CNS) A4 (210 X 297 mm). 0 --Install I: ~~ i 丨 丨 Order &Line; 1 (Please read the precautions on the back before filling this page) 400608 A8 192.TWF.DOC / 006 BS D8 6. Scope of patent application The refractive index of oxynitride is about 1.8-2.0 after an optical measurement. 13. The manufacturing method according to item 12 of the scope of patent application, wherein one of the silicon nitride layers has a refractive index of about 2.1. (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs This paper size is applicable to the national standard (CNS) A4 specification (210X297 mm)