TW399267B - Taped silicon dioxide etching method with high selectivity on silicon nitride - Google Patents

Taped silicon dioxide etching method with high selectivity on silicon nitride Download PDF

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TW399267B
TW399267B TW86116331A TW86116331A TW399267B TW 399267 B TW399267 B TW 399267B TW 86116331 A TW86116331 A TW 86116331A TW 86116331 A TW86116331 A TW 86116331A TW 399267 B TW399267 B TW 399267B
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silicon dioxide
silicon nitride
high selectivity
etching method
item
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TW86116331A
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Chinese (zh)
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Jia-Shiung Tsai
Hung-Yuan Tau
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Taiwan Semiconductor Mfg
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Abstract

There is disclosed a taped silicon dioxide etching method with high selectivity on silicon nitride, which performs a primary etching by CHF3 and an over etching by CHF3. As a result, the spacer of the silicon dioxide layer is provided with a suitable slope angle. Furthermore, the interface between the silicon dioxide and silicon nitride layers does not have any small grooves defined therein. Thus, there is no silicon nitride loss, and no oxide layer is remained on the surface of the silicon nitride.

Description

A7 B7 五、發明說明(/ ) 本發明主要係提供一種半導體的蝕刻方法,尤指一種 鈾刻介電層時,具有高選擇率以及不會造成介電層側壁 (S idewal 1)傾斜度不良的蝕刻方法。 導體、半導體、及絕緣體是構成半導體元件的三大主 要材料。絕緣體作爲介電材料(<^16(:1:士3),主要的有3丨〇2, ShN4, SiON,PSG(Phosphosilicate Glass 磷矽玻璃), BPSG(BorophosphosilicateGlass ;硼磷Ϊ夕玻璃)等五種。 氮化砂(Si 3N4)薄膜有一項很獨特的特性,那就是他那高達 101Qdyne/cm2以上的沈積後拉伸應力(Tensile stress),因 此適於長在氧化層的底部。二氧化矽在ULSI(ultra large scale integration)的製程上更是廣泛,打從M0S製程的第 —個光罩(mask)裏,便可以看到二氧化矽的蹤跡;因此把 二氧化矽長在氮化矽上是常見的介電層製造方法,而爲了 避免如在淺溝隔離(shallow trench isolation)製程中誤 失對準(misalignment)的情形,蝕刻後的二氧化矽側壁需 要具有良好的傾斜度。 由於氮化矽本身對矽的附著力並不理想,因此在製作 氮化矽時一般都在氮化矽和矽之間,加入一層由二氧化矽 構成的墊氧化層(pad oxide),然後於此墊氧化層上生長氮 化矽,墊氧化層還有另一釋放矽基板和氮化矽間應力 (stress relief)的功效。由於本發明的重點在於介電層的 鈾刻,因此圖示部份省略矽基板和墊氧化層。煩請參閱圖 一,於氮化矽11之上生長一層二氧化矽12 ;在圖二中於二 氧化矽12上加一層光阻13 ;於圖三可見習用方法在蝕刻此 - 2 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) 、裝--------訂—,------線 經濟部智慧財產局員工消费合作社印製 A7 B7 五、發明說明(>) 介電層12時’對氮化砂選擇率(selectivity)不好及介電層 傾斜度不良(poor slope capability)的缺點。介電層側壁 ί頃斜度不良容易造成誤失對準(misalignment)的現象,使 得後續之餓刻或離子植入(ion implanting)過程,破壞了 主動區域(active area)或基板(substrate);對氮化砍選 擇率不好,會在二氧化矽和氮化矽的界面上造成氧化層的 殘留或者微小溝渠14,破壞氧化層的介電特性,並造成氮 化矽的損失。 本發明之目的: 因此,本發明之主要目的在於提供一種避免氮化矽和 二氧化矽界面微小溝渠產生的蝕刻方法。 本發明之另一目的乃是提供一種避免氮化矽損失的蝕 刻方法。 本發明之另一目的乃是提供一種避免氧化層殘留在氮 化矽上的蝕刻方法。 本發明之再一目的在於提供一種使介電層側壁具有良 好傾斜度的蝕刻方法。 圖示簡要說明 圖一爲習知的介電層剖面圖。 圖二爲習知塗上光阻後的介電層剖面圖。 圖三爲習知之I虫刻之後的介電層剖面圖。 圖四爲本發明之介電層剖面圖。 3 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) C請先閲讀背面之注意事項再填寫本頁) 裝------訂_1'丨· 經濟部智慧財產局員工消費合作社印製 經濟部智慧財產局員工消費合作社印5^ A7 B7____ 五、發明說明()) 圖五爲本發明塗上光阻後的介電層剖面圖。 圖六爲本發明蝕刻之後的介電層剖面圖。 圖號標不. 11 -氮化砍 12 -二氧化矽 13 -光阻 14 -二氧化矽和氮化矽界面上的微小溝渠 21 -本製程的氮化矽 22 _本製程的二氧化矽 23 -本製程的光阻 以下說明此本發明對氮化矽具有高選擇率的傾斜式二 氧化矽蝕刻的方法: 於矽基板上長一層墊氧化層,再於墊氧化層上生長氮化 石夕21。墊氧化層通常由水和氧氣在熱氧化法(thermal oxidation)中形成,溫度約爲1050c,常壓之下,進行約45 分鍾,形成厚度約100埃的墊氧化層。由於本發明的重點在 於介電層的蝕刻,因此圖示部份省略矽基板和墊氧化層。 請參閱圖五,首先於氮化砂21之上生長一層二氧化矽22。 在氮化矽21的沈積製程上通常都使用以 SiH£l2(Dichlorosilane)爲主的反應物,由低壓化學氣相 沈積(LPCVD)來進行氮化矽的沈積。藉著把SiH2Cl2和励 在適當的溫度及低壓下混和,經由如下的化學反應: 3SiH2Cl2(g) + 7NH3(g)—Si3N4(s) + 3NH4C1(s) + 3HCl(g) + 6H2(g) 可以在晶片上獲得一層理想配比極佳的氮化矽。通常所需 4 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) 裝---- 訂i—-------線 A7 B7 五、發明說明(f) 的溫度在700 °〜800T左右,壓力約在0.1〜ITor r之間。 接著以化學氣相沈積(CVD)來沈積Si〇222。通常以化學 氣相沈積(CVD)來沈積SiCb22時是以TE0S爲主,其中TE0S 是一種含有砂與氧的有機矽化物。反應式如下:A7 B7 5. Description of the invention (/) The present invention mainly provides a method for etching semiconductors, especially a uranium-etched dielectric layer, which has a high selectivity and does not cause poor slope of the dielectric layer sidewall (Sidewal 1). Etching method. Conductors, semiconductors, and insulators are the three main materials that make up semiconductor components. Insulators as dielectric materials (< ^ 16 (: 1: Shi 3), the main ones are 3, 02, ShN4, SiON, PSG (Phosphosilicate Glass), BPSG (BorophosphosilicateGlass) There are five kinds of silicon nitride (Si 3N4) thin film, which has a very unique characteristic, that is, his tensile stress after deposition (Tensile stress) as high as 101Qdyne / cm2 or more, so it is suitable for growing on the bottom of the oxide layer. Silicon is more extensive in the ULSI (ultra large scale integration) process. From the first mask of the MOS process, you can see the traces of silicon dioxide; therefore, silicon dioxide is grown on silicon nitride. The above is a common dielectric layer manufacturing method, and in order to avoid misalignment such as in the shallow trench isolation process, the etched silicon dioxide sidewall needs to have a good slope. The adhesion of silicon nitride itself to silicon is not ideal. Therefore, in the production of silicon nitride, a layer of pad oxide composed of silicon dioxide is generally added between silicon nitride and silicon, and then here Nitrogen on the oxide layer Silicon, pad oxide layer has another effect of releasing stress relief between silicon substrate and silicon nitride. Since the focus of the present invention is on the uranium engraving of the dielectric layer, the silicon substrate and pad oxide layer are omitted in the illustration. Please refer to Figure 1. A layer of silicon dioxide 12 is grown on silicon nitride 11; a layer of photoresist 13 is added to silicon dioxide 12 in Figure 2; a conventional method is used to etch this in Figure 3-2 papers Standards are applicable to China National Standard (CNS) A4 specifications (210 X 297 mm) (Please read the precautions on the back before filling this page). Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (>) When the dielectric layer 12 is' bad to selectivity of nitrided sand and poor slope capability of the dielectric layer Disadvantages. Poor slope of the sidewall of the dielectric layer can easily cause misalignment, which will cause the subsequent engraving or ion implanting process to destroy the active area or substrate. ); The selectivity to nitride is not good, it will be in the boundary between silicon dioxide and silicon nitride Residues of the oxide layer or the micro-channels 14 may cause the dielectric characteristics of the oxide layer to be damaged, and cause the loss of silicon nitride. Objects of the present invention: Therefore, the main object of the present invention is to provide a method to avoid silicon nitride and silicon dioxide. Etching method of interface micro trenches. Another object of the present invention is to provide an etching method to avoid loss of silicon nitride. Another object of the present invention is to provide an etching method for preventing an oxide layer from remaining on silicon nitride. Yet another object of the present invention is to provide an etching method for making a sidewall of a dielectric layer have a good inclination. Brief Description of the Drawings Figure 1 is a cross-sectional view of a conventional dielectric layer. FIG. 2 is a cross-sectional view of a conventional dielectric layer after being coated with a photoresist. FIG. 3 is a cross-sectional view of the dielectric layer after the known I worm. FIG. 4 is a cross-sectional view of a dielectric layer of the present invention. 3 This paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297 mm) C Please read the notes on the back before filling out this page) Loading ------ Order_1 '丨 · Intellectual Property of the Ministry of Economic Affairs Printed by the Bureau's Consumer Cooperatives 5 ^ A7 B7____ Printed by the Intellectual Property Bureau's Employees' Cooperatives of the Ministry of Economic Affairs 5. Description of the Invention () FIG. 6 is a cross-sectional view of a dielectric layer after etching according to the present invention. Drawing number is not. 11-Nitride cut 12-Silicon dioxide 13-Photoresist 14-Tiny trench at the interface of silicon dioxide and silicon nitride 21-Silicon nitride of this process 22 _ Silicon dioxide of this process 23 -Photoresist of this process The following describes the method of tilting silicon dioxide etching with high selectivity for silicon nitride according to the present invention: a pad oxide layer is grown on a silicon substrate, and nitride nitride is grown on the pad oxide layer 21 . The pad oxide layer is usually formed by water and oxygen in a thermal oxidation method at a temperature of about 1050c and under normal pressure for about 45 minutes to form a pad oxide layer with a thickness of about 100 angstroms. Since the present invention focuses on the etching of the dielectric layer, the silicon substrate and the pad oxide layer are omitted in the illustration. Referring to FIG. 5, a layer of silicon dioxide 22 is first grown on the nitrided sand 21. In the deposition process of silicon nitride 21, SiH £ l2 (Dichlorosilane) -based reactants are usually used, and low-pressure chemical vapor deposition (LPCVD) is used to deposit silicon nitride. By mixing SiH2Cl2 and excitation at an appropriate temperature and low pressure, the following chemical reactions are carried out: 3SiH2Cl2 (g) + 7NH3 (g) —Si3N4 (s) + 3NH4C1 (s) + 3HCl (g) + 6H2 (g) A layer of silicon nitride with an ideal ratio can be obtained on the wafer. Usually 4 paper sizes are required to comply with Chinese National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) -Line A7 B7 V. Description of the invention (f) The temperature is about 700 ° ~ 800T, and the pressure is about 0.1 ~ ITor r. SiO2 was then deposited by chemical vapor deposition (CVD). Generally, CVD is used to deposit SiCb22 by chemical vapor deposition (CVD), which is mainly TE0S. TE0S is an organic silicide containing sand and oxygen. The reaction is as follows:

Si(0GH5)4⑷—Si〇2⑷ + 4C2H4(g) + 2H2〇(g) 沈積溫度約爲650°〜750°C,壓力約在1〜10 Torr之間。 然後在所形成的二氧化矽頂層上加一光阻層23 (如圖 五);光阻的主要成分是:樹脂(Resin)、感光劑 (Sensitizer)、和溶劑(Solvent)。進行光阻塗佈(coating) 之前,需要經過去水烘烤(Dehydration Bake),以將水分 子從晶片的表面蒸除;並經過塗底(pri麵ing)的步驟,使 晶片的表面能被調整到與光阻表面能相當的程度,以增加 晶片表面和光阻的附著能力。接著利用旋轉塗蓋(spin coating)的方法將光阻均勻地附著在晶片表面,光阻層的 厚度約在Ιμιη之間。 接著進行本發明的發明重點一蝕刻。蝕刻後之二氧化 矽層的側壁將有很好的傾斜度(<80°)(如圖六),同時鈾刻製 程對於二氧化矽及氮化矽也將具有高選擇性,避免了蝕刻 過度而產生二氧化矽和氮化矽界面的微小溝渠,也避免触 刻不及而有氧化層殘留於氮化矽上。 本蝕刻製程有兩步驟:主要飽刻(main etch)及過度蝕 刻(over etch)。所用的反應性離子融刻法(Reactive Ion Etch or RIE),是一種介於灘鍍(sputtering)蝕刻和電發 (plasma)蝕刻之間的乾飽刻技術。藉著結合物理與化學兩 5 (請先閱讀背面之注意事項再填寫本頁) 裝--- I I I 訂·11.111---竣 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公爱) 經濟部智慧財產局員工消费合作社印製 A7 B7 五、發明說明(<) 〆 種去除薄膜的機構,我們可以獲得一種兼具非等向性 (anisotropic)飽刻之優點,及可以接受之選擇性的蝕刻技 術。 本發明之主要飽刻(main etch)步驟是由氬氣(Ar)提供 約10ev的能量,並藉由氟(Fluorine)能和砍反應成揮發性 的四氟化矽(SiF〇的特性,來進行蝕刻。反應式如下: CF4(g) 2F(g) + CF2(g)Si (0GH5) 4⑷—Si〇2⑷ + 4C2H4 (g) + 2H2〇 (g) The deposition temperature is about 650 ° ~ 750 ° C, and the pressure is about 1 ~ 10 Torr. Then, a photoresist layer 23 (see Fig. 5) is added on top of the formed silicon dioxide; the main components of the photoresist are: resin (Resin), photosensitizer (Sensitizer), and solvent (Solvent). Before performing photoresist coating, Dehydration Bake is required to evaporate water molecules from the surface of the wafer; and through the priing process, the surface of the wafer can be Adjust to a level comparable to the surface energy of the photoresist to increase the wafer surface and photoresist adhesion. Then, a spin coating method is used to uniformly attach the photoresist on the surface of the wafer, and the thickness of the photoresist layer is about 1 μm. Then, an etching point of the present invention is performed. After the etching, the sidewall of the silicon dioxide layer will have a good inclination (< 80 °) (see Figure 6). At the same time, the uranium etching process will also have high selectivity for silicon dioxide and silicon nitride, avoiding etching Excessive generation of tiny trenches at the interface of silicon dioxide and silicon nitride also avoids contact with the oxide layer remaining on the silicon nitride. There are two steps in this etching process: main etch and over etch. The reactive ion melting method (Reactive Ion Etch or RIE) used is a dry-saturation etching technique between sputtering and plasma etching. By combining physics and chemistry 5 (Please read the notes on the back before filling out this page) Packing --- III Order 11.111 --- End of the Ministry of Economic Affairs Intellectual Property Bureau Staff Consumer Cooperatives Printed this paper standard applies Chinese national standards (CNS) A4 specification (210 X 297 public love) A7 B7 printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (<) For a type of film removal mechanism, we can obtain a kind of non-isotropic ( anisotropic) full of advantages, and acceptable selective etching technology. The main etch step of the present invention is to provide energy of about 10 ev from argon (Ar), and the characteristics of fluorine (Fluorine) and chopping reaction to form volatile silicon tetrafluoride (SiF0). Etching. The reaction formula is as follows: CF4 (g) 2F (g) + CF2 (g)

Si〇2(s) + 4F(g) —> S1F4 (g) + 20(g)Si〇2 (s) + 4F (g) —> S1F4 (g) + 20 (g)

Si〇2(s) + 2CF2(g) -> SiF4(g) + 2C0(g) 氟對碳比値(The fluorine-to-carbon ratio ; F/C )模 型是最常用來解釋電漿蝕刻的物理和化學機制的理論:氟 能和矽反應成揮發性的SiF4,但是碳會在表面沈積一層非 揮發性的高分子(polymer),反而阻礙蝕刻繼續進行;因此 F/C愈高,飽亥丨〗率(etching rate)愈高,反之蝕亥丨摔愈低。 本發明在主要蝕刻步驟中除了使用習用之CF4,所加入的 CHB由於增加了碳的濃度,所生成的高分子將更容易沈積, 因此能夠使二氧化矽層的側壁形成良好的傾斜度。 在第二步驟的過度蝕刻中,本發明使用Ar、CHF3、 CH2F2、CHsF ;所加上的CHsF和CH2F2,大大提高了二氧化矽 對氮化矽的蝕刻選擇率,避免了二氧化矽和氮化矽界面上 微小溝渠的產生,避免了氮化矽的損失,也避免有氧化層 殘留在氮化较的表面。因爲過度蝕刻中所添入的CH3F和 同時提高了原配方(CHF3)的氫/氟比値,而照著蝕刻的 化學機制,我們知道氫會消耗氟,產生如下的反應: 6 本紙張尺度適用中國國家標準(CNS)Al規格(210x297公楚) (請先閲讀背面之注意事項再填寫本頁) — 1111 I 訂 *11-11111唉 A7 ______B7__ 五、發明說明(A) H(g) + F(g) HF(g) 但在二氧化砂的表面,由於二氧化砂能提供氧’使氧 和碳生成C0或C〇2而消耗碳,因此蝕刻仍然能在二氧化矽 表面以相當的速率進行;但是由於氮化矽無法提供氧’對 氮化矽的蝕刻變得非常困難,因此二氧化矽對氮化矽的蝕 刻選擇率大大提昇,因此在二氧化矽和氮化矽的界面也不 會產生微小溝渠和因氮化砂的損失(圖六)’同時也不會 殘留氧化層。 同時因爲本發明所加入的CBF和CH2F2較原蝕刻成分 (CHF3)提供了更高的碳濃度’使高分子更容易形成’於是接 近氮化矽和二氧化矽界面之傾斜度明顯地改善,並且在二 氧化较和氮化矽的介面沒有微小溝渠的產生(圖六),也 沒有氧化層的殘留。 (請先閱讀背面之注意事項再填寫本頁) 裝--------訂—,------«% 經濟部智慧財產局員工消費合作社印製 本纸張尺度適用中國國家標準(CNS)A-l規格(210 X 297公釐)Si〇2 (s) + 2CF2 (g)-> SiF4 (g) + 2C0 (g) The fluorine-to-carbon ratio (F / C) model is most commonly used to explain plasma etching Theory of physical and chemical mechanisms: fluorine energy reacts with silicon to form volatile SiF4, but carbon will deposit a layer of non-volatile polymer on the surface, which will prevent the etching from proceeding; therefore, the higher the F / C, the more saturated The higher the etch rate, the lower the etch rate. In the present invention, in addition to the conventional CF4 used in the main etching step, since the added CHB increases the carbon concentration, the generated polymer will be more easily deposited, so that the sidewall of the silicon dioxide layer can form a good slope. In the second step of over-etching, the present invention uses Ar, CHF3, CH2F2, and CHsF; the addition of CHsF and CH2F2 greatly improves the etching selectivity of silicon dioxide to silicon nitride, and avoids silicon dioxide and nitrogen The generation of tiny trenches on the siliconized interface avoids the loss of silicon nitride and avoids the presence of an oxide layer on the more nitrided surface. Because the CH3F added in the overetching and the hydrogen / fluorine ratio of the original formula (CHF3) are simultaneously increased, and according to the chemical mechanism of the etching, we know that hydrogen will consume fluorine and produce the following reaction: 6 This paper size is applicable China National Standard (CNS) Al Specifications (210x297) (Please read the precautions on the back before filling this page) — 1111 I Order * 11-11111 唉 A7 ______B7__ 5. Description of the Invention (A) H (g) + F (g) HF (g) But on the surface of the sand dioxide, because the sand dioxide can provide oxygen to make oxygen and carbon generate C0 or C02 and consume carbon, the etching can still be carried on the silicon dioxide surface at a comparable rate. However, since silicon nitride cannot provide oxygen, the etching of silicon nitride becomes very difficult, so the etching selectivity of silicon dioxide to silicon nitride is greatly improved, so the interface between silicon dioxide and silicon nitride is not There will be micro trenches and loss due to nitrided sand (Figure 6). At the same time, no oxide layer will remain. At the same time, because the CBF and CH2F2 added in the present invention provide a higher carbon concentration than the original etching component (CHF3), 'make the polymer easier to form', so the slope near the interface of silicon nitride and silicon dioxide is significantly improved, There are no micro trenches in the interface of the silicon dioxide and silicon nitride (Figure 6), and there is no residual oxide layer. (Please read the precautions on the back before filling out this page) Packing -------- Order-, -------- «% Printed by the Intellectual Property Bureau of the Ministry of Economy Staff Consumer Cooperatives This paper is applicable to China Standard (CNS) Al specification (210 X 297 mm)

Claims (1)

經濟部智慧財產局員工消費合作社印製 A8 399261____ 、申請專利範圍 1. 一種對氮化矽具有高選擇率的傾斜式二氧化矽蝕刻方 法,係包括: ⑻於積體電路之矽基板上形成一層氮化矽; (b) 在氮化砂表面形成一層二氧化石夕; (c) 在二氧化矽表面形成一層光阻; (d) 由CF4氣體對二氧化矽進行主要蝕刻; (e) 由CBF氣體對二氧化矽進行過度蝕刻。 2. 如申請專利第1項所述之對氮化矽具有高選擇率的傾斜 式二氧化矽蝕刻方法,步驟(d)之主要蝕刻步驟是以反應 性離子飽刻法(Reactive Ion Etch ; RIE)進行。 3. 如申請專利第2項所述之對氮化矽具有高選擇率的傾斜 式二氧化矽蝕刻方法,所述之反應性離子飩刻法之壓力範 圍爲 100 〜300m Torr。 4. 如申請專利第1項所述之對氮化矽具有高選擇率的傾斜 式二氧化矽蝕刻方法,步驟(d)中進行主要蝕刻的氣體更 包括Ar和CHF3。 5. 如申請專利第4項所述之對氮化矽具有高選擇率的傾斜 式二氧化矽蝕刻方法,所述之主要蝕刻的氣體流量爲:Ar 100-200sccm,CF4 5-20sccm。 6. 如申請專利第1項所述之對氮化妙具有高選擇率的傾斜 式二氧化矽蝕刻方法,步驟(d)中進行主要蝕刻的氣體 CHFs流量爲 20-70sccm。 7. 如申請專利第1項所述之對氮化矽具有高選擇率的傾斜 式二氧化矽蝕刻方法,在步驟(e)之過度蝕刻步驟是以反 8 (請先閱讀背面之注意事項再填寫本頁) 裝--------訂----- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公嫠) 399261 六、申請專利範圍 應性離子蝕刻法(Reactive Ion Etch ; RIE)進行。 8 _如申請專利第7項所述之對氮化矽具有高選擇率的傾斜 式二氧化矽蝕刻方法,所述之反應性離子蝕刻法之壓力範 圍爲 100 〜300m Torr。 9·如申請專利第7項所述之對氮化矽具有高選擇率的傾斜 式二氧化矽蝕刻方法,所述的反應性離子蝕刻法,CH3F 氣體流量爲20-70sccm。 10. 如申請專利第1項所述之對氮化矽具有高選擇率的傾斜 式二氧化矽蝕刻方法,步驟(e)中進行過度蝕刻的氣體更 包括 Ar、CHF3 和 0»。 11. 如申請專利第10項所述之對氮化矽具有高選擇率的傾 斜式二氧化矽蝕刻方法,所述之主要蝕刻的氣體流量爲: Ar 100-200sccm,CHF3 20-70sccm,CH2F2 0〜20sccm 〇 12. 如申請專利第1項所述之對氮化矽具有高選擇率的傾斜 式二氧化矽蝕刻方法,於步驟(a)之前更包括在矽基板上 形成墊氧化層的步驟。 13. 如申請專利第12項所述之對氮化矽具有高選擇率的傾 斜式二氧化矽蝕刻方法,所述之墊氧化層厚度爲80〜120 埃。 14. 如申請專利第13項所述之對氮化砂具有高選擇率的傾斜 式二氧化矽蝕刻方法,所述之墊氧化層是由熱氧化法形 成。 15. 如申請專利第14項所述之對氮化矽具有高選擇率的傾 斜式二氧化矽飩刻方法,所述之熱氧化法是以水和氧爲反 9 $^張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背ac之注t事項再填寫本頁) ---裝--------tr.---------線! 經濟部智慧財產局員工湞費合作社印製 A8 B8 C8 D8 399267 六、申請專利範圍 應氣體。 16.如申請專利第15項所述之對氮化矽具有高選擇率的傾 斜式二氧化矽蝕刻方法,所述之熱氧化法的反應溫度爲 950°C〜1150°C,壓力爲0.5〜1.5a tra,進行時間爲30〜60分 鐘。 (請先閱讀背•面之生"·事項再填寫本頁) 經濟部智慧財產局員工消費合作社印制衣 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)Printed by A8 399261____, a consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the scope of patent application 1. An inclined silicon dioxide etching method with high selectivity to silicon nitride, comprising: forming a layer on a silicon substrate of a integrated circuit Silicon nitride; (b) a layer of silica on the surface of nitrided sand; (c) a layer of photoresist on the surface of silicon dioxide; (d) the main etching of silicon dioxide by CF4 gas; (e) by CBF gas over-etches silicon dioxide. 2. The inclined silicon dioxide etching method with high selectivity to silicon nitride as described in the first item of the application patent, the main etching step of step (d) is a reactive ion saturation method (Reactive Ion Etch; RIE )get on. 3. According to the tilted silicon dioxide etching method with high selectivity to silicon nitride as described in the second item of the application patent, the pressure range of the reactive ion etching method is 100 ~ 300m Torr. 4. According to the tilted silicon dioxide etching method with high selectivity to silicon nitride as described in the first item of the patent application, the gas used for the main etching in step (d) further includes Ar and CHF3. 5. The inclined silicon dioxide etching method with high selectivity to silicon nitride as described in item 4 of the application patent, the main etching gas flow rate is: Ar 100-200sccm, CF4 5-20sccm. 6. According to the tilted silicon dioxide etching method with high selectivity to nitride as described in the first item of the patent application, the flow rate of CHFs of the main etching gas in step (d) is 20-70 sccm. 7. According to the tilted silicon dioxide etching method with high selectivity to silicon nitride as described in the first item of the patent application, the excessive etching step in step (e) is reversed to 8 (Please read the precautions on the back before (Fill in this page) Loading -------- Order ----- This paper size is applicable to China National Standard (CNS) A4 (210 X 297 cm) 399261 6. Application scope of patent application Reactive Ion Etch; RIE). 8 _ The inclined silicon dioxide etching method with high selectivity to silicon nitride as described in item 7 of the patent application, the reactive ion etching method has a pressure range of 100 to 300 m Torr. 9. The inclined silicon dioxide etching method with high selectivity to silicon nitride as described in item 7 of the application patent, the reactive ion etching method, and the CH3F gas flow rate is 20-70 sccm. 10. According to the tilted silicon dioxide etching method with high selectivity to silicon nitride as described in the first item of the patent application, the gas over-etched in step (e) further includes Ar, CHF3, and 0 ». 11. According to the tilted silicon dioxide etching method with high selectivity to silicon nitride as described in item 10 of the application patent, the main etching gas flow is: Ar 100-200sccm, CHF3 20-70sccm, CH2F2 0 ~ 20sccm 〇12. As described in the first patent application, the tilted silicon dioxide etching method with high selectivity to silicon nitride, further includes a step of forming a pad oxide layer on the silicon substrate before step (a). 13. According to the oblique silicon dioxide etching method with high selectivity to silicon nitride as described in the item 12 of the application patent, the thickness of the pad oxide layer is 80 to 120 angstroms. 14. The tilted silicon dioxide etching method with high selectivity to nitrided sand as described in item 13 of the patent application, the pad oxide layer is formed by a thermal oxidation method. 15. The inclined silicon dioxide engraving method with high selectivity to silicon nitride as described in item 14 of the application patent, the thermal oxidation method is based on water and oxygen. Standard (CNS) A4 specification (210 X 297 mm) (Please read the note on the back of ac before filling out this page) --- install -------- tr .-------- -line! Printed by the staff of the Intellectual Property Bureau of the Ministry of Economic Affairs Cooperatives A8 B8 C8 D8 399267 Sixth, the scope of patent application should be gas. 16. The inclined silicon dioxide etching method with high selectivity to silicon nitride according to item 15 of the application patent, the thermal oxidation method has a reaction temperature of 950 ° C ~ 1150 ° C and a pressure of 0.5 ~ 1.5a tra for 30 ~ 60 minutes. (Please read the "Back of the Face" and "Items before filling out this page") Clothing printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper applies Chinese National Standard (CNS) A4 (210 X 297 mm)
TW86116331A 1997-11-04 1997-11-04 Taped silicon dioxide etching method with high selectivity on silicon nitride TW399267B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI476832B (en) * 2011-09-28 2015-03-11 Tokyo Electron Ltd Etching method and device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI476832B (en) * 2011-09-28 2015-03-11 Tokyo Electron Ltd Etching method and device
US9263283B2 (en) 2011-09-28 2016-02-16 Tokyo Electron Limited Etching method and apparatus

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