TW392233B - Method for preventing component damages caused by removing anti-reflective film of silicon nitrogen oxide - Google Patents

Method for preventing component damages caused by removing anti-reflective film of silicon nitrogen oxide Download PDF

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TW392233B
TW392233B TW87112182A TW87112182A TW392233B TW 392233 B TW392233 B TW 392233B TW 87112182 A TW87112182 A TW 87112182A TW 87112182 A TW87112182 A TW 87112182A TW 392233 B TW392233 B TW 392233B
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Taiwan
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layer
thin oxide
silicon
oxide layer
scope
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TW87112182A
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Chinese (zh)
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Ju-Yun Fu
Shiun-Ming Jang
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Taiwan Semiconductor Mfg
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Abstract

A method for preventing component damages caused by removing anti-reflective film of silicon nitrogen oxide is discloses. The method employs two thin oxide layer formed by high temperature furnace or rapid thermal oxidation process to cover the surface of polysilicon layer and sidewall respectively as the protection layer for etching anti-reflective film of silicon nitrogen oxide by hot phosphoric acid solution that can prevent the component damages and enhance the property of product component. The method includes the following steps: sequentially forming the first thin oxide layer and an anti-reflective film of silicon nitrogen oxide for covering on the surface of said polysilicon layer; spraying a photoresist layer on top of said anti-reflective layer of silicon nitrogen oxide and defining the pattern by microlithography imaging process; using the said photoresist pattern as the mask, sequentially etching the said anti-reflective layer of silicon nitrogen oxide, the first thin oxide layer, polysilicon layer and gate oxide to form a gate structure; removing the said photoresist pattern; forming a second thin oxide layer and covering the sidewall of said gate structure and the surface of semiconductor substrate; removing the said anti-reflective layer of silicon nitrogen oxide so as to prevent the etching damage of said polysilicon layer and gate oxide layer by the protection of the first and the second thin oxide layer; and removing the said first and second thin oxide layer.

Description

經濟部中央標準局員工消費合作社印I A7 __B7 五、發明説明(l ) ~~~' 本發明係有關於半導體積體電路的製造,且特別是有 關於一種避免微影成像程.序中所使用之氮氧化矽抗反射層 (SiON ARC film),於蝕刻去除時造成元件損傷的方法。 在現今半導體積體電路製程中,光學微影程序 (photolithography)可說是極為關鍵性的步驟,其能否將所設 計的線路圖案精確地轉移到半導體基底上,是決定產品性 質良窳的重要因素之一。通常,微影程序包括:塗w(coating) 光阻、曝光(exposure)、顯影(devei〇pment)、和去除光阻等 幾個主要步驟。其中,元件所需的圖案先製作在一光罩 (photomask)上,利用一曝光程序使光阻中未被光罩圖案遮 蔽的區域產生光化學反應,改變此部份光阻的性質;接著 即進行顯影程序,以正型光阻為例,其利用一適當溶液溶 去經曝光部分的光阻’留下與光罩圖案相同的光阻圖案。 近年來’隨者元件特徵尺寸(critical dimension)持續縮 小化的發展,上述曝光程序的施行條件也變得日益嚴苛, 以往在較大尺寸製程中並不明顯的光學干擾現象,已逐漸 浮現出來而成為必須面對的課題。目前,對於因待定義圖 案材料層的反射而造成曝光圖案偏移的問題,業界常用的 方法係在光阻層下方或上方增加一吸光性質良好的抗反射 層(ARC)來改善之。其中,氮氧化矽(Si〇N)層已成功地被靡 思為義慕,3顯Θ蘇%履_鳳痛;暴層,镇,激參在.線,.寬 0.21吧甚或更小:尺寸的製程中。 —般而言’在利用光阻層當作罩幕而蝕刻定義複晶石夕 層的圖案後,通常必須去除上述氮氧化矽抗反射層,以利 本紙張尺度適用中國國家標準(CNS ) Λ4規格(2丨OX297公# ) (讀先閱讀背面之注意事項再漆寫本頁) 訂 經濟部中央標準局員工消費合作社印裝 A7 __' _B7 五、發明説明(2 ) 後續沈積金屬材料來形成金屬矽化物。然而,若以氫氟酸(HF) 溶液當作钮刻溶液,因其姓刻速率較低而必須施行較長時 間,不僅影響生產的效率,也使得複晶矽層下方的閘氧化 層受到過度的钮刻,造成元件性質的降低。另一方面,若 改用熱填酸溶液(hot H3P04 solution)取代氫氣酸溶液以去除 上述氮氧化矽抗反射層,雖然可因蝕刻速率較高而避免閘 氧化層被過度蝕刻,但經由電子顯微鏡觀察的結果,此種 溶液卻會像,暴邊雙及產:生,缺陷,,同樣不利於元件,的.性質, 因此ϋ非完善〇 為了進一步了解習知方法的問題,以下即參照第1A 至ID圖,說明習知技術之製造流程。首先,如第1A圖所 示者,提供一半導體基底10,例如是一矽晶圓,其上方形 成有一閘氧化層11和一複晶矽層12。在複晶矽層12表面 上,覆蓋一氮氧化矽抗反射層13,其厚度約為300A。接著, 以旋轉塗佈方式形成一光阻層14於氮氧化矽抗反射層13 表面上。 其次,如第1B圖所示者,施行一微影成像程序以定 義出光阻層圖案14a。然後,利用此一光阻層圖案14a當作 罩幕,依序蝕刻上述氮氧化矽抗反射層13、複晶矽層12、 及閘氧化層11至露出半導體基底10的表面為止,留下定 義圖案的氮氧化矽抗反射層13a、複晶矽層12a、及閘氧化 層11a,形成如第1C圖所示的閘極構造。 接下來,請參見第1D圖,於去除光阻層圖案14a後, 再以氫氟酸溶液或熱磷酸溶液去除上述剩餘的氮氧化矽抗 本紙張尺度適用中國國家標準(CNS ) A4規枱(210X297公漦) (讀先閱讀背面之注意r項再填寫本頁) 訂 綵 .經濟部中央樣準局員工消費合作社印製 A7 B7 五、發明説明(3 ) 一'— 反射層Ha’以利後續沈積金屬材料而與複晶石夕層12&形成 金屬妙化物。吾人應注意者,由於氫氟酸溶液的姓刻速率 較低而必須施行至少1G分鐘以上,不僅料生產的效率, 也使得複晶石夕層下方的閘氧化層Ua受到過度的餘刻,如 圖中箭號B所示者。另—方面,若使用熱鱗酸溶液雖然可 改善餘刻速率,避免閘氧化層Ua被過度姓刻,但經由電 子顯微鏡(SEM & TEM)觀察的結果,_驗卻容易使複 晶石夕層12a產生缺陷,如圖中箭號a所示者,同樣影響了 元件的性質,而仍有待謀求改進之道。 a 有鑤於此,本發明的主要目的,在提供一種半導體積 姐錢II氮康,其顧备氧—抗及Λ氣來孤羞』▲ 射而造成曝光凰應赢赢綠得題,龜^ 為達成上述目的,本發明提出一種避免氮氧化矽抗反 射層(SiON ARC film)去除時造成元件損傷的方法,主要係 利用同.孤..爐^處拖丨遽^惠爲纟也藏赢應痛氧化層,分別 霉《^Sidis^eSfc慈,作為熱酸溶液姓列氣氧 化矽抗反射層時的保護層,可避免造成元件損傷,提 品元件的性質。 詳言之,本改良方法包括:提供一半導體基底,其上 形成有一閘氧化層和一複晶矽層;依序形成一德縛氧ft 層和一 <•氧化矽參反射層覆蓋於上述複晶矽層表面上;塗 佈一光阻層於上述氮氧化石夕抗反射層上,並以微影成像程 序定義出圖案;利用上述光阻層圖案當作罩幕,依序钱刻 本紙張尺度適用中國國家標準(CNS ) A4規格(2丨0X297公费) --------1>------、耵------雄 j (諳先聞讀背面之注意矿項再4-寫本頁} A7 B7 五、發明説明(4 ) 上述氮氧化矽抗反射層、第一薄氧化層、複晶矽層、及閘 氧化層以形成一閘極構造;去除上述光阻層圖案;形成一 4二薄氧屬’覆蓋於上述閘極構造的_聲止和表導體基 底的表面上;去除上述氮氧化矽抗反射層,其中藉由第一 和第二薄氧化層的保護,避免上述魏晶矽層》和閘氧北層受 到蝕刻損傷;以及去除上述第一和第二薄氧化層。 根據本發明的較佳實施例,其中係以高溫爐(furnace) 或快速熱氧化(RTO)程序形成上述第一薄氧化層和第二薄氧 化層,其厚度分別約為翁〇1參gg翁其中係以熱磷酸溶液(h〇t Η/Ο4 solution)去除氮氧化矽抗反射層,而以氫氟酸溶液浸 泡約1分鐘的時間而去除第一和第二薄氧化層,其組成係 HF : H20 = 50 : 1。 為了讓本發明之上述和其他目的、特徵、及優點能更 明顯易懂,下文特舉一較佳實施例’並配合所附圖式,作 詳細說明如下: 圖式之簡軍說明 第1A至1D,圖為一系列剖面圖,顯示習知使用氮氧化 矽當作抗反射履的製造流程;以及 經濟部中央標準局員工消費合作社印製 第?A至2E圖為一系列剖面圖,顯示依據本發明民良 方法一雜佳的製造流程。 實施例 首先,如第2Α圖所示者,提供一半導體基底20,例 如是一石夕晶圓,其上方形成有一閘氧化層21和一複晶;g夕層 22。其次,利用高温爐(furnace)或快速熱氧化(rt〇)程序, 本紙張尺度適用中國國家標準(CNS ) A4規枱(21〇X 297公f ) A7 A7 經濟部中央標準局員工消費合作社印裝 — 、發明説明( 在複晶發層22表面上成長一薄氣化展 缺後如 风长脣虱化層25,其厚度約為50人。 然後,在薄氧化層23表面上覆蓋— 苴厘择氮虱化矽抗反射層23, 二::、、、勺為250A。接著’以旋轉塗 於氮氧化石夕抗反射層23表面上。飞^締層24 請參見第1B圖,施行一微影成 戶圖牵- 像程序以定義出光阻 中:加了-“化蜃25,但大电於其厚度僅約為 上氮氧化受扳瓦射屬'汾的厚度也做了適,度縮姑’? ^ ^ 從PROLITH的電腦模擬或實際施行的結、'於因此無响 ^ 不’均顯示不會造 成光學特徵尺寸控制(photo CD control)上的問題 接著’利用此-光阻層圖案24a當作罩幕,依 上述氮氧化矽抗反射層23、薄氧化層25、溢曰a „ 人 设晶矽層22、及 閘氧化層21至露出半導體基底2〇的表面為止, ^ 圖案的氮氧化矽抗反射層23a、薄氧化層2Sa、^ B 定義 後曰日石夕層22a、 及閘氧化層21a,形成如第2C圖所示的閘極構造。—、 上述蝕刻定義圖案的步驟之後,再以適當、、容 :成了 圖案24a。 ’去除光阻層 接下來’請參見第2D圖,再次施行—古、θ ^ 网、値爐或快速 熱氧化程序,政▲麗振構,途薦麟屢上%泰.導體基底、 面上處ϋ一薄氧化層26,其厚度、,約為3.〇a ,的表 、 "A。、如此,複 矽層22a可完全地被薦墨。之後,以熱磷酸溶、 去除上述氮氧化矽抗反射層23a,以利後續沈積金 二液 與複晶矽層圖案22a形成金屬矽化物。由於古^而 、有溥氧化層25 和26的保護作用,複晶石夕層圖案22a便不會受到熱 , 本紙張尺度適用中國國家榡率(CNS ) A4規桔(210X29*7公漦) ------n n II ϋ t^i ^L·/ n n n----n n T n I I I n ! . (諳先閲讀背面之注意¼'項再4-寫本頁) A7 B7 五、發明説明(6 ) 液的侵蝕而產生非期望的缺陷,因而有效地改善了習知製 程的問題。 最後,如第2E圖所示者,以適,當蝕就藏座造..除上述的 ^氯化層«和46* ’留下包含閘氧化層21a和複晶碎閘極層 22a的閘極構造。例如,以組成為HF1...: H20 = 50 :, 1 氫| 酸.溶液漫息錢一分鏵左右,即可將薄氧化層25和26清除, 且不至於過度蝕刻閘氧化層21a。 综上所述,本發明之改良製程利用高溫爐或^快速熱氧 化程序形成兩層薄氧化層,分別覆蓋在複晶石夕層表面和側 壁上,作為熱磷酸溶液蝕刻氮氧化矽抗反射層時的保護層, 可有效避免造成元件損傷,提昇產品元件的性質。 本發明雖然已以一較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍内,當可作些許之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者為準。 (讀先閱讀背面之注意事項再填寫本頁) 、τ Γ 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) A4規梏(210X297公#.)Printed by the Consumers 'Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs I A7 __B7 V. Description of the Invention (l) ~~~' The present invention relates to the manufacture of semiconductor integrated circuits, and in particular to a process for avoiding lithography imaging. A method of using a silicon nitride oxide anti-reflection layer (SiON ARC film) to cause damage to the device during etching. In today's semiconductor integrated circuit manufacturing processes, photolithography is a critical step. Whether it can accurately transfer the designed circuit pattern to the semiconductor substrate is an important factor that determines the quality of the product. Factor. Generally, the lithography process includes several major steps: coating photoresist, exposure, development, and photoresist removal. Among them, the required pattern of the element is first made on a photomask, and an exposure process is used to cause a photochemical reaction in the area of the photoresist that is not covered by the photomask pattern, thereby changing the nature of this part of the photoresist; The developing process is performed, taking a positive type photoresist as an example, which uses a suitable solution to dissolve the photoresist of the exposed portion, leaving the same photoresist pattern as the photomask pattern. In recent years, the development of the "critical dimension" of components has continued to shrink, and the implementation conditions of the above-mentioned exposure procedures have become increasingly severe. Optical interference phenomena that were not obvious in the previous large-scale processes have gradually emerged. It has become a subject that must be faced. At present, for the problem of shifting the exposure pattern due to the reflection of the pattern material layer to be defined, a common method in the industry is to add an anti-reflection layer (ARC) with a good light absorption property under or above the photoresist layer to improve it. Among them, the silicon oxynitride (SiON) layer has been successfully considered as a righteous admiration, 3 shows Θ Su %% _ _ Fengtong; violent layers, towns, radical parameters in the line, 0.21 wide or even smaller: size In the process. -Generally speaking, after the photoresist layer is used as a mask to etch the pattern defining the polycrystalline spar layer, the above-mentioned silicon oxynitride anti-reflection layer must usually be removed to facilitate the application of the Chinese National Standard (CNS) Λ4 for the paper size. Specifications (2 丨 OX297 公 #) (Read the precautions on the back and then paint this page) Order the A7 __ '_B7 printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (2) Subsequent deposition of metal materials to form Metal silicide. However, if a hydrofluoric acid (HF) solution is used as the button-etching solution, it must be performed for a long time because of its low surname-engraving rate, which not only affects the production efficiency, but also causes the gate oxide layer under the polycrystalline silicon layer to be excessively affected. Button engraving, resulting in degradation of component properties. On the other hand, if a hot H3P04 solution is used instead of a hydrogen acid solution to remove the above-mentioned silicon oxynitride antireflection layer, although the gate oxide layer can be prevented from being over-etched due to the high etching rate, the electron microscope is used to As a result of observation, such a solution would look like, edgy, and produce defects that are also not conducive to the components. Therefore, it is not perfect. In order to further understand the problems of conventional methods, refer to Section 1A below. To the ID chart, explain the manufacturing process of the conventional technology. First, as shown in FIG. 1A, a semiconductor substrate 10 is provided, for example, a silicon wafer, and a gate oxide layer 11 and a polycrystalline silicon layer 12 are formed on the square. On the surface of the polycrystalline silicon layer 12, a silicon nitride oxide antireflection layer 13 is covered, and the thickness is about 300A. Next, a photoresist layer 14 is formed on the surface of the silicon oxynitride anti-reflection layer 13 by spin coating. Next, as shown in FIG. 1B, a lithography imaging process is performed to define the photoresist layer pattern 14a. Then, using this photoresist layer pattern 14a as a mask, the silicon oxynitride anti-reflection layer 13, the polycrystalline silicon layer 12, and the gate oxide layer 11 are sequentially etched until the surface of the semiconductor substrate 10 is exposed, leaving a definition The patterned silicon oxynitride antireflection layer 13a, the polycrystalline silicon layer 12a, and the gate oxide layer 11a form a gate structure as shown in FIG. 1C. Next, referring to FIG. 1D, after removing the photoresist layer pattern 14a, the remaining silicon oxynitride is removed with a hydrofluoric acid solution or a hot phosphoric acid solution. This paper is compliant with China National Standard (CNS) A4 regulations ( 210X297 public money) (Read the note r on the back before you fill in this page) Ordering. A7 B7 printed by the Consumer Cooperatives of the Central Procurement Bureau of the Ministry of Economic Affairs V. Description of the invention (3)-'-Reflective layer Ha' to facilitate Subsequent deposition of a metal material to form a polymetallic compound with the polycrystalline spar layer 12 & I should note that due to the low engraving rate of the hydrofluoric acid solution, it must be performed for at least 1G minutes. Not only the production efficiency, but also the gate oxide layer Ua under the polycrystalline stone layer is subjected to excessive time, such as The one shown by arrow B in the figure. On the other hand, although the use of a hot scale acid solution can improve the remaining etching rate and prevent the gate oxide layer Ua from being over-engraved, the results observed by the electron microscope (SEM & TEM) can easily make polycrystalline stone Layer 12a has defects, as shown by arrow a in the figure, which also affects the properties of the component, but there is still room for improvement. a In view of this, the main purpose of the present invention is to provide a semiconductor product, Qian II Ni Kang, which is prepared for oxygen-anti and Λ gas to be lonely. ▲ ▲ Exposure caused by exposure should win the green question, turtle ^ In order to achieve the above object, the present invention proposes a method for avoiding damage to the element when removing a silicon nitride oxide anti-reflection layer (SiON ARC film), which mainly uses the same. The oxidizing layer of Yingying pain, respectively, "Sidis ^ eSfc", as a protective layer when the anti-reflective layer of silicon oxide in the hot acid solution is named, can avoid causing damage to the components and improve the properties of the components. In detail, the improved method includes: providing a semiconductor substrate on which a gate oxide layer and a polycrystalline silicon layer are formed; sequentially forming a germanium-bound oxygen ft layer and a < • silicon oxide reflective layer covering the above On the surface of the polycrystalline silicon layer; coating a photoresist layer on the above-mentioned anti-reflection layer of oxynitride, and defining a pattern using a lithography imaging program; using the above photoresist layer pattern as a mask, sequentially engraving the paper The standard is applicable to China National Standard (CNS) A4 specification (2 丨 0X297 public fee) -------- 1 > --------, 耵 ------ Xiong j (谙 first read the note on the back Mining item 4-Write this page} A7 B7 V. Description of the invention (4) The above silicon oxynitride anti-reflective layer, first thin oxide layer, polycrystalline silicon layer, and gate oxide layer to form a gate structure; remove the above Photoresist layer pattern; forming a thin layer of oxygen on the surface of the above-mentioned gate structure of the acoustic stop and surface conductor substrate; removing the above-mentioned silicon oxynitride antireflection layer, wherein the first and second thin oxides Layer protection to prevent the above-mentioned Wei Jing silicon layer and the gate oxygen layer from being damaged by etching; Thin oxide layer. According to a preferred embodiment of the present invention, the first thin oxide layer and the second thin oxide layer are formed by a high-temperature furnace or a rapid thermal oxidation (RTO) process, and the thicknesses thereof are each about 60 Å. 1 reference gg Weng where the hot nitric acid solution (hOt Η / 0 4 solution) is used to remove the silicon oxynitride anti-reflection layer, and the hydrofluoric acid solution is immersed for about 1 minute to remove the first and second thin oxide layers, Its composition is HF: H20 = 50: 1. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings for detailed description. The figures are as follows: Brief explanation of the drawings, Nos. 1A to 1D, and a series of cross-sectional views showing the manufacturing process of using conventional silicon oxynitride as anti-reflection shoes; and the No. A printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. Figures 2E to 2E are a series of cross-sectional views showing a good manufacturing process according to the Minliang method of the present invention. First, as shown in Figure 2A, a semiconductor substrate 20, such as a Shi Xi wafer, is provided above it. A gate oxide layer 2 is formed 1 and a compound crystal; g evening layer 22. Secondly, using a high temperature furnace (furnace) or rapid thermal oxidation (rt0) procedures, this paper size applies the Chinese National Standard (CNS) A4 gauge (21〇X 297 male f) A7 A7 Printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs—Invention Description (After growing a thin gasification layer on the surface of the polycrystalline hair layer 22, the thickness is about 50 people. The thickness is about 50 people.) Cover the surface of the thin oxide layer 23-苴 Select the nitrogen anti-reflective silicon layer 23, 2 :: ,,, and spoon are 250A. Then, apply the spin coating on the surface of the oxynitride anti-reflective layer 23. Fly ^ Association layer 24 Please refer to Fig. 1B. A photolithography process is used to define the photoresist. In the photo-addition:-"Chemical 25, but the thickness of the battery is only about the upper nitrogen oxide. Shooting 'Fen's thickness has also been adjusted to reduce the thickness'? ^ ^ From the computer simulation of PROLITH or the actual implementation of the knot, 'Yu therefore no sound ^ No' shows that it will not cause optical feature size control (photo CD control ) Followed by 'Using this-the photoresist layer pattern 24a as a mask, according to the above silicon oxynitride antireflection layer 23 A thin oxide layer 25, a silicon oxide layer 22, and a gate oxide layer 21 are provided until the surface of the semiconductor substrate 20 is exposed. The patterned silicon oxynitride anti-reflection layer 23a, thin oxide layer 2Sa, and ^ B are defined. Next, the sun-stone evening layer 22a and the gate oxide layer 21a form a gate structure as shown in FIG. 2C. — After the above step of etching to define a pattern, the pattern 24a is formed with a proper, appropriate content. 'Removing the photoresist layer next' Please refer to Figure 2D, and implement again-ancient, θ ^ net, oven or rapid thermal oxidation procedures, political ▲ Li Zhengou, Tu Jianlin repeatedly on% Tai. Conductor substrate, surface A thin oxide layer 26 is disposed at a thickness of about 3.0 Å, " A. In this way, the composite silicon layer 22a can be completely recommended. Afterwards, the above-mentioned silicon oxynitride anti-reflective layer 23a is dissolved and removed with hot phosphoric acid, so as to facilitate subsequent deposition of a second gold solution and a polycrystalline silicon layer pattern 22a to form a metal silicide. Due to the ancient protection of the oxide layers 25 and 26, the polycrystalline spar pattern 22a will not be exposed to heat. This paper size applies to the Chinese National Standard (CNS) A4 standard orange (210X29 * 7mm) ------ nn II ϋ t ^ i ^ L · / nn n ---- nn T n III n! Disclosure of the Invention (6) Undesirable defects are generated by the erosion of the liquid, thereby effectively improving the problems of the conventional process. Finally, as shown in FIG. 2E, when appropriate, the deposit is made when etching .. In addition to the above-mentioned ^ chloride layer «and 46 * ', the gate containing the gate oxide layer 21a and the multi-crystal broken gate layer 22a is left.极 结构。 Extreme structure. For example, with a composition of HF1 ...: H20 = 50 :, 1 hydrogen | acid. The solution diffuses a minute or so, and the thin oxide layers 25 and 26 can be removed without over-etching the gate oxide layer 21a. In summary, the improved process of the present invention uses a high-temperature furnace or a rapid thermal oxidation process to form two thin oxide layers, which are respectively covered on the surface and side walls of the polycrystalline stone layer as a hot phosphoric acid solution to etch the silicon oxynitride anti-reflective layer The protective layer can effectively avoid component damage and improve the properties of product components. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application. (Read the precautions on the back before you fill out this page), τ Γ Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs This paper size applies to China National Standard (CNS) A4 Regulations (210X297 公 #.)

Claims (1)

經濟部中央標準局員工消費合作社印製 A8 B8 C8 D8 六、申請專利範圍 1. 一種避免氮氡化矽抗反射層(SiON ARC film)去除時 造成元件損傷的方法,包括下列步驟: 提供一半導體基底,其上形成有一股氡化層和一複晶 矽層; 依序形成一第一薄氧化層和一氮氧化矽抗反射層.覆蓋 於該複晶矽層表面上; 塗佈一光阻層於該氮氧化矽抗反射層上,並以微影成 像程序定義出圖案; 利用該光阻層圖案當作罩幕,依序蝕刻該氮氧化矽抗 反射層、該第一薄氣化層、該複晶矽層、及該閘氧化層以 形成一閘極構造; 去除該光阻層圖案; 形成一第二薄氧化層,覆蓋於該閘極構造的側壁上和 該半導體基底的表面上; 去除該氮氧化矽抗反#層,其中藉由該第一和第二薄 氧化層的保護,避免該複晶矽層和該閘氧化層受到蝕刻損 傷;以及 去除該第一和第二薄氧化層。 2. 如申請專利範圍第1項所述一種避免氮氧化矽抗反 射層去除時造成元件損傷的方法’―其中係以高溫爐(furnace) 熱氧化.程序形成該第一薄氧化層,其厚度約為50A。 3. 如申請專利範圍第1項所述一種避免氮氧化矽抗反 釦層去除時造成元件損傷的方法,其中係以快速熱氧化(RTO) 程-序形成該第一薄氧化層,其厚度約為50A。 10 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) (請先閲讀背面之注意事項再填寫本頁) 訂 r. A8 3922SS ?88 D8 六、申請專利範圍 4. 如申請專利範圍第1項所述一種避免氮氧化矽抗反 射層去除時造成元件損傷的方法,其中該氮氧化石夕抗反射 層的厚度約為250A。 5. 如申請專利範圍第1項所述一種避兔.幕4丄匕雙越反. 射層怎除時造成元件損傷的2L锋,甚中係以高溫爐(furnace) 熱氧化程序形成該第二薄氧化層,其厚度約為30A。 6. 如申請專利範圍第1項所述一種避免氮氧化矽抗反 .射層去除時造成元件損傷的方法,其中係以快速熱氧化(RTOL 程序形成該第二薄氧化層」其厚度約為/30A。 7. 如申請專利範圍第1項所述-種避免Jl氧化、石夕抗反 射層I除時造成元件損傷的方、法,其中係以熟磷酸溶液(hot H3P04 solution)去除該氮農化石夕抗尽射層。 8·如申讀利—範麗第1項所述一種壤免氧化矽抗反 射層去除日夺_造成元件損傷的方法,其中係以氫氟酸溶液浸 龜JUL念,藏feUf·間而去.除.該第一和苐一薄氣,化層。 9.如申請專利範圍第8項所述一種避免氮表化身抗反 射層去除時造成元件損傷的方法,其中該氳氟酸溶液的組 成係 HF : H20 = 50 : 1。 (請先閲讀背面之注意事項再填寫本頁) 訂 經濟部中央標準局員工消費合作社印製 11 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐)Printed by A8, B8, C8, D8, Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 6. Application scope of patents 1. A method for avoiding damage to components during removal of SiON ARC film, including the following steps: Provide a semiconductor A substrate on which a halide layer and a polycrystalline silicon layer are formed; a first thin oxide layer and a silicon oxynitride antireflection layer are sequentially formed. Covering the surface of the polycrystalline silicon layer; coating a photoresist Layer on the silicon oxynitride anti-reflection layer, and define a pattern using a lithography imaging program; use the photoresist layer pattern as a mask, and sequentially etch the silicon oxynitride anti-reflection layer and the first thin gasification layer , The polycrystalline silicon layer, and the gate oxide layer to form a gate structure; removing the photoresist layer pattern; forming a second thin oxide layer covering the sidewall of the gate structure and the surface of the semiconductor substrate Removing the silicon oxynitride anti-reflective layer, wherein the polycrystalline silicon layer and the gate oxide layer are prevented from being damaged by etching by the protection of the first and second thin oxide layers; and the first and second thin oxide layers are removed; Oxide layer. 2. A method for avoiding damage to the element when the silicon oxynitride anti-reflection layer is removed as described in item 1 of the scope of the patent application ', wherein the first thin oxide layer is formed by thermal oxidation in a high temperature furnace. Approximately 50A. 3. A method for avoiding damage to the element during removal of the anti-knot layer of silicon oxynitride as described in item 1 of the scope of the patent application, wherein the first thin oxide layer is formed by a rapid thermal oxidation (RTO) process, the thickness of which is Approximately 50A. 10 This paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 mm) (Please read the precautions on the back before filling out this page) Order r. A8 3922SS? 88 D8 6. Scope of patent application 4. Such as patent application The method described in the first item of the scope to avoid damage to the element when the silicon oxynitride antireflection layer is removed, wherein the thickness of the oxynitride antireflection layer is about 250A. 5. As described in item 1 of the scope of the patent application, a kind of rabbit avoidance. Curtain 4 dagger double counter-reflection. How to remove the 2L front of the layer to cause component damage, even the middle is formed by a high temperature furnace thermal oxidation process Two thin oxide layers with a thickness of about 30A. 6. As described in item 1 of the scope of the patent application, a method for avoiding damage to the silicon nitride oxide anti-reflective layer when removing the layer, wherein the second thin oxide layer is formed by rapid thermal oxidation (RTOL procedure). Its thickness is about / 30A. 7. As described in item 1 of the scope of the patent application-a method and method to avoid J1 oxidation and damage to the element when the anti-reflection layer I is removed, wherein the nitrogen is removed by a hot phosphoric acid solution (hot H3P04 solution) Agrochemical fossil anti-radiation layer. 8 · As described in Shenli Li-Fan Li, a method of removing anti-reflection layer of silicon oxide-free silicon anti-reflection layer and causing damage to components, in which a hydrofluoric acid solution is used to soak the turtle JUL I ’m going to hide the feUf after a while. In addition to the first and second thin layer, the chemical layer. 9. As described in item 8 of the scope of the patent application, a method to avoid damage to the element when the antireflective layer of the nitrogen surface avatar is removed, The composition of the gadolinium acid solution is HF: H20 = 50: 1. (Please read the precautions on the back before filling out this page.) Ordered by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs. 11 This paper size applies to Chinese national standards ( CNS) A4 size (210X297 mm)
TW87112182A 1998-07-24 1998-07-24 Method for preventing component damages caused by removing anti-reflective film of silicon nitrogen oxide TW392233B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108231778A (en) * 2016-12-09 2018-06-29 联华电子股份有限公司 Semiconductor element and preparation method thereof
US11411009B2 (en) 2018-04-12 2022-08-09 United Microelectronics Corp. Semiconductor device and method for fabricating the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108231778A (en) * 2016-12-09 2018-06-29 联华电子股份有限公司 Semiconductor element and preparation method thereof
US11411009B2 (en) 2018-04-12 2022-08-09 United Microelectronics Corp. Semiconductor device and method for fabricating the same

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