A7 _______B7 五、發明説明（丨） 本發明係有關在半導體基片上製造積體電路之方法和 裝置。尤其是，本發明係有關在積體電路的製造中在基片 上所形成孔口之選擇性金屬化而在包含高縱橫比次半微米 應用之諸如接點或穿孔之孔口的導電層之間形成無空洞連 接，而且在工作區上形成一高度定位圍包層的方法和裝 m » 次半微米多層金靥化是下一代非常大型積體（VLSI) 之主要技術之一。此種技術之核心的多層互連需要將形成 於高縱橫比孔口的互連特點，包括接點、穿孔、線或其他 特點，加以平面化。這些互連特點之可靠形成對於VLSI 之成功和在各別基片及鑄模上提升電路密度和品質之後續 努力是非常重要的。 提升電路密度之一種方法是減小製成積體電路之金靥 導體的尺寸。當尺寸減小時，操作速率增加且功率密度保 持不變 > 但電流密度隨減小因數而比例地增加。金屬導體 具有因電子遷移之電流密度上限。電子遷移是固態原子在 電力影響下從一處移至另一處的一種擴散過程。這種效應 限制一導體所攜帶而無快速破壞之最大電流。例如，對於 積體電路之鋁導髖的電流密度必須保持低於106 。電 經濟部中夬棣準局負工消費合作社印製 子遷移並不限制最小裝置尺寸，但是限制在單位時間內一 給予數目之連接電路元件所進行之電路功能數目》導電層 之高度定位結晶成長具有增強之電子遷移阻力。因此 > 隨 著積體電路外形之減小，對於高度定位薄膜之需求增加。 理想上，具有<11 1>結晶方位之薄膜層形成於基片上可改 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 經濟部中夬標準局員工消費合作杜印製 A7 _ B7 五、發明説明（> ) 良小型稹體電路上薄膜之電子遷移性質。 用於澱稹薄膜餍之二種習見方法是化學蒸滠法（CVD) 和物理蒸澱法（PVD>· CVD程序一般包含一圍包程序和 一選擇程序，其中當化學蒸氣之一成份接觸基片上之一 “成核處”時發生一薄膜層之澱積》該成份附著於成核處， 產生進一步澱稹之濂積表面。在一圍包CVD程序中，所有 表面作爲成核表面，並且蒸氣將會把一薄膜澱積在基片之 整個曝露表面上，包括孔口以及工作區之側邊和底部表 面。一選擇性程序一般只將薄膜澱稹在基片上之選擇成核 處上面，一般是在孔口之底部》 在一圍包CVD程序中所澱積之薄膜，即使是非常小之 孔口形狀，通常是共形的並且提供極佳之步驟性覆蓋，亦 即，在基片上所形成之任何孔口之側邊和底部上有均勻厚 度層。因此，圍包CVD是用以充塡孔口之常用方法《但 是，關於圍包CVD程序有二個主要困難。第一，圍包 CVD膜從一孔口之所有側邊成長，因爲在孔口被完全充塡 之前（亦即，“隆起”）澱積層在孔口之上方角落向上且向外 地成長且在孔口之上表面跨接，所以導致在充塡孔口內有 一空洞。而且，確保在基片之所有表面上成核之一連續成 核餍，亦即，一連續薄膜層，它是澱積在孔壁上以便澱積 CVD餍，進一步地減小孔口之寬度，因而提升沒有空洞之 孔口無空洞充塡之難度。第二，利用圍包CVD而澱積的薄 膜會與該等薄膜所澱讀之表面形勢共形，如果表面形勢無 一定方位或隨機，則將形成具有隨機方位結晶構造以及較 本紙張尺度逋用中國國家揉準（CN'S ) A4規格（210X297公釐） -------丨装------訂-----丨線 (請先聞讀背面之注意事項再填寫本頁) 經濟部中央標隼局員工消费合作社印製 A7 B7 五、發明説明（？） 低反射性和不良電子遷移性能之薄膜。 選擇性CVD是基於提供澱積膜之CVD先驅氣體的分 解通常需有來自一導電成核膜之電子源的事實。依據一習 見選擇性CVD程序，澱積應發生在一孔口之底部’在該處 曝露出一導電膜或來自底層之摻雜矽，但不應成長於沒有 成核處之絕緣工作區或絕緣孔壁上。這些露出於孔口底部 的導電膜及/或摻雜矽，不同於介電表面，供應先驅氣體 之分解所需的電子並且形成薄膜層之澱積。經由遘擇性澱 積所得結果是在能夠充塡非常小尺寸（<〇.25#m)，高縱 橫比（>5:1)穿孔或接點的孔口內的薄膜“由下向上”成 長。但是，在選擇性CVD程序中，表面具有缺陷的工作區 上形成著不必要的球圏》 另一方面，PVD程序能澱積具有改良反射性之髙度定 位薄膜，但不能提供在高縱橫比應用之良好孔口充塡或層 級覆蓋。目標材料之物理濺射使得粒子相對於基片表面以 銳角行進。結果，在待充塡之高縱橫比孔口處，在孔口被 完全以澱稹材料充塡之前濺射粒子將傾向於澱積在上方壁 面並且覆蓋其開口。所形成之構造一般包含影響基片上所 形成裝置之整體性的空涧。 高縱橫比孔口可使用PVD程序在升高溫度下澱積薄膜 而被充塡。例如，可在400 °C或較高溫度下澱積鋁以增強 在表面和整個孔口上增強鋁之流量。己發現此種熱A1程序 提供改良的層級覆蓋《但是，使用熱A1程序所澱積之薄膜 具有不良之反射率•高反射率是薄膜之一重要特性，因爲 _—_6 本纸張尺度通用中國國家標準（CNS ) A4規格（210X297公 --------k —裝------訂丨_^-----線 (諳先閲讀背面之注意事項再填寫本頁) A7 B7 經濟部中央標準局貝工消費合作杜印装 五、發明说明（if ) 它是高度定位結晶構造之一種指示，那表示有較佳之電子 遷移性能並且在積體電路製造時在基片上各層成型之晶元 照相程序中可有較佳之線條輪廓。 因此，需有孔口之無空洞充塡的金靥化程序，尤其是 對於髙縱橫比，次四分之一微米的應用，它減少在工作區 上球圃形成之問題雏且當孔口被充塡時在工作區上提供均 勻之薄膜餍成長。尤其是，需有一程序在高縱橫比次四分 之一微米孔口內達成選擇性澱積並且在工作區上達成高度 定位（亦即，<111>)薄膜之同時圍包澱積，特別是該程序 在一可控率下形成高度定位薄膜之情況更需如此。也需要 提供利用PVD或CVD技術在障礙或襯墊層上所澱積金屬 膜之增強反射率。因此有必要尋求一種單一程序，它可在 一種應用中消球團形成且改良選擇性，並且在另一種應用 中提供具有改良反射率之薄膜。 本發明提供用以在一基片上澱槙一小量自對齊材料而 當在基片上選擇地充塡高縱橫比孔口時防止在工作區上形 成球團或增強一後纘薄膜之反射率的一種方法和裝置。最 好是，該小量自對齊材料是選自鈦、氮化鈦、鋁、Nb、矽 酸鋁、矽石 '高礬土 ' Si、Cu、Ta或其組合物並且以從 大約數個散射原子至約1 00 ^之薄雇的數量被澱積。 在本發明之一論點中，提供利用在一孔口內選擇地形 成一薄膜層且在一基片之工作區上澱積一圍包層而防止在 一介電表面上球團之形成的一種方法和裝置。該程序包括 首先澱積一小量之自對齊材料而在將成長薄膜之一成型基 本紙張尺度逋用中國國家標準（CNS ) A4規格（210X297公釐） 裝------訂------線 (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員Η消費合作社印製 A7 B7 五、發明説明（5) 片的工作區上形成多數個自對齊成核處，並且接著澱積導 電薄膜層於其上。最好是，該等自對齊成核處是利用澱積 一超薄膜成核層而形成以致成核處之密度可控制工作區上 薄膜成長率而使得孔口完全被充塡之前孔口之開口不會被 跨接。 在本發明之另一論點中，首先利用澱積一小量的自對 齊材料於障礙或襯墊餍上並且接著利用PVD或CVD程序 在其上面澱積所需高反射率薄膜而提供用以改良在一障礙 層或襯墊層上所成薄膜層之反射率的一種方法和裝置。 本發明之上述特點、優點和目的可參考附圖而從本發 明之較佳實施例的說明而更明白》 但是，應注意到，附圖所示之實施例只是本發明之典 型實施例且因此不欲做爲本發明之範圍限定，因爲本發明 可應用於其他相等效用之實施例。 第1圖是展示依據本發明之一論點而在一基片上澱積 各層的基片之橫截面圖； 第2圖是展示利用不同程序所形成各層，包括依據本 發明之一論點所形成之一餍，的反射率之比較圖； 第3圖是在一介電層所形成具有一工作區和高縱橫比 孔口之基片橫截面圖； 第4圖是在第3圖的基片上所形成一成核材料之物理蒸 澱次單層之橫截面圖； 第5圖是在第4圖的基片工作區上澱積圍包層且在孔口 中選擇地澱積化學蒸澱鋁層之橫截面圖； 8 本紙浪又度適用中國國家標準（CNS ) A4規格（210X297公釐） -------k丨裝------訂------線 (請先聞讀背面之注意事項再填寫本頁) 經濟部中央標準局貞工消费合作社印裝 A7 B7 五、發明説明（6) 第6圖是具有完全CVD鋁層形成於上面之第5圖的基 片之橫截面圖； 第7圖是依據本發明供順序金屬化之一種整體處理系 統；以及 第8圇是用以供應氣體至第7琴之系統的一種CVD氣 體箱傅送系統之分解流程圖。 ~'' 本發明提供用以得到具有改良反射率之高度定位結晶 構造的薄膜層之一種方法和裝置，其中之主要層是利用 CVD或PVD技術所形成》在本發明之一論點中，提供一 程序和裝置供選擇地澱積材料於小型，例如高縱橫比孔 口，以便選擇地形成例如互連之無空舸構造於孔口內而同 時也使用CVD技術在工作區上形成一髙度定位薄膜層》在 本發明之另一論點中，利用首先澱積一小量之自對齊材料 於基片奉面上且接著利用PVD或CVD技術澱積高度定位 薄膜層於其上而在一障礙層或襯墊層上形成一高度定位薄 膜。在該基片上進行的各種澱積步驟可包括能在一整合聚 集工具上進行的PVD和CVD程序之組合》 在本發明之圍包層_選擇性C V D應用中，一小量的自 對齊材料形成工作區之成核處，當曝露於CVD程序之化學 蒸氣時，它啓動在工作區上薄膜成長而同時從底部至上方 充塡在基片中所形成之任何孔口而不致於跨接孔口之開 口。裏好是，這是以至少略小於在孔口中之速率在工作區 上成長一薄膜層直至孔口被塡滿爲止，以避免在工作區上 所形成的連續薄膜層過早地跨接於孔口之開口。因此可得 9 本紙張尺度適用中國國家標丰（CMS ) Α4规格（210X297公釐） ----- --------ί —批衣—I (請先聞讀背面之注意事項再填寫本頁) .、11 線 經濟部中央標準局爲工消費合作社印製 A7 B7 五、發明説明（7 ) 到基片工作區下之成核密度，它便利具有<111>方位而有 較佳電子遷移性能之工作區上面髙度定位薄膜之成長並且 控制圍包層成長於工作區上之速率。爲提供具有高均勻性 和高反射率之一種上薄膜層，耐溶材料可被澱積在一共形 CVD層上且主要層是利用PVD或CVD技術形成於其上》 在需要利用CVD充塡孔口而不致有空涧形成之處，可將小 量的自對齊材料澱積在具有孔口穿過之材料上，且將一 CVD層澱積其上。 在圍包層一選擇性CVD應用中，在成核表面上成長的 薄膜形成高度定位結晶島，它們結合在一起並且成長而形 成一均勻薄膜餍。吾人相信，各成核處將便利導電層結晶 化成爲單一晶粒，並且將決定一薄膜成長於工作區上之速 率。自對齊成核層比一般呈現在一成核材料連續層.上提供 較多成核處，因此，較多的CVD薄膜層晶粒依序形成且導 電層之結晶構造的均勺性被提升。最好是，較多成核處提 供於工作區上，因而相對於工作區上之澱積率而言在孔口 內允許較高的澱積率，以致於孔口內之澱積率大於工作區 上形成薄皞之速率，直至基片之整個表面，或大致整個表 面被澱積在成核處上的材料所覆蓋爲止。澱積爲e薄層之 材料量決定薄膜在工作區上成長之速率且最好提供小於 100 ^厚度之散射原子層。應可了解，隨著成核處之間距 離的增加，在工作區或成核處澱積之其他表面上之總澱積 率將減小。相似地，如果密度增加，則將呈現太多成核 處，且成長於其中之薄膜餍可能成長太快而在孔口被充塡 10 本紙張又度適用中國國家標準（CNS ) Α4規格（210X297公釐） ----------參------1Τ------^ (請先聞讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作杜印製 A7 __B7 五、發明説明（？） 之前將它跨接。因此，對於一指定應用和孔口形狀而言， 需達成成核處數目，結晶方位和澱積率之間的平衡以便整 體澱稹率不受不利影響。 在工作區反射率改良之（PRIME)應用中，ε材料被 澱積在一障礙層或襯墊層，一般包括Ti，Ti Ν，或Ti和 TiN.之組合，並且有一金屬或導電層形成於其上。形成於 S層上之薄膜反射率被改良。該£層可以由單一材料所形 成，或是由選自鈦、氮化鈦、鋁、Nb、矽酸鋁，矽石、高 礬土、Si、Cu和Ta之材料的組合所形成。 參看第1圖，使用PRIME程序由PVD或CVD而提供 一種高均勻性和高反射率層之本發明的一種實施例被示 出。本發明人發現在澱積一導電膜之前澱積小量的自對齊 村料將可由於便利在該薄膜內之高度定位結晶構造.的成長 而改良該薄膜之反射率》第1圖揭示一例，其中PVD-Ti /CVD-TiN障礙層或襯墊層分別地形成於一成型基片 上，最好分別具有約400 i和約200 2之厚度。一薄自對齊 eTiN厝，晕好小於約50】，接著被使用PVD技術而澱積 在工作區上以便提供可隨後澱積Ti和熱A1層之一表面。 Ti和A1層分別被澱穣爲約400 S和5000 A之厚度。該薄 且自對齊ε TiN層最好是在富含氮之環境中利用濺射耐溶 材料目標以便提供TiN流體而澱積，其一部份將澱積在基 片上。澱稹在ε層上的熱A1層將比缺少本發明之ε餍而澱 積在Ti/CVD-TiN障礙層或襯墊層之熱ΑΙ層更具有改良 之反射率，如第2匾所示。A7 _______B7 V. Description of the Invention (丨) The present invention relates to a method and a device for manufacturing an integrated circuit on a semiconductor substrate. In particular, the present invention relates to the selective metallization of apertures formed on a substrate in the manufacture of integrated circuits between conductive layers containing apertures such as contacts or perforations for high aspect ratio sub-micron applications A method of forming a void-free connection, and forming a highly positioned cladding layer on the work area, and mounting a semi-micron multi-layer metallization is one of the main technologies for the next generation of very large scale integrated circuits (VLSI). The multilayer interconnection at the core of this technology requires planarizing the interconnect characteristics, including contacts, perforations, lines, or other features, that are formed in the high aspect ratio apertures. The reliable formation of these interconnect characteristics is very important for the success of VLSI and the subsequent efforts to improve the density and quality of circuits on individual substrates and molds. One way to increase the density of a circuit is to reduce the size of the metal conductors that make up the integrated circuit. When the size is reduced, the operating rate increases and the power density remains the same > but the current density increases proportionally with a decreasing factor. Metal conductors have an upper current density due to electron migration. Electron migration is a diffusion process in which a solid atom moves from one place to another under the influence of electricity. This effect limits the maximum current carried by a conductor without rapid destruction. For example, the current density of an aluminum hip for integrated circuits must be kept below 106 ohms. The migration of printed sub-consumer cooperatives of the Ministry of Electricity and Economics and Consumer Affairs Cooperatives does not limit the minimum device size, but limits the number of circuit functions performed by a given number of connected circuit elements per unit time. With enhanced resistance to electron migration. Therefore > As the shape of the integrated circuit is reduced, the demand for a highly-positioned film increases. Ideally, a film layer with a crystal orientation of < 11 1 > is formed on the substrate. The paper size can be changed. Applicable to China National Standard (CNS) A4 specification (210X297 mm). China National Standards Bureau, Ministry of Economic Affairs, Consumer Consumption Du printed A7 _ B7 V. Explanation of the invention (>) Electron migration properties of thin films on good small body circuits. The two common methods used for the deposition of thin films are chemical vapor deposition (CVD) and physical vapor deposition (PVD). CVD procedures generally include an enveloping procedure and a selection procedure. When a component of chemical vapor contacts the substrate, A deposition of a thin film layer occurs at one of the "nucleation sites" on the film. The component adheres to the nucleation site, resulting in a further deposited deposition surface. In a wrap-around CVD process, all surfaces are treated as nucleation surfaces, and Vapor will deposit a thin film on the entire exposed surface of the substrate, including the orifices and the sides and bottom surfaces of the work area. A selective procedure typically deposits the film only on selected nucleations on the substrate. Generally at the bottom of the orifice. The film deposited in a wrap-around CVD process, even with very small orifice shapes, is usually conformal and provides excellent step coverage, that is, on a substrate. There is a layer of uniform thickness on the sides and bottom of any orifice that is formed. Therefore, cladding CVD is a common method for filling pores. "However, there are two main difficulties with the cladding CVD process. First, the CVD film from one All sides of the orifice grow because the deposited layer grows upwards and outwards on the upper corners of the orifice and crosses over the surface of the orifice before the orifice is fully filled (ie, "bulge"), resulting in There is a cavity in the filling hole. Also, to ensure that one of the nucleation nucleates continuously on all surfaces of the substrate, that is, a continuous thin film layer, which is deposited on the wall of the hole to deposit CVD rhenium, Further reducing the width of the apertures, thereby increasing the difficulty of filling the voids without voids. Second, the films deposited using CVD will conform to the surface conditions read by these films. If the surface situation does not have a certain orientation or randomness, a crystal structure with a random orientation and a paper size larger than this paper will be used (CN'S) A4 size (210X297 mm) ---------- 丨 installation ---- --Order ----- 丨 line (please read the precautions on the back before filling out this page) Printed by the Consumers' Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs A7 B7 V. Description of the invention (?) Low reflectivity and bad electronics Migration properties of thin films. The decomposition of the CVD precursor gas of the film usually requires the fact that the electron source is from a conductive nucleation film. According to a conventional selective CVD process, the deposition should take place at the bottom of an aperture where a conductive film or Doped silicon from the bottom layer, but should not grow on the insulating working area or the wall of the insulating hole without nucleation. These conductive films and / or doped silicon exposed at the bottom of the hole are different from the dielectric surface and are supplied by pioneers The electrons required for the decomposition of the gas and the deposition of a thin film layer. The result obtained by selective deposition is that it can fill a very small size (< .25 # m), high aspect ratio (> 5: 1 ) The film in the hole of the perforation or contact grows “from bottom to top”. However, in the selective CVD process, unnecessary balls are formed on the working area with a defective surface. ”On the other hand, the PVD process can deposit High-resolution positioning films with improved reflectivity do not provide good aperture filling or layer coverage in high aspect ratio applications. The physical sputtering of the target material causes the particles to travel at an acute angle relative to the substrate surface. As a result, at the high aspect ratio orifice to be filled, the sputtered particles will tend to deposit on the upper wall and cover their openings before the orifice is completely filled with the deposited material. The resulting structure typically contains voids that affect the integrity of the device formed on the substrate. High aspect ratio orifices can be filled by depositing thin films at elevated temperatures using the PVD process. For example, aluminum can be deposited at 400 ° C or higher to enhance the flow of aluminum on the surface and throughout the orifice. It has been found that this thermal A1 process provides improved layer coverage. "However, films deposited using the thermal A1 process have poor reflectivity. • High reflectivity is an important feature of films because ___6 this paper is a standard in China National Standard (CNS) A4 specification (210X297 male -------- k-installed -----order 丨 _ ^ ----- line (谙 read the precautions on the back before filling in this page) A7 B7 Shellfish Consumer Cooperation of the Central Bureau of Standards of the Ministry of Economic Affairs Du Yinzhuang 5. Description of the Invention (if) It is an indication of highly positioned crystalline structure, which indicates better electron migration performance and various layers on the substrate during the manufacture of integrated circuits Molded wafers can have better line contours. Therefore, there is a need for a cavity-free gold filling process, especially for applications where the aspect ratio of the sub-quarter micron is reduced. Problems with the formation of ball gardens on the work area and providing uniform film growth on the work area when the orifices are filled. In particular, a process is required to achieve selectivity in high aspect ratio sub-quarter-micron orifices Deposition and reach height on the work area Positioning (i.e., < 111 >) the film while enclosing it, especially if the process is to form a highly oriented film at a controlled rate. It is also necessary to provide PVD or CVD technology for obstacles or linings. The enhanced reflectivity of the metal film deposited on the underlayer. It is therefore necessary to find a single procedure that can eliminate pellet formation and improve selectivity in one application, and provide thin films with improved reflectance in another application. The invention provides a method for depositing a small amount of self-aligning material on a substrate and preventing the formation of pellets on the work area or enhancing the reflectivity of a posterior film when a high aspect ratio aperture is selectively filled on the substrate. A method and device. Preferably, the small amount of self-aligned material is selected from the group consisting of titanium, titanium nitride, aluminum, Nb, aluminum silicate, silica 'high alumina', Si, Cu, Ta or a combination thereof and From about several scattering atoms to as thin as about 100 μm are deposited. In one aspect of the present invention, there is provided the use of selectively forming a thin film layer in an aperture and over a working area of a substrate. Deposit a cladding layer to prevent A method and device for forming pellets on a dielectric surface. The procedure includes first depositing a small amount of self-aligned material and forming one of the growing films into a basic paper size using the Chinese National Standard (CNS) A4 specification (210X297 (Mm) Packing ------ order ------ line (Please read the notes on the back before filling this page) Printed by A7 B7, member of the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 5. Description of the invention (5) A plurality of self-aligned nucleation sites are formed on the working area of the wafer, and then a conductive thin film layer is deposited thereon. Preferably, the self-aligned nucleation sites are formed by depositing an ultra-thin film nucleation layer so as to form The density of the core can control the growth rate of the film on the working area so that the opening of the orifice will not be bridged before the orifice is completely filled. In another aspect of the present invention, a small amount of self-aligned material is first deposited on a barrier or a pad and then a PVD or CVD process is used to deposit the desired high reflectance film on it to provide improvements. A method and apparatus for the reflectivity of a thin film layer formed on a barrier layer or a cushion layer. The above features, advantages and objects of the present invention can be more clearly understood from the description of the preferred embodiments of the present invention with reference to the accompanying drawings. However, it should be noted that the embodiments shown in the drawings are only typical embodiments of the present invention and therefore It is not intended to limit the scope of the invention, as the invention is applicable to other equivalent embodiments. FIG. 1 is a cross-sectional view showing a substrate on which various layers are deposited on a substrate according to an argument of the present invention; FIG. 2 is a view showing layers formed using different procedures, including one formed according to an argument of the present invention A comparison chart of the reflectance; Figure 3 is a cross-sectional view of a substrate formed with a working area and a high aspect ratio aperture formed in a dielectric layer; Figure 4 is formed on the substrate of Figure 3 Cross-sectional view of a physical monolayer of a nucleation material; Figure 5 is a cross-section of a cladding layer deposited on the substrate working area of Figure 4 and a chemically vapor-deposited aluminum layer selectively deposited in the orifice; Sectional view; 8 This paper wave is again applicable to China National Standard (CNS) A4 specification (210X297 mm) ------- k 丨 installation ------ order ------ line (please read first (Please read the notes on the back and fill in this page again.) A7 B7 printed by Zhengong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (6) Figure 6 is a substrate with a complete CVD aluminum layer formed on Figure 5 above. A cross-sectional view; FIG. 7 is an integrated processing system for sequential metallization according to the present invention; and FIG. 8 is a gas supply One kind of CVD systems flowchart decomposition gas tank system 7 of the piano Fu feed. ~ `` The present invention provides a method and apparatus for obtaining a thin film layer with a highly oriented crystalline structure with improved reflectivity, wherein the main layer is formed using CVD or PVD technology '' In one aspect of the present invention, a Procedures and devices for selectively depositing materials in small, such as high-aspect-ratio apertures, to selectively form void-free structures such as interconnects in the apertures, while also using CVD techniques to form a full-scale orientation on the work area "Thin Film Layer" In another aspect of the present invention, a barrier layer is deposited by first depositing a small amount of self-aligned material on the substrate surface and then depositing a highly positioned thin film layer thereon using PVD or CVD techniques. Or, a highly positioning film is formed on the cushion layer. Various deposition steps performed on the substrate may include a combination of PVD and CVD procedures that can be performed on an integrated aggregation tool. "In the cladding_selective CVD application of the present invention, a small amount of self-aligned material is formed. In the nucleation area of the work area, when exposed to the chemical vapor of the CVD process, it starts the film growth on the work area and simultaneously fills any openings formed in the substrate from the bottom to the top without bridging the openings. Opening. Fortunately, this is to grow a thin film layer on the working area at a rate that is at least slightly less than in the opening until the opening is full, so as to avoid the continuous thin film layer formed on the working area from crossing the hole prematurely. Mouth opening. Therefore, 9 paper sizes can be obtained, which are applicable to China National Standards (CMS) Α4 specifications (210X297 mm) ----- -------- ί — batch clothing — I (Please read the precautions on the back first (Fill in this page again). The Central Bureau of Standards of the 11th Ministry of Economic Affairs printed A7 B7 for the Industrial and Consumer Cooperatives. 5. Description of the invention (7) The nucleation density under the working area of the substrate. It is convenient to have the orientation of < 111 > For better electron migration performance, the growth film is positioned on top of the work area and the rate at which the cladding layer grows on the work area is controlled. In order to provide an upper thin film layer with high uniformity and high reflectivity, a solvent-resistant material can be deposited on a conformal CVD layer and the main layer is formed thereon using PVD or CVD technology. Without the formation of voids, a small amount of self-aligned material can be deposited on the material with the aperture passing through, and a CVD layer can be deposited thereon. In cladding-selective CVD applications, thin films grown on nucleated surfaces form highly localized crystalline islands, which combine and grow to form a uniform thin film. I believe that each nucleation site will facilitate the crystallization of the conductive layer into a single grain, and will determine the rate at which a thin film will grow on the work area. The self-aligned nucleation layer generally provides more nucleation sites than a continuous layer of nucleation material. Therefore, more CVD thin film layer grains are sequentially formed and the uniformity of the crystal structure of the conductive layer is improved. Preferably, more nucleation sites are provided on the work area, so a higher deposition rate is allowed in the orifice than the deposition rate on the work area, so that the deposition rate in the orifice is greater than the work The rate of thin ridge formation on the area is until the entire surface of the substrate, or substantially the entire surface, is covered by the material deposited on the nucleation site. The amount of material deposited as an e-thin layer determines the rate at which the film grows on the working area and it is preferred to provide a scattering atomic layer with a thickness of less than 100 ^. It should be understood that as the distance between the nucleation sites increases, the total deposition rate on the work area or other surfaces deposited at the nucleation sites decreases. Similarly, if the density is increased, there will be too many nucleation sites, and the film growing in them may grow too fast and be filled in the orifice. 10 This paper is again applicable to the Chinese National Standard (CNS) A4 specification (210X297). (Mm) ---------- Refer to ----- 1T ------ ^ (Please read the notes on the back before filling out this page) Employees' cooperation with the Central Bureau of Standards of the Ministry of Economic Affairs Du printed A7 __B7 Fifth, the invention description (?) Bridge it before. Therefore, for a given application and orifice shape, it is necessary to achieve a balance between the number of nucleation sites, crystal orientation, and deposition rate so that the overall deposition rate is not adversely affected. In PRIME applications, the epsilon material is deposited on a barrier or backing layer, typically consisting of Ti, Ti Ν, or a combination of Ti and TiN. A metal or conductive layer is formed on On it. The reflectivity of the thin film formed on the S layer is improved. The £ layer may be formed of a single material or a combination of materials selected from the group consisting of titanium, titanium nitride, aluminum, Nb, aluminum silicate, silica, high alumina, Si, Cu, and Ta. Referring to Fig. 1, an embodiment of the present invention is shown in which a high uniformity and high reflectance layer is provided by PVD or CVD using the PRIME program. The inventors have discovered that depositing a small amount of self-aligned material before depositing a conductive film will improve the reflectivity of the film due to the growth of a highly-oriented crystal structure within the film. "Figure 1 shows an example." The PVD-Ti / CVD-TiN barrier layer or liner layer is separately formed on a molding substrate, and preferably has a thickness of about 400 i and about 200 2 respectively. A thin self-aligned eTiN 厝 with a halo of less than about 50] is then deposited on the work area using PVD technology to provide a surface on which one of the Ti and thermal A1 layers can be subsequently deposited. Ti and Al layers are deposited to a thickness of about 400 S and 5000 A, respectively. The thin, self-aligned ε TiN layer is preferably deposited using a sputtering refractory material target in a nitrogen-rich environment to provide a TiN fluid, a portion of which will be deposited on a substrate. The thermal A1 layer deposited on the epsilon layer will have an improved reflectance than the thermal A1 layer deposited on the Ti / CVD-TiN barrier or liner layer without the epsilon of the present invention, as shown in the second plaque .
II 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） --------—^------.玎------0 (請先聞讀背面之注意Ϋ項再填寫本頁) 經濟部中央橾準局貞工消費合作社印裝 A7 ______B7 五、發明説明（7 ) 已被發現，一種薄且自對齊ε餍的澱積可增強結晶方 位並且提供一種大結晶構造之所得薄膜。除了單—的Ti/ TiN成核靥之外，本發明人進一步發現Ti/TiN，Ti/ A1餍，TiN/Al層之組合或其任何組合均可當做ε層被 澱積在基片上以提升在澱積膜上大結晶之形成和<111>結 晶方位。改良所形成薄膜之結晶構造可增強薄膜內之電氣 特性且減少應力》本發明人相信，利用依序澱積PVD Α1 之e層於£Ti或TiN層上以致TiN或Ti層無法與室內之其 他反應物，例如碳，化學結合 > 可改良方位。 第2圖比較在1)PVD TiN障礙餍，2)CVD TiN障 礙層，以及3)具有依|據本發明之ε薄膜的CVD TiN障礙 層上面所形成熱A1之反射率》第2圖示出澱積在薄自對齊 ε層之熱A1之反射率比沒有ε層之Ti/CVD-TiN層上薄 膜之反射率增加百分之三十（3 0%)。薄膜之反射率是以矽 基礎在436^ m下量得。具有ε層之反射率相似於澱積在 PVD-TiN障礙層上的Α1層包含有在高縱橫比穿孔內的空 洞。 在圍包層一選擇以及PRIME應用中，薄自對齊ε膜 可包含一單一原子層或單一材料之單暦，或者它可包含依 序澱積之多個原子層或多種材料之多個單層。最好是該材 料被分散，最好在大幅度上均勻地，於基片表面上以增強 其上之薄膜形成。 自對齊成核材料一般是能提供電子至一導電母核（例 如一CVD金靥）之一種導電材料，例如一種金靥，以便利 _________12 本紙張尺度逋用中國國家標準（CNS ) Μ規格（210X297公釐） I-------卩—^-------ΐτ------'線 (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局貝工消費合作杜印製 A7 B7 五、發明説明（/17 ) 其反應以及一澱積導電薄膜層之結晶化。較佳成核層是由 例如鈦（Ti) *鋁（A1)，氮化鈦（TiN)，銅（Cu)和矽（Si) 之傳導材料所組成。 在本發明之另一論點中，所提供的方法包括一第一步 驟，利用物理蒸澱一傳導材料之超薄自對齊層於一淸除過 的基片上以便做爲具有含一導電板於其中之孔口的工作區 上的成核層。最好是 > 該自對齊成核層含有大致均勻分散 在工作區上面的成核材料各別原子，或者含有在成核CVD 澱積時比曝露於孔口底部之材料更低親和力的均勻薄膜 層。形成於基片上之小孔口形狀一般排除成核材料澱積在 孔口壁面上，而且，使用視準儀阻止粒子在傾斜於基片表 面之軌跡上行進可減少在孔口壁面上之瀑積》吾人相信， 超薄成核層提供後纘澱積材料形成高度方位結晶構造之自 對齊成核處。當澱稹在成核層時，導電層到達其最低能量 狀態，因此形成高度方位結晶構造。 在程序之第二步驟中，利用tVD或PVD程序使一導 電膜被澱積在構造上以便在孔口之導電板上提供金屬之選 擇性成長而在工作區上同時有高度定位膜之均勻成長。在 孔口內之澱積率最好高於工作區上澱積率以便孔口被充塡 時或其稍後在工作區上澱積的薄膜完全地覆蓋表面。因 此，本發明提供以減少之處理步驟對於小型孔口之無空洞 充塡而在工作區上形成一高度定位膜之方法和裝置β 參看第3圖，所示的成層構造30之橫截面圖包含在一 導電餍36上面形成的成型層32。導電層36可以是摻雜矽 13 本紙張尺度適用中國國家標準（CNS 規格（公釐） --------Κ —裝------訂-----—線 (請先閲讀背面之注意事項再填寫本頁) A7 _B7__ 五、發明説明（// ) 基片或是在一基片上形成的第一或隨後的導電層》導電層 36—般被預先成型以便形成一電子元件之部份。成型層32 依據習知的CVD或PVD程序被形成於導電層36上面而形 成整個積體電路之部份。 成型層32被成型且蝕刻而打開用以形成往下至導電或 半導體層36之穿孔或接點的孔口 38 a孔口 38之成型和蝕 刻可利用在本技術中所習知之任何習見方法而達成。孔口 3 8具有在成型層32中形成的壁面40，它向下延伸一充分 距離而曝露導電層36之表面或板面42 » 參看第4圖，它示出利用PVD在成型層3 2上面所形成 的成核材料之超薄成核層34之橫截面圖。成核層使得後續 澱積的導電層開始在基片上形成包括原子、離子或分子之 明確配置的固態結晶狀態。 經濟部中央樣準局員Η消費合作社印製 (請先閲讀背面之注意事項再填寫本頁) 較佳自對齊成核層34包含例如物理蒸澱所形成之Ti 層（PVD Ti)，例如金屬（A1)或其他耐溶物（Nb、Ta、 矽酸鋁、矽土、高礬土等）之導電層，PVD所形成之 TiN(PVD TiN)，或上述各餍之組合。鈦是較佳之成核 材料，因爲鈦提供良好之鋁之成核，對鋁具有良好之比重 性質，具有約1675 Ϊ的熔解溫度，且可利用PVD或CVD 程序澱積。超薄成核層最好是由物理蒸澱所澱積的原子次 單層所組成，而可約爲50^。例如，可利用在20-200瓦 下濺射一種12吋Ti目標物至距離目標物約2吋的6吋基片 而形成一超薄成核層》最好是，該目標物被濺射約7 2以s 以提供本發明人所深信之一種自對齊的Ti原子次單層。在 14 本紙張尺度適用中國國家橾準（CNS ) Α4規格（210 X 297公釐） 經濟部中央標準局員工消费合作杜印製 A7 ____B7 五、發明説明（θ ) 本發明之另一論點中，Ti或TiN可形成第一超薄層且A1可 形成第二超薄層以進一步增強所得薄膜之結晶尺寸和方 位。 自對齊成核層34是由大致均勻散射在成型層32之工 作區的原子粒子所組成，它可促成在CVD程序中後續澱積 導電層，例如A1，之成核澱積並且在澱積一導電層於超薄 自對齊層之CVD和PVD應用中對齊導電層之結晶。以此 方式，成核層34之存在提供在工作區上對於一導《層之高 度定位且均勻成長的成核處。如果在成型層32之工作區33 上面存有缺陷，則在該等缺陷上（其先前形成不需之球團） 之金靥澱積率將不會大於在成核處之均勻成長率，且無視 於在成型層32之缺陷而有均句，高度定位導電層被長成。 所以，此程序不需在孔口之選擇澱積之後磨光成型層32之 表面以移除可能在工作區上形成之任何球國。 參看第5圖，它示出在工作區33上面圍包澱積金屬層 46和在孔口 38中選擇地澱稹以形成無空洞金龎互連44的 化學蒸澱鋁層之橫截面圖》在構造30上面化學蒸澱金屬同 時提供孔口 38的導板42上面之選擇澱稹以及成核層34上 面之围包澱積以便供應構造30之共形覆蓋而不致於在互連 處形成空洞或在工作區形成球團。 參看第6圖，它示出經由CVD而具有一鋁層形成於其 上面之基片的橫截面圖。本發明之一較佳實施例將參看一 PVD Ti自對齊成核層以及形成於其上面之高度定位CVD A1層而加以說明。但是，應可了解，可依本發明而利用 15 本纸張尺度適用中國國家揉準（CNS ) A4規格（210X297公釐） I-------裝------訂——，一-?丨一^線 (請先聞讀背面之注意事項再填寫本頁) 經濟部中央標準局貝工消費合作社印装 Α7 Β7 五、發明説明（i?) PVD(例如 PVD A1 或 Cu)或 CVD(例如 CVD A1 或 Cu) 而澱積任何高度定位導電層。在自對齊成核層34上面之 CVD A1的均勻澱積提供大致平面化的CVD A1頂表面 48。雖然可在各種狀況下澱積CVD A1，典型程序之晶圓 溫度是在約180 °C和265 °C之間且澱積率是在約2〇i /秒 〇 至1304 /秒之間》CVD A1程序可在約1 torr和80 torr之間的室壓下進行，較佳室壓爲25 torr"CVD A1 之較佳澱積反應包括依據下式之雙甲基鋁氫化物和氫氣 (H:)之反應： (CHj)?A1-H + H2^AI + CH4 + H2 因爲下方導電或半導體層36之表面42曝露於孔口 38 之底板42的CVD A1，所以在孔口 38內形成金屬互連44 之材料澱積可有選擇性。因此，CVD A1從底板4 2.向上澱 裱以充塡孔口 38而不致有CVD A1澱積在孔口壁面40上 面。 進一步地，在成核層34以視準儀置於目標和基片之間 而被澱積之處，孔口 38之壁面40不會或接收少量成核材 料，因而孔口之底板42由一導電或半導體成核層36所形 成•如上所述，不導電之介電材料並非良好之電子施給 者，因此，並不提供CVD導電母核之分解的良好成核處》 . 反之，因爲在孔口 38下方之露出導電組件36使分解成核， 所以一金属膜開始形成孔口底板42。在一金靥初始層澱積 在孔口底板42上面之後，後續的澱積更容易發生’以致金 靥從穿孔或接觸底板42向外成長而充塡孔口 38。 16 本紙浪尺度適用中國國家標準（CNS ) Α4規格（210X297公釐） I-------Η丨裝------訂---卜__.線 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 A7 —__________B7 五、發明説明（丨f) 雖然在孔口 38之介電壁面40上面的缺隍可能導致在 穿孔或接觸點內散佈球團之形成，這些球團通常不會阻塞 穿孔或接觸點而在其中引起空洞。因爲導電孔口底板一般 曝露比缺陷更大表面區域的成核材料，即使在具有5:1縱 橫比之孔口內，在一球團有機會成長越過孔口且形成一空 洞之前，穿孔或接觸點將從底板向上被充塡金靥》 在本發明之另一論點中，基片可在選擇性CVD程序之 後被移至一PVD A1室以便在低於CVD A1和PVD A1之 溶點溫度下在先前形成之CVD層上澱積一 PVD A1層 50 »其中CVD金靥層46是鋁，最好是PVD A1層50在低 於約600 °C，最好低於約400 °C，的晶圓溫度下被澱積。 當在約400 °C之PVD澱積程序中，鋁層46將開始流動而鈦 成核層34如同一種固態金屬層而堅定地維持在定位因爲 鈦與鋁有良好之溼性，即使在約400 °C時CVD A1並不會 從鈦表面外向溼潤，因此，並不需如先前技術之CVD程序 —般有高於鋁溶點（>660 °C)之晶圓溫度。結果，薄鈦層 之應用使得可在遠低於鋁溶點之溫度下得到鋁之平面化， 同時使高度定位A1層產生而不需有CVD或PVD之空洞形 成程序限制》 最好是PVD A】層包含至少一些銅（Cu)。這可利用 A 1 C VI目標物形成P V D A 1 C u層而達成。當P V D A 1 C u在 具有相同聚集工具上之PVD和CVD室之整合程序中緊接 著CVD A1時，一氧化層無法形成於其間且PVD AlCu層 50在CVD A 1層4 6上面外延地成長而不致有顆粒邊界， 17 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） --------Π_|裝-------訂--1L———線 (請先閲讀背面之注意事項再填寫本頁) 經濟部中央揉準局員工消費合作社印装 A7 __ B7_ 五、發明説明（Κ ) 亦即，在二層都有均勺結晶構造。而且，順序的CVD A1 /PVD AlCu程序使得混合層（元件46和50組合）在約 30p°C下被淬火約15分而得到在CVD/PVD層中Cu之均 勻分佈。最好是混合CVD/PVD A1層之頂表面52接受 一種PVD TiN抗反射塗餍（ARC)(未示出）以減少表面之 反射率並且改進該層之光學石版印刷性能。 本發明供一基片孔口之金属化的較佳方法包括的順序 步驟爲，以一介電層32覆蓋一導霉組件36，蝕刻穿孔或接 點38以曝露導電組件36之一部份，經由一凝聚Ti程序而 在工作區上澱積鈦之自對齊超薄成核層34，澱稹選擇性/ 圍包（：¥〇八1層44，46，澱積？¥〇八1(：11層50且澱積 T i R抗反射塗層。 參看第7圖，它示出具有可進行上述程序之PVD和 CVD室的一種合聚集工具60之分解圖》—般而言，基片 是經由一組卡式裝載閘62而被引入或退出聚集工具6 0。具 有葉片67之機械手64位於聚集工具60內以便將基片移經 聚集工具60。機械手64 —般位於緩衝室68內以便傳送基 片於卡式裝載閘62，抽氣晶圓定位室70、預淸室72、 PVD TiN ARC室74以及冷卻室76之間。第二組機械 手78位於傳送室80內以便將基片傳送進出於冷卻室76、 凝聚 Ti 室 82、CVD TiN 室 84、CVD A1 室 86 和 PVD AlCu處理室88 «在整合系統中的傳送室80最好是維持在 10〃至lO^torr範圍內之低壓或高度眞空》在第6圖中容 室之特定組態包括能在一單一聚集工具中進行CVD和 18 本纸張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） --------丨裝------訂丨__iL_ — —線 (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局負工消费合作社印製 A7 B7 五、發明説明（A) PVD程序之一種整合處理系統》此種特定容室組態或配置 只是做爲示範且本發明可有更多的PVD和CVD程序組 態。一般而言，在聚集工具60中處理的基片從卡式裝載閘 62傳至緩衝室68，在該處機械手64先將基片移入抽氣室 7〇。基片接著被傳至預猜室72，PVD TiN ARC室 74，且進入冷卻室76之前將基片移入一個或多個處理室且 移動於其間》可預期到基片可在一個或多個處理室內以任 何順序被處理或冷卻任何次數以便在基片上製造所霱構 造。在處理之後，基片從聚集工具60被移經緩衝室68且回 至裝載閘62。有一組微處理機控制器80控制在基片上所需 薄膜層之形成和順序。 依據本發明，聚集工具60將一基片傳經裝載閘62而 進入抽氣室70，其中基片受到出氣之污染。基片接.著被移 入預淸室72，在該處使基片表面被淸洗而移去其上之任何 污染。基片選擇地在CVD — TiN室75內被處理以便在介 電層上澱稹一障礙層。機械手78接著將基片傳至凝聚Ti室II This paper size is applicable to China National Standard (CNS) A4 (210X297mm) ------------ ^ ------. 玎 ------ 0 (Please read the (Please note this item and fill in this page again.) Printed on the A7 ______B7 of the Central Labor Department of the Ministry of Economic Affairs. 5. Description of the Invention (7) It has been found that a thin and self-aligned ε 餍 deposition can enhance the orientation of the crystal and provide a The resulting thin film with a large crystal structure. In addition to the mono-Ti / TiN nucleation plutonium, the inventors have further discovered that a combination of Ti / TiN, Ti / A1 plutonium, TiN / Al layers, or any combination thereof can be deposited on the substrate as an ε layer to enhance Formation of large crystals on < 111 > crystal orientation on the deposited film. Improving the crystalline structure of the formed film can enhance the electrical characteristics and reduce the stress in the film. "The inventor believes that the e-layer of PVD A1 is deposited on the £ Ti or TiN layer in order so that the TiN or Ti layer cannot be connected to other indoors. Reactants, such as carbon, chemically bind > can improve orientation. Figure 2 compares the reflectivity of heat A1 formed on 1) PVD TiN barrier 餍, 2) CVD TiN barrier layer, and 3) CVD TiN barrier layer with an ε film according to the invention " The reflectivity of the heat A1 deposited on the thin self-aligned epsilon layer is 30% (30%) higher than that of the thin film on the Ti / CVD-TiN layer without the epsilon layer. The reflectance of the film is measured on a silicon basis at 436 ^ m. The reflectivity with the ε layer is similar to that of the A1 layer deposited on the PVD-TiN barrier layer, which contains voids in the high aspect ratio perforations. In the choice of cladding layer and PRIME application, the thin self-aligned epsilon film may include a single atomic layer or a single layer of a single material, or it may include multiple atomic layers or multiple single layers of multiple materials deposited sequentially . It is preferred that the material be dispersed, and preferably uniformly, to a large extent, on the surface of the substrate to enhance film formation thereon. Self-aligned nucleation material is generally a conductive material that can provide electrons to a conductive mother nucleus (such as a CVD Au) to facilitate _________12 This paper uses China National Standard (CNS) M specifications ( 210X297 mm) I ------- 卩 — ^ ------- ΐτ ------ 'line (Please read the notes on the back before filling this page) Central Bureau of Standards, Ministry of Economic Affairs Industrial and consumer cooperation Du printed A7 B7 V. Description of the invention (/ 17) The reaction and crystallization of a deposited conductive film layer. A preferred nucleation layer is composed of a conductive material such as titanium (Ti) * aluminum (A1), titanium nitride (TiN), copper (Cu), and silicon (Si). In another aspect of the present invention, the provided method includes a first step of physically depositing an ultra-thin self-aligned layer of a conductive material on a stripped substrate to have a conductive plate therein. The nucleation layer on the working area of the orifice. It is preferred that the self-aligned nucleation layer contains individual atoms of the nucleation material that are approximately uniformly dispersed above the work area, or a uniform film that has a lower affinity during nucleation CVD deposition than the material exposed at the bottom of the orifice Floor. The shape of the small aperture formed on the substrate generally excludes the deposition of nucleating materials on the aperture wall. Moreover, using a collimator to prevent particles from advancing on the trajectory inclined to the substrate surface can reduce the waterfall on the aperture wall surface. 》 I believe that the ultra-thin nucleation layer provides the self-aligned nucleation site of the post-thorium deposited material to form a highly oriented crystalline structure. When the plutonium is in the nucleation layer, the conductive layer reaches its lowest energy state, thus forming a highly oriented crystalline structure. In the second step of the procedure, a tVD or PVD program is used to deposit a conductive film on the structure so as to provide selective growth of the metal on the conductive plate of the orifice and to have uniform growth of the highly positioned film on the working area at the same time. . The deposition rate in the orifice is preferably higher than the deposition rate in the work area so that the film is completely covered on the surface when the orifice is filled or later deposited on the work area. Therefore, the present invention provides a method and apparatus for forming a highly positioned film on a work area by reducing the number of processing steps for void-free filling of small orifices. Referring to FIG. 3, a cross-sectional view of the layered structure 30 includes A molding layer 32 is formed on a conductive pad 36. The conductive layer 36 may be doped silicon 13. The paper size is applicable to the Chinese national standard (CNS specification (mm) -------- Κ — 装 ------ Order ------- line (please Read the precautions on the back before filling this page) A7 _B7__ V. Description of the invention (//) The substrate or the first or subsequent conductive layer formed on a substrate "The conductive layer 36 is generally pre-formed to form a The part of the electronic component. The molding layer 32 is formed on the conductive layer 36 according to the conventional CVD or PVD procedure to form a part of the entire integrated circuit. The molding layer 32 is molded and etched to open to form a down to conductive layer. Or the hole 38 a of the perforation or contact of the semiconductor layer 36 a. The formation and etching of the hole 38 can be achieved by any conventional method known in the art. The hole 38 has a wall surface 40 formed in the molding layer 32 It extends down a sufficient distance to expose the surface or plate surface 42 of the conductive layer 36 »Referring to Fig. 4, it shows the ultra-thin nucleation layer 34 of the nucleation material formed on the molding layer 32 by PVD. Cross-sectional view. The nucleation layer allows subsequent deposition of conductive layers to begin to form on the substrate, including the original A solid state crystalline state with a clear configuration of electrons, ions or molecules. Printed by a member of the Central Bureau of Standards of the Ministry of Economic Affairs and a consumer cooperative (please read the precautions on the back before filling out this page). Preferred self-aligned nucleation layer 34 includes, for example, physical evaporation The Ti layer (PVD Ti) formed, for example, the conductive layer of metal (A1) or other refractory substances (Nb, Ta, aluminum silicate, silica, high alumina, etc.), TiN (PVD TiN) formed by PVD, Or a combination of the above rhenium. Titanium is the preferred nucleation material, because titanium provides good nucleation of aluminum, has good specific gravity properties for aluminum, has a melting temperature of about 1675 Ϊ, and can be deposited using PVD or CVD procedures The ultra-thin nucleation layer is preferably composed of atomic sub-monolayers deposited by physical evaporation, and may be about 50 ^. For example, a 12-inch Ti target can be sputtered at 20-200 watts to A 6-inch substrate formed about 2 inches from the target to form an ultra-thin nucleation layer. Preferably, the target is sputtered for about 72 to s to provide a self-aligned Ti atom that the inventors believe. Single layer. Applicable to China National Standards (CNS) Α4 specifications (210 X 29) on 14 paper sizes 7mm) Consumption cooperation by employees of the Central Bureau of Standards, Ministry of Economic Affairs, printed A7 ____B7 V. Description of the Invention (θ) In another aspect of the present invention, Ti or TiN can form the first ultra-thin layer and A1 can form the second ultra-thin layer Layer to further enhance the crystal size and orientation of the resulting film. The self-aligned nucleation layer 34 is composed of atomic particles that are scattered approximately uniformly in the working area of the forming layer 32, which can facilitate subsequent deposition of a conductive layer during a CVD process, such as A1, nucleation deposition and aligning the crystals of the conductive layer in CVD and PVD applications where a conductive layer is deposited on an ultra-thin self-aligned layer. In this way, the presence of the nucleation layer 34 provides a nucleation site that is positioned on the work area for the height of a guide layer and grows uniformly. If there are defects on the working area 33 of the forming layer 32, the rate of gold deposits on these defects (which previously formed unwanted pellets) will not be greater than the uniform growth rate at the nucleation site, and Irrespective of the defects in the molding layer 32, there is a uniform sentence, and the highly-positioned conductive layer is grown. Therefore, this procedure does not require polishing the surface of the forming layer 32 after selective deposition of the orifices to remove any balls that may form on the work area. Referring to FIG. 5, it shows a cross-sectional view of a chemically vapor-deposited aluminum layer with a metal layer 46 deposited on top of the work area 33 and a rhenium layer selectively deposited in the aperture 38 to form a void-free gold-alloy interconnection 44. Chemically vaporize the metal on the structure 30 while providing selective deposition on the guide plate 42 that provides the openings 38 and the encapsulation on the nucleation layer 34 to provide conformal coverage of the structure 30 without forming voids at the interconnects Or form a pellet in the work area. Referring to Fig. 6, there is shown a cross-sectional view of a substrate having an aluminum layer formed thereon via CVD. A preferred embodiment of the present invention will be described with reference to a PVD Ti self-aligned nucleation layer and a highly positioned CVD A1 layer formed thereon. However, it should be understood that according to the present invention, 15 paper sizes can be used in accordance with the Chinese National Standard (CNS) A4 specification (210X297 mm). ， 一-? 丨 一 ^ line (please read the precautions on the back before filling in this page) Printed by Shellfish Consumer Cooperative, Central Standards Bureau of the Ministry of Economic Affairs A7 Β7 V. Invention Description (i?) PVD (eg PVD A1 or Cu ) Or CVD (such as CVD A1 or Cu) to deposit any highly positioned conductive layer. The uniform deposition of CVD A1 over the self-aligned nucleation layer 34 provides a substantially planar top surface 48 of the CVD A1. Although CVD A1 can be deposited under various conditions, the wafer temperature for a typical process is between about 180 ° C and 265 ° C and the deposition rate is between about 20i / s and 1304 / s. The A1 procedure can be performed at a chamber pressure between about 1 torr and 80 torr, with a preferred chamber pressure of 25 torr " CVD A1. A preferred deposition reaction includes bismethylaluminum hydride and hydrogen (H: ) Response: (CHj)? A1-H + H2 ^ AI + CH4 + H2 Because the surface 42 of the conductive or semiconductor layer 36 below is exposed to the CVD A1 of the bottom plate 42 of the aperture 38, a metal interaction is formed in the aperture 38 The deposition of materials can be selective. Therefore, CVD A1 is deposited from the bottom plate 42 to fill the opening 38 without CVD A1 being deposited on the wall surface 40 of the opening. Further, where the nucleation layer 34 is deposited with a collimator between the target and the substrate, the wall surface 40 of the aperture 38 will not or receive a small amount of nucleation material, so the bottom plate 42 of the aperture is formed by a Formed by a conductive or semiconductor nucleation layer 36 As mentioned above, non-conductive dielectric materials are not good electron donors, and therefore do not provide good nucleation sites for the decomposition of CVD conductive cores. Conversely, because The conductive component 36 exposed below the aperture 38 is decomposed into nuclei, so a metal film starts to form the aperture floor 42. After an initial layer of gold tin is deposited on the orifice bottom plate 42, subsequent deposition is more likely to occur ', so that the gold tin grows out of the perforation or contacting the base plate 42 to fill the orifice 38. 16 The size of the paper wave is applicable to the Chinese National Standard (CNS) Α4 specification (210X297 mm) I ------- Η 丨 installation ------ order --- bu __. Note: Please fill in this page again.) Printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. A7 —__________ B7 V. Description of the invention (丨 f) Although the lack of the dielectric wall 40 on the opening 38 may cause perforations or contact points Scatters the formation of pellets that usually do not block the perforations or contact points and cause voids in them. Because the base of conductive apertures generally exposes nucleating materials with a larger surface area than the defect, even in apertures with an aspect ratio of 5: 1, a pellet has the opportunity to grow past the aperture and form a hole before perforating or contacting The point will be filled with gold from the bottom plate. "In another aspect of the present invention, the substrate may be moved to a PVD A1 chamber after the selective CVD process so that the temperature is below the melting point of CVD A1 and PVD A1. A PVD A1 layer 50 is deposited on the previously formed CVD layer »Where the CVD Au layer 46 is aluminum, preferably the PVD A1 layer 50 is below about 600 ° C, preferably below about 400 ° C. Deposited at temperature. During the PVD deposition process at about 400 ° C, the aluminum layer 46 will begin to flow and the titanium nucleation layer 34 will remain firmly in place as a solid metal layer. Because titanium and aluminum have good wettability, even at about 400 CVD A1 does not wet outward from the titanium surface at ° C. Therefore, it is not necessary to have a wafer temperature higher than the aluminum melting point (> 660 ° C) as in the previous CVD process. As a result, the application of a thin titanium layer makes it possible to obtain the planarization of aluminum at a temperature far below the melting point of aluminum, and at the same time, the highly positioned A1 layer can be generated without the need for CVD or PVD void formation procedures. The layer contains at least some copper (Cu). This can be achieved by using the A 1 C VI target to form a P V D A 1 Cu layer. When PVDA 1 Cu is followed by CVD A1 in the integration process of PVD and CVD chambers with the same focusing tool, an oxide layer cannot be formed therebetween and PVD AlCu layer 50 grows epitaxially on CVD A 1 layer 4 6 There is no grain boundary, 17 paper sizes are applicable to China National Standard (CNS) A4 specifications (210X297 mm) -------- Π_ | installation ------- order--1L ——- line ( Please read the notes on the back before filling out this page) A7 __ B7_ Printed by the Consumer Cooperatives of the Central Bureau of the Ministry of Economic Affairs. 5. Description of the Invention (K) That is, there is a uniform crystal structure on the second floor. Furthermore, the sequential CVD A1 / PVD AlCu procedure allows the mixed layer (combination of elements 46 and 50) to be quenched at approximately 30 p ° C for approximately 15 minutes to obtain a uniform distribution of Cu in the CVD / PVD layer. Preferably, the top surface 52 of the hybrid CVD / PVD A1 layer is subjected to a PVD TiN anti-reflective coating (ARC) (not shown) to reduce the reflectivity of the surface and improve the optical lithographic performance of the layer. The preferred method for metallizing a substrate aperture of the present invention includes the sequential steps of covering a mold-inducing component 36 with a dielectric layer 32, etching a perforation or contact 38 to expose a portion of the conductive component 36, A self-aligned ultra-thin nucleation layer 34 of titanium is deposited on the work area via a condensed Ti process, and the selective / encrusting layer (: ¥ 〇81 layer 44, 46, deposited? ¥ 081 (: 11 layers of 50 and deposited with T i R anti-reflective coating. Referring to Fig. 7, it shows an exploded view of a gathering tool 60 having a PVD and CVD chamber capable of performing the above procedure "-In general, the substrate is It is brought in and out of the gathering tool 60 via a set of cassette loading gates 62. A robot arm 64 with blades 67 is located in the gathering tool 60 to move the substrate through the gathering tool 60. The robot arm 64 is generally located in the buffer chamber 68 The substrate is transferred between the cassette loading gate 62, the evacuation wafer positioning chamber 70, the pre-chamber chamber 72, the PVD TiN ARC chamber 74, and the cooling chamber 76. A second group of robots 78 is located in the transfer chamber 80 to transfer the substrate. Sheets are transferred into and out of the cooling chamber 76, the condensing Ti chamber 82, the CVD TiN chamber 84, the CVD A1 chamber 86, and the PVD AlCu processing chamber 88. «The transfer chamber 80 in the integrated system is preferably maintained at a low pressure or altitude in the range of 10〃 to 10ltorr» The specific configuration of the chamber in Figure 6 includes the ability to perform CVD and 18 This paper size is applicable to China National Standard (CNS) A4 specification (210X297 mm) -------- 丨 Installation ------ Order 丨 __iL_ — — Line (Please read the precautions on the back first (Fill in this page again.) Printed by the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperatives. A7 B7. 5. Description of the Invention (A) An integrated processing system for PVD programs. There are more PVD and CVD program configurations. Generally speaking, the substrate processed in the gathering tool 60 is transferred from the cassette loading gate 62 to the buffer chamber 68, where the robot 64 first moves the substrate into the extraction chamber. 70. The substrate is then transferred to the pre-guessing chamber 72, the PVD TiN ARC chamber 74, and the substrate is moved into one or more processing chambers and moved between them before entering the cooling chamber 76. It can be expected that the substrate can be Multiple processing chambers are processed or cooled any number of times in any order to fabricate a substrate on a substrate Construction. After processing, the substrate is moved from the gathering tool 60 through the buffer chamber 68 and back to the load gate 62. A set of microprocessor controllers 80 controls the formation and sequence of the required film layers on the substrate. According to the present invention, The gathering tool 60 passes a substrate through the loading gate 62 and enters the extraction chamber 70, where the substrate is contaminated by the outgassing. The substrate is then moved into the pre-chamber 72 where the surface of the substrate is washed and moved. Remove any contamination thereon. The substrate is selectively processed in a CVD-TiN chamber 75 to deposit a barrier layer on the dielectric layer. Robot 78 then passes the substrate to the condensing Ti chamber
I 82或PVD —TiN室74，該處理室內最好具有一視準儀以 便澱積一超薄成核層於基片上》 該基片，具有孔口往下延伸經介霉層而至形成穿孔或 接點之底板的曝露導體或半導體層表面，接著在CVD A1 室86內接受例如CVD A1之CVD金屬層。該基片接著在 P V D A 1 C u室8 8內·被處理，並且選擇地在整合系統上之 PVD TiN室74內被處理》 一種層級眞空晶圖處理系統掲示於1993年2月16曰 19 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） I---------疼------1T-------^——1^ (請先閲讀背面之注意事項再填寫本頁) Α7 Β7 五、發明説明（/y) 發給Tepman等人之美國專利編號5, 186, 718，標題是 “層級眞空晶圖處理系統和方法”’在此列爲參考。該系統 己被修改而含有C V D室。 參看第8圖，它示出用以供應氣體至第7圖系統之 C VD室的一種氣箱系統。TiN氣箱9 0內具有N2，Ar， He ，Q2和NF3 。反應產物，四雙甲基氨基欽 (TDMAT)，以及情氣人1*和]^2被傳入CVD TiN室92以 便處理。相似地’一組CVD A1氣箱94具有N2，Ar，和 H2。反應產物，雙甲基鋁氫化物（DMAH)，H2和惰氣ΑΓ 被傳入CVD Α1室96以便澱積鋁》各處理室具有漓輪泵浦 98, 102以提供處理室之眞空狀態，以及一組風箱/乾燥 泵浦104, 106經保護器108而排空處理室。 雖然上面說明係針對本發明之較佳實施例，本.發明有 其他和進一步之實施例而不脫離其基本範賭。本發明之範 除將由下面申請專利範圍加以界定。 ---------裝—— (請先聞讀背面之注意事項再填寫本頁) 訂---- 線 經濟部中央標準局員工消費合作社印装 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 經濟部中央標準局員工消費合作社印裝 A7 B7 五、發明説明（/?) 元件標號對照表 30 層級構造 32 成型層 36 導電層 38 孔口 40 壁面 42 板面 34 成核層 33 工作區 44 金屬互連 46 金饜層 52 頂表面 50 PVD AL層 62 裝載閘 60 聚集工具 67 葉片 64 機械手 70 抽氣晶圓定位室 68 緩衝室 74 PVD TiN ARC室 72 預淸室 78 機械手 76 冷卻室 82 凝聚Ti室 80 傳送室 86 CVD A1 室 75,84 CVD TiN室 90 TiN氣箱 88 PVD AlCu室 94 CVD A1氣箱 92 CVD TiN室 98,102 渦輪泵浦1 96 CVD A1 室 108 保護器 104,106 1' . 風箱/乾燥泵浦 I-------裝：------訂丨„]L_丨—線 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS ) A4規格（：!0\ I：97公釐）I 82 or PVD—TiN chamber 74. It is best to have a collimator in the processing chamber to deposit an ultra-thin nucleation layer on the substrate. The substrate has an aperture extending downward through the mold layer to form a perforation. The surface of the conductor or semiconductor layer of the base plate of the contact is exposed, and then a CVD metal layer such as CVD A1 is received in the CVD A1 chamber 86. The substrate is then processed in PVDA 1 Cu chamber 8 8 and is optionally processed in PVD TiN chamber 74 on the integrated system. A hierarchical “empty crystal map processing system” is shown on February 16, 1993. Paper size applies to Chinese National Standard (CNS) A4 specification (210X 297 mm) I --------- pain ------ 1T ------- ^ ---- 1 ^ (please first Read the notes on the back and fill in this page) Α7 Β7 V. Invention Description (/ y) US Patent No. 5,186, 718 issued to Tepman et al., Entitled "Hierarchical Hollow Crystal Map Processing System and Method" 'Here Listed for reference. The system has been modified to include a CV D chamber. Referring to Fig. 8, there is shown an air box system for supplying gas to the C VD chamber of the system of Fig. 7. TiN gas tank 90 has N2, Ar, He, Q2 and NF3. The reaction product, tetrabismethylaminochin (TDMAT), and the affectionate 1 * and ^^ 2 were introduced into the CVD TiN chamber 92 for processing. Similarly, a group of CVD A1 gas tanks 94 have N2, Ar, and H2. The reaction products, bismethylaluminum hydride (DMAH), H2 and inert gas ΑΓ are introduced into CVD Α1 chamber 96 to deposit aluminum. Each processing chamber has a Li-wheel pump 98, 102 to provide the empty state of the processing chamber, and A set of bellows / dry pumps 104, 106 are evacuated by the protector 108 to the processing chamber. Although the above description is directed to the preferred embodiments of the present invention, the present invention has other and further embodiments without departing from its basic scope. The scope of the present invention will be defined by the scope of patent application below. --------- Installation—— (Please read the precautions on the reverse side before filling out this page) Order ---- Printed on paper standards of the Employees' Cooperatives of the Central Standards Bureau of the Ministry of Online Economy CNS) A4 specification (210X297 mm) A7 B7 printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (/?) Component reference table 30 Hierarchical structure 32 Molding layer 36 Conductive layer 38 Orifice 40 Wall surface 42 Board surface 34 Nucleation layer 33 Working area 44 Metal interconnection 46 Gold layer 52 Top surface 50 PVD AL layer 62 Loading gate 60 Gathering tool 67 Blade 64 Manipulator 70 Extraction wafer positioning chamber 68 Buffer chamber 74 PVD TiN ARC chamber 72 Chamber 78 Robot 76 Cooling chamber 82 Condensation Ti chamber 80 Transfer chamber 86 CVD A1 chamber 75, 84 CVD TiN chamber 90 TiN gas box 88 PVD AlCu chamber 94 CVD A1 gas box 92 CVD TiN chamber 98, 102 Turbo pump 1 96 CVD A1 Room 108 protector 104,106 1 '. Air box / drying pump I ------- installation: ------ order 丨 „] L_ 丨 —line (please read the precautions on the back before filling in this Page) This paper size applies to China National Standard (CNS) A4 specifications (:! 0 \ I: 97 )