經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明（1 ) 發明領域： 本發明係有關於一種GPS功能控制POCSAG尋呼同步設 備，特別是關於架設多個基站之尋呼系統的同步設備。一 般的尋呼系統爾乎均.採用多基站同頻同播方式，以達到使 信號覆蓋大範圍之目的。由於各基站所發送出之傳呼信號 會彼此互相干涉，若各基站所發射之尋呼信號間有時間差 ，不可避免的將會產生非同步干擾，而影響尋呼效果。此 非同步干擾之產生是由於在信號覆蓋範圍內，來自不同基 站之發射機所發送之信號在不同時刻到達接收機(即時延不 均衡），若若此非同步信號之幅度相近，將導致接收機所接 收到之信號波形產生畸變」嚴重時甚至引起誤碼、丟碼之. 狀況，兩重疊信號之時延差必須小於1/4碼元長度才不至引 起誤碼。 前述時延不均衡之狀況主要來至尋呼信號由區域控制端 傳送至基站之傳輸時延以及由基站之發射機傳送至接收機 所產生之空中傳播路徑時延兩部份。若將各基站傳送尊呼 信號之時點同步，可消除傳輸時延而使前述時延不均衡降 低至僅有影響甚微之空中傳播路徑時延，如此將可避免非 同步干擾產生之誤碼狀況。_ 先前技術： 傳統上控制同步干擾影響之方法中，多採用「固定時延_ 均衡」或「自動時延均衡」之方式。請參考第1圖，區域 控制端將偵測碼傳送到各基站後由各基站之發射機發設’ 藉接收各基站之回送信號，並比較此偵測碼發送與接收之 A:\OPS 功丨雄M P〇C8AO«呼闻步CMMoc · 3 - 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先聞讀背面之注意事項再填寫本頁) —,ik---^__11------i 0------^— · 經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明（2 ) 時延，即可計算任一基站之時_延·。然此種方式存在如下列 之問題： (1) 當區域控制端距離基站太遠時，基站回送之訊號太弱 無法辨識，當系統進行時延調整時，正常的尋呼工作 無法使用。 (2) 當其他尋呼網與基站發射之偵測碼同頻時，區域控制 端不只收到所屬基站發射之訊號，亦會收到其他尋呼 網之訊號而產生干擾，而無_法辨別該偵測碼。， (3) 當所屬基站數[量龐大時，由於各個基站發送回來之訊 號須順序處理，是以處理總時間會加大，使系統產生 困難且頻繁之調適問題而影響效率。 本發明係有關於一種GPS功能控制POCSAG尋呼同步設 備’其利用GPS之準秒裝置來取代傳統時延均衡之方式而 可避免上述傳統技術所產生之問題。 發明目的： 本發明之主要目的在提供一種GPS功能控制POCSAiG尋 呼同步設備，其可使各基站能同步發射尋呼訊號。 本發明之另一目的在提供一種GPS功能控制POCSAG尋 呼同步設備，其可不須利用順序接收各基站偵測碼之方式 v .. - .......... > 來對系統之標準時秒作校正，由此解決其所產生之問題。 爲達成上述目的，本發明利用接收全球定位系統之準秒 時脈使各基站能有一共同之標準時間。系統主要包含設於 區域控制端與各基站之GPS接收器，設於區域控制端之 GPS網路控制器，及GPS基站控制器。利用GPS接收器同 AVOPS功*迪_ 4 - 本紙張尺度適用中國國家標準（CMS ) A4規格（210><297公釐） ----------C衣II (請先閲讀背面之注意事項再填寫本頁) 訂- -®Ί. 經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明（3) 步接收衛星高頻之全球定位系統信息而使各基站產生準秒 時脈，再以該準秒時脈作爲基準，由GPS網路控制器控制 傳送至各基站的尋呼信號v而使各碁站可確定收到尋呼信 號之時段必位於兩準秒時脈之間。_.利用GPS基站控制器， 先將所收到之尋呼信號轉換爲數位信號，並將該數位信號 儲存於一暫存器。當基站接收到下一準秒時脈時，所有基 站同步將儲存於暫存器中之資料取出，還原成類比信號後 再同步發射出，而能使各基站可達成同步發射信號之功效 -..... 〇 爲了讓本發明其上述和其他之目的、特徵與優點能更明 顯被揭示，下文特舉本發明之較佳實施例，並配合所附圖 示，作詳細說明如下。 圖示說明： 第1圖：先前技術之控制示意圖； . 第2圖：本發明之系統方塊連結示意圖； 第3圖：各元件信號之時序圖； 第4圖：由區域控制端送出之尋呼信號，其起始訊息與 準秒時脈相對時序位置圖； 第5圖：GPS基站控制器之結構圖； / 第6圖：同步信號輸出控制之時序示意圖 第7a圖：記憶體信號儲存之方塊示意圖 第7b圖：記憶體信號儲存之動作時序圖 圖號說明： 1區域控制端 11 GPS接收器 a:\ops - 5 ** 本紙張^度適用中國國家標準（CNS ) A4規格（2丨OX297公釐） -----------ΓΜ-- (請先閲讀背面之注意事項再填寫本頁) 訂 A7 B7 經濟部中央標準局員工消費合作社印製 12GPS網路控制器 14信號分配器 16調變解調器 2、2，基站 22 GPS基站控制器 222類比數位轉換電路 224中央處理器 226記憶體 228輸出電路 發明說明： 請參照第2圖所示 五、發明説明（ Π區域控制器 15接收機 21 GPS接收器 221接收電路 223增益電路 225區域可規劃邏輯陣列電路 227數位類比轉換電路 23發射機 此爲本發明之系統方塊連結示意圖 ，圖中顯示本發明之系統係分設於區域控制端丨與基站端2 。設於區域控制端1之部份包含一 GPS接收器11及GPS 網路控制器12 ,可配合區域桦制器13、調變解調器16孖 信號分配器14發送尋呼信號，而設於基站2之部份包含一 GPS接收器21及一 GPS基站控制器22，可配合發射機23 以接收並發射區_域控制端1傳來之尋呼信號。 區域控制端1由交換機網路(未示於圖中)接收客戶要求 之.傳輸服務，該傳輸服務將以特定編碼格式傳送至各基站 ，藉各基站共同發射信號以涵蓋一大區域之信號傳送範圍 。區域控制端1與基站2間係藉由電話線傳輸信號，亦可 採用其他種有線或無線之傳輸方式’如光纖或無線電波等 當區域控制端收到客戶傳送來之尋呼耍求時.，區域控制 A:VOPS POCSAO ^οβ 本紙張尺度適用中國國家標準（CNS〉Α4規格（2丨ox 297公釐） (請先聞讀背面之注意事項再填寫本頁) 、νβPrinted by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (1) Field of the invention: The present invention relates to a GPS function control POCSAG paging synchronization device, especially the synchronization of a paging system with multiple base stations. device. The general paging system is almost uniform. Multi-base station co-frequency simulcast mode is adopted to achieve the purpose of covering a wide range of signals. Since the paging signals sent by the base stations interfere with each other, if there is a time difference between the paging signals transmitted by the base stations, asynchronous interference will inevitably occur, which will affect the paging effect. This non-synchronous interference occurs because the signals sent by transmitters from different base stations reach the receiver at different times within the signal coverage area (immediate delay imbalance). If the amplitude of this asynchronous signal is similar, it will cause reception The signal waveform received by the receiver is distorted. "Serious or even missing codes may be caused when the signal is severe. In some cases, the time difference between the two overlapping signals must be less than 1/4 symbol length so as not to cause bit errors. The aforementioned unbalanced delay mainly comes from the transmission delay of the paging signal transmitted from the area control terminal to the base station and the delay of the air propagation path generated by the transmission from the base station transmitter to the receiver. If the time points at which the base stations transmit respectful call signals are synchronized, the transmission delay can be eliminated and the aforementioned delay imbalance can be reduced to only the air propagation path delay which has little effect. This will avoid the error situation caused by asynchronous interference. . _ Prior technology: Traditionally, the method of controlling the influence of synchronization interference uses the method of "fixed delay_equalization" or "automatic delay equalization". Please refer to Figure 1. After the area control terminal sends the detection code to each base station, it will be set by the transmitter of each base station to receive the return signal from each base station and compare the A: \ OPS sent and received by this detection code. Gong 丨 Xiong MP〇C8AO «Huwenbu CMMoc · 3-This paper size applies to Chinese National Standard (CNS) A4 specifications (210X297 mm) (Please read the precautions on the back before filling this page)-, ik-- -^ __ 11 ------ i 0 ------ ^ — · Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (2) Time delay, you can calculate the time of any base station _Yan ·. However, this method has the following problems: (1) When the regional control end is too far away from the base station, the signal sent back by the base station is too weak to be recognized. When the system adjusts the delay, normal paging work cannot be used. (2) When other paging networks are on the same frequency as the detection code transmitted by the base station, the area control terminal will not only receive the signals transmitted by the base station to which it belongs, but also receive the signals from other paging networks to cause interference. The detection code. (3) When the number of base stations [is large, the signals sent back from each base station must be processed sequentially, so the total processing time will increase, which will cause the system to have difficult and frequent adjustment problems and affect efficiency. The present invention relates to a GPS function control POCSAG paging synchronization device 'which uses GPS's quasi-second device to replace the traditional delay equalization method and can avoid the problems caused by the conventional technology. Object of the invention: The main object of the present invention is to provide a GPS function control POCSAiG paging synchronization device, which enables each base station to transmit paging signals synchronously. Another object of the present invention is to provide a GPS function control POCSAG paging synchronization device, which does not need to use the method of sequentially receiving the detection codes of each base station v ..-..... > to the system The standard hour and second are corrected to solve the problems. To achieve the above object, the present invention utilizes the quasi-second clock of the receiving global positioning system to enable base stations to have a common standard time. The system mainly includes a GPS receiver set at the area control end and each base station, a GPS network controller set at the area control end, and a GPS base station controller. Use GPS receiver with AVOPS function * Di_ 4-This paper size is applicable to China National Standard (CMS) A4 specification (210 > < 297mm) ---------- C-suit II (Please read first Note on the back, please fill in this page again) Order--®Ί. Printed by the Consumers' Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs A7 B7 V. Description of the invention (3) Receive the high-frequency GPS information of the satellite step by step to make each base station accurate Second clock, and using this quasi-second clock as a reference, the paging signal v transmitted to each base station is controlled by the GPS network controller so that each station can determine that the time period for receiving the paging signal must be at two quasi-seconds Between pulses. _.Using the GPS base station controller, first convert the received paging signal into a digital signal, and store the digital signal in a temporary register. When the base station receives the next quasi-second clock, all the base stations will synchronously take out the data stored in the temporary register, restore them to analog signals and then send them out synchronously, so that each base station can achieve the effect of transmitting signals synchronously. .... 〇 In order to make the above and other objects, features, and advantages of the present invention more apparent, the following describes the preferred embodiments of the present invention in detail with the accompanying drawings. Illustration: Figure 1: Control diagram of the prior art;. Figure 2: System block connection diagram of the present invention; Figure 3: Timing diagram of the signal of each component; Figure 4: Paging sent by the area control end Signal, its starting information and quasi-second clock relative timing position diagram; Figure 5: Structure diagram of GPS base station controller; / Figure 6: Timing diagram of synchronous signal output control Figure 7a: Memory signal storage block Schematic diagram 7b: Operation timing diagram of memory signal storage Figure number description: 1 Area control terminal 11 GPS receiver a: \ ops-5 ** This paper is compliant with China National Standard (CNS) A4 specification (2 丨 OX297 (Mm) ----------- ΓΜ-- (Please read the notes on the back before filling this page) Order A7 B7 Printed by the Central Consumers Bureau of the Ministry of Economic Affairs Consumer Cooperatives 12 GPS Network Controller 14 Signal Distributor 16 modulates demodulators 2, 2, base station 22, GPS base station controller 222, analog digital conversion circuit 224, central processor 226, memory 228, and output circuit description of the invention: Please refer to Figure 5 for the description of the invention (II area Controller 15 Receiver 21 G PS receiver 221 receiving circuit 223 gain circuit 225 area programmable logic array circuit 227 digital analog conversion circuit 23 transmitter This is a block diagram of the system of the present invention. The figure shows that the system of the present invention is located at the area control end. Base station end 2. The part set on the area control end 1 includes a GPS receiver 11 and a GPS network controller 12, which can cooperate with the regional controller 13, the modem 16 and the signal distributor 14 to send paging signals. And the part set in the base station 2 includes a GPS receiver 21 and a GPS base station controller 22, which can cooperate with the transmitter 23 to receive and transmit the paging signal transmitted from the zone_domain control terminal 1. The zone control terminal 1 consists of The switch network (not shown) receives the transmission service requested by the customer. The transmission service will be transmitted to each base station in a specific coding format, and the base stations will jointly transmit signals to cover the signal transmission range of a large area. Area control end 1 and the base station 2 use a telephone line to transmit signals, and other wired or wireless transmission methods can also be used, such as fiber optics or radio waves. When, area control A: VOPS POCSAO ^ οβ this paper scale applicable Chinese National Standard (CNS> Α4 specification (2 Shu ox 297 mm) (Please read smell precautions to fill out the back of this page), νβ
經濟部中央標準局員工消費合作社印製 A7 _ __— _B7_ 五、發明説明（5 ) 端13會將該尋呼要求〔如留言、留電話號碼或其他服務)送 至GPS網路控制器12並將其轉換成POCSAG編碼格式之 尋呼信號’此尋呼系統之尋呼編碼POCSAG格式包含 512bps ’ 1200bps與2400bps之發射速率。而後利用诞GPS 網路控制器I2連捺之調變解調器I6將調變後之信號pfa信 號分配器14送出，即可將該尋呼信號傳送至各某站2 〇基 站2利用其中與區域控制端1同步接收衛星信息之GPS接 收器21，藉基逝產生同步之準秒詩脈;，可使GPS基站控制 器22能在一以衛星發送信息爲基準之絕對時間中，將尋呼 信號傳送到與其相連接之發射機23發射。 GPS接收器11及21係設於區域控制端1與每一基站2 中，其具有接收端a、a’與準秒時脈輸出端b、b’，其主要 用以接收衛星所發射之高頻全球定位系統信息，並經由準 秒時脈輸出端b、V送出準秒時脈。由於各GPS接收器11 及21係同步接收到衛星之高頻信息，是以區域控制端1與 各基站2可具有相同標準時間之準秒時脈。 利用前述GPS接收器11產生之準秒時脈，.GPS網路控 制器12可控制尋呼訊號相對於準秒時之傳送時間。請參考 第3圖，此爲各元件信號之時序圖（timing diagrams)。圖中 D0爲區域控制端1所送出之尋呼信號，D1霉某中一基站2 所收到之信號波形延遲，D2爲另一基站2,所收到之信號波 形延遲，（^1^01>8爲GPS之準秒時脈，D11與D12分別爲經 本發明之系統控制，由基站2與基站2,所同步傳送出之信 號。 AMPS功做(HPOCSAGiMf两步雜如 -Ί - 本紙張A度逋用中國國家標隼（CMS ) A4規格（210X297公釐） (請先聞讀背面之注意事項再填寫本頁) 裝Printed by A7 _ __ — _B7_ of the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 5. The invention description (5) The terminal 13 will send the paging request (such as a message, leave a phone number or other service) to the GPS network controller 12 and Convert it into a paging signal in the POCSAG code format. The paging code POCSAG format of this paging system includes 512bps' 1200bps and 2400bps transmission rates. Then, the modulated signal demodulator I6 connected to the GPS network controller I2 is used to send the modulated signal pfa signal distributor 14 to transmit the paging signal to each station 2. The base station 2 uses one and the other The GPS receiver 21 of the area control terminal 1 that receives satellite information synchronously generates a quasi-second verse of synchronization by base time; enables the GPS base station controller 22 to page in an absolute time based on the information sent by the satellite. The signal is transmitted to a transmitter 23 connected thereto. The GPS receivers 11 and 21 are located in the area control terminal 1 and each base station 2. It has receiving terminals a, a 'and quasi-second clock output terminals b, b', which are mainly used to receive the high altitudes transmitted by satellites. Frequency GPS information, and send the quasi-second clock through the quasi-second clock output terminals b, V. Since the GPS receivers 11 and 21 receive the high-frequency information of the satellites synchronously, the quasi-second clock of the area controller 1 and each base station 2 can have the same standard time. Using the quasi-second clock generated by the aforementioned GPS receiver 11, the GPS network controller 12 can control the transmission time of the paging signal relative to the quasi-second time. Please refer to Figure 3, which is the timing diagrams of each component signal. In the figure, D0 is the paging signal sent by the area control terminal 1, D1 is the delay of the signal waveform received by one of the base stations 2 and D2 is the delay of the received signal waveform of another base station 2. (^ 1 ^ 01 > 8 is the quasi-second clock of GPS, D11 and D12 are the signals transmitted by base station 2 and base station 2 respectively controlled by the system of the present invention. AMPS work (HPOCSAGiMf two steps are as complicated as -Ί-This paper A Degrees use Chinese National Standard (CMS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page)
、SJ A7 B7 % 央 k' 禪 局 員 工 消 費 合 作 社 印 製 五、發明説明（6 區域控制端1發送之尋呼信號會由GPS網路控制器12 控制其開始發送之時間。由於基站2與2’到區域控制端1 之距離不同，是以在區域控制端1送出傳呼信號後，基站2 與基站2’所收到之信號會有不同之時間延遲Ml與仏2。爲 使各基站2、2’能確認所收到之尋呼信號與作爲標準參考時 間之準秒時脈的絕對時間差，GPS網路控制器12會於尋呼 信號傳送前，先確認所發送尋呼信號之起始訊息相對於準 秒時脈之位置。 請參考第4圖，圖中所示爲由區域控制端送出之尋呼信 號DO，其起始訊息DOs與準秒時脈CLKCPS相對時序位置 圖；爲避免任一基站2(或2，)接收到該起始信號之時點恰好 與某一準秒時脈重疊,，造成各基站2(或2’)無法辨認該起始 信號究竟位於該準秒時脈之前或之後，必須限制該起始信 號DOs與準秒時脈CLKCPS之相對位置。由於區域控制端1 傳輸至基站2的時間延遲絕對不會超過1〇〇毫秒，是以網 路控制器12會控制該起始信號DOs傳送時間，使其起始訊 息DOs不會在任一準秒時脈至該準秒時脈之前At之時間內 傳送並將Δί定爲100毫秒(如第4圖所示）。如此接收到尋呼 信號D0之任一基站2(或2，)即可將該尋呼信號D0之起始 訊息Dos位置確認至兩確定之準秒時脈間。 請參考第5 BL，此爲GPS _站控制器22其結構之方塊 示意圖。其包含一接收電路(I/O in)221、類比數位轉換電路 (A/D) 222、增益電路(G) 223、中央處理器CPU 224、區域 可規劃邏輯陣列電路(FPGA) 225、記憶體(M) 226、數位類 A:\OPS功能控H POC8AO尋碎间步KM.doc 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閱讀背面之注意事項再填寫本頁) 訂.--- : 二 In I nn im 1^1 n^i i HI In n^i A7 B7 五、發明説明（7 ) 比轉換電路(D/A) 227及一輸出電路(I/O out) 228。尋呼信 號傳送到基站2後，須先將其轉換格式並暫存，才能在一絕 對時刻由各基站2同步發射出。接收電路221接收傳送到 基站2之尋呼信號後，先將其送入類比數位轉換電路(A/D) 222中將其轉換爲類比信號，而該類比信號之電壓準位可由 增益電路223控制。r 請參考第6圖趄第7 _，當尋呼信號轉換爲數位信號形 態後，即送入區域可規劃邏輯陣列電路(FPGA) 225中並利 用CPU 224對該數位信號進行時序控制。FPGA 225可對轉 換成輸位信號之傳呼信號輸入，以一個準秒時脈之時間爲 週期，重複進行下列時序控制動作： 步驟1.配合ΙΟΟΚΗζ之頻率，將記憶體位址分爲〇〜99999 〇 步驟2.以lOOKHz之頻率計數，偵測輸入尋呼信號起始 位置之計數値X並記錄此數値爲輸入位址ADDi(x範圍： 0-99999) 〇 步驟當有信號輸入後，類比信號超過0.5伏特時，開. 始計算。 經濟部中央標準局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) 步驟4.'將輸入數位信號由位址ADDi=x開始，寫入記憶 體220中。 步驟5.下一準秒時脈到達時； 5a•由記憶體226中自輸出位址ADDo=ADDi開始取出 信號’送入數位類比轉換電路(D/A) 227中。 5b•經X計數後，淸除輸入位址ADDi爲0。 A.-U3PS smiim POCSAO ««m^KM.406 - 9 - 本紙張妓適用中國準（CNS) Α4· (210><297公釐) ' 經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明（8) 5c.將後續之輸入數位信號由輸入位址ADDi=0開始， 寫入記憶體226中。 5d.檢測類比信號不轺渦0.5伏特之眭間，若其大於2 秒則跳至步驟6。. 5e.重複步驟5a。 步驟6.等待下一輸入。 在步驟5a與步驟5c中，其動作是利用分時多工方式， 如第7a圖與第7b圖中所示。以5微秒時間讀出後以5微SJ A7 B7% Printed by the Central Government's Consumer Cooperatives V. Description of the invention (6 The paging signal sent by the area control terminal 1 will be controlled by the GPS network controller 12 when it starts to transmit. Since the base stations 2 and 2 'The distance to the regional control terminal 1 is different, so that after the paging signal is sent from the regional control terminal 1, the signals received by the base station 2 and the base station 2' will have different time delays M1 and 仏 2. To make each base station 2, 2 'Can confirm the absolute time difference between the received paging signal and the quasi-second clock as the standard reference time. The GPS network controller 12 will confirm the start message of the sent paging signal before the paging signal is transmitted. Relative to the position of the quasi-second clock. Please refer to Figure 4, which shows the relative timing position of the initial message DOs and the quasi-second clock CLKCPS sent by the area control end. The time point when a base station 2 (or 2,) received the start signal coincided with a certain quasi-second clock, so that each base station 2 (or 2 ') could not recognize that the start signal was before the quasi-second clock. Or after, the start signals DOs and The relative position of the second clock CLKCPS. Since the time delay of the transmission from the area control terminal 1 to the base station 2 will never exceed 100 milliseconds, the network controller 12 will control the transmission time of the start signal DOs to make it start The message DOs will not be transmitted between any quasi-second clock and At before the quasi-second clock and set Δί to 100 milliseconds (as shown in Figure 4). Any base station 2 that has received the paging signal D0 in this way (Or 2,) The Dos position of the start message of the paging signal D0 can be confirmed to between two determined quasi-second clocks. Please refer to the 5th BL, which is a block diagram of the structure of the GPS station controller 22. It includes a receiving circuit (I / O in) 221, analog digital conversion circuit (A / D) 222, gain circuit (G) 223, central processing unit CPU 224, area programmable logic array circuit (FPGA) 225, memory (M) 226, Digital class A: \ OPS function control H POC8AO Shredding step KM.doc This paper size applies to China National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling in this Page) Order. ---: Two In I nn im 1 ^ 1 n ^ ii HI In n ^ i A7 B7 V. Description of the invention (7) ratio Change circuit (D / A) 227 and an output circuit (I / O out) 228. After the paging signal is transmitted to the base station 2, it must be converted into a format and temporarily stored before it can be transmitted synchronously by each base station 2 at an absolute moment After receiving the paging signal transmitted to the base station 2, the receiving circuit 221 first sends it to the analog digital conversion circuit (A / D) 222 to convert it into an analog signal, and the voltage level of the analog signal can be obtained by the gain circuit. 223 control. r Please refer to Figure 6 and Figure 7_. When the paging signal is converted into a digital signal, it is sent to the area programmable logic array circuit (FPGA) 225 and the CPU 224 is used to perform timing control on the digital signal. The FPGA 225 can input the paging signal converted into an input signal by repeating the following timing control actions with a quasi-second clock as the period: Step 1. With the frequency of ΙΟΟΚΗζ, divide the memory address into 0 ~ 99999 〇 Step 2. Count at 10OKHz, detect the count of the starting position of the input paging signal 値 X and record this number 値 as the input address ADDi (x range: 0-99999) 〇 Step When analog signal is input, analog signal Above 0.5 volts, start calculation. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling this page) Step 4. 'Write the input digital signal from the address ADDi = x and write it into the memory 220. Step 5. When the next quasi-second clock arrives; 5a • Retrieve the signal from the output address ADDo = ADDi in the memory 226 to the digital analog conversion circuit (D / A) 227. 5b • After counting by X, divide the input address ADDi to 0. A.-U3PS smiim POCSAO «« m ^ KM.406-9-This paper is applicable to China Standard (CNS) Α4 · (210 > < 297mm) '' Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7 5 Explanation of the invention (8) 5c. The subsequent input digital signals are written into the memory 226 starting from the input address ADDi = 0. 5d. Detect that the analog signal does not fluctuate within 0.5 volts. If it is greater than 2 seconds, skip to step 6. 5e. Repeat step 5a. Step 6. Wait for the next input. In steps 5a and 5c, the action is to use the time division multiplexing method, as shown in Figs. 7a and 7b. Read 5 microseconds and read 5 microseconds
秒時間寫入，可在1〇微秒之一個週期中(對應於elk爲100KWrite time in seconds, in a cycle of 10 microseconds (corresponding to 100K elk)
Hz之頻率)同時完成由記憶體226讀出數位信號Dsd與將數 位信號DOd寫入記憶體226之動作。 .在步驟5a中，送入數位類比轉換電路(D/A) 227之數位 信號會被轉換成類比信號。而後由輸出電路228輸出。輸 出之類比信號傳送至發射機23後，即以電磁波形式發射出 〇 由於每一基站2均是在準秒時脈到達後才開始取出記憶 體226中之數位信號，是以各基站2可同步輸出類比信號 〇 本發明由以上之說明，揭示其具有使各基站能同步發射 尋呼訊號之功效。且由於本發明利用GPS對系統之標準時 秒作校正，.而取代傳統以區域控制端接收基站信號方式校 正時間，可具有解決因基站信號接收不良而導致時間校正 錯誤之功效。 雖然本發明已以前述之較佳實施例揭示，然其並非用以 纖功酬tOCSAG辱嘛， '10 ' 本紙張尺度適用中國國家標準（CNS ) A4規格（2丨〇><297公釐） (請先聞讀背面之注意事項再填寫本頁) '变· 、τThe frequency of Hz) simultaneously completes the operations of reading the digital signal Dsd from the memory 226 and writing the digital signal DOd into the memory 226. In step 5a, the digital signal sent to the digital analog conversion circuit (D / A) 227 is converted into an analog signal. It is then output by the output circuit 228. After the output analog signal is transmitted to the transmitter 23, it is emitted in the form of electromagnetic waves. Since each base station 2 starts to take out the digital signals in the memory 226 after the quasi-second clock arrives, the base stations 2 can be synchronized. Outputting analog signals. The present invention discloses from the above description that it has the effect of enabling each base station to transmit paging signals simultaneously. And because the present invention uses GPS to correct the standard time of the system, instead of traditionally correcting the time by receiving signals from the base station at the regional control end, it can have the effect of solving the time correction error caused by poor reception of the signal from the base station. Although the present invention has been disclosed in the aforementioned preferred embodiment, it is not used to pay for tOCSAG. '10' This paper size applies the Chinese National Standard (CNS) A4 specification (2 丨 〇 > < 297) (%) (Please read the precautions on the back before filling out this page) 'Changes, τ
五、發明説明（ 9 A7 B7 限定本發明，任何熟悉此技藝者，在不脫離本發明之精神 和範圍內，當可作各種之更動與修改，因此本發明之保護 範圍當是後附之申請專利範圍界定者爲準。 (請先聞讀背面之注意事項再填寫本頁) n^i I n^i mu. 士 I^n _ r v 0¾V. Description of the invention (9 A7 B7 limits the present invention. Anyone familiar with this technology can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention is the attached application. The scope of patents is subject to definition. (Please read the notes on the back before filling in this page) n ^ i I n ^ i mu. 士 I ^ n _ rv 0¾
In .......、τ 經濟部中央標準局員工消費合作社印製 -11- A:\OPS功能控M FOCSAO尋呼苘步投備.doc 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐）In ......., τ Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs -11- A: \ OPS function control M FOCSAO paging step preparation.doc This paper size applies to China National Standard (CNS) A4 Specifications (210X297 mm)