TW376566B - Method of forming planar intermetal dielectric layer - Google Patents

Method of forming planar intermetal dielectric layer

Info

Publication number
TW376566B
TW376566B TW087110353A TW87110353A TW376566B TW 376566 B TW376566 B TW 376566B TW 087110353 A TW087110353 A TW 087110353A TW 87110353 A TW87110353 A TW 87110353A TW 376566 B TW376566 B TW 376566B
Authority
TW
Taiwan
Prior art keywords
dielectric material
low dielectric
material layer
cured
forming
Prior art date
Application number
TW087110353A
Other languages
Chinese (zh)
Inventor
Ji-Jin Luo
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Priority to TW087110353A priority Critical patent/TW376566B/en
Application granted granted Critical
Publication of TW376566B publication Critical patent/TW376566B/en

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Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

Disclosed is a method of forming a planar intermetal dielectric layer on a conductive metal structure. The method comprises the following steps: forming a pad oxide layer on a conductive metal structure; forming a cured low dielectric material layer on the pad oxide layer; forming an un-cured low dielectric material layer on the cured low dielectric material layer; forming an un-cured siloxane layer on the un-cured low dielectric material layer; applying a chemical mechanical polishing on the un-cured siloxane layer and the un-cured low dielectric material layer wherein the chemical mechanical polishing stops on the surface of the cured low dielectric material layer thereby leaving a portion of the un-cured low dielectric material layer in the spacer of the conductive metal structure; curing the remaining portion of the un-cured low dielectric material layer; and forming a cap oxide layer on the remaining portion of the cured low dielectric material layer and the cured remaining portion.
TW087110353A 1998-06-26 1998-06-26 Method of forming planar intermetal dielectric layer TW376566B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW087110353A TW376566B (en) 1998-06-26 1998-06-26 Method of forming planar intermetal dielectric layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW087110353A TW376566B (en) 1998-06-26 1998-06-26 Method of forming planar intermetal dielectric layer

Publications (1)

Publication Number Publication Date
TW376566B true TW376566B (en) 1999-12-11

Family

ID=57942010

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087110353A TW376566B (en) 1998-06-26 1998-06-26 Method of forming planar intermetal dielectric layer

Country Status (1)

Country Link
TW (1) TW376566B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10520048B2 (en) 2016-12-23 2019-12-31 Wistron Corporation Rotation velocity adjusting module, rotating device and rotation velocity adjusting method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10520048B2 (en) 2016-12-23 2019-12-31 Wistron Corporation Rotation velocity adjusting module, rotating device and rotation velocity adjusting method

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