TW370743B - System for variable length code data stream position arrangement - Google Patents
System for variable length code data stream position arrangementInfo
- Publication number
- TW370743B TW370743B TW086112300A TW86112300A TW370743B TW 370743 B TW370743 B TW 370743B TW 086112300 A TW086112300 A TW 086112300A TW 86112300 A TW86112300 A TW 86112300A TW 370743 B TW370743 B TW 370743B
- Authority
- TW
- Taiwan
- Prior art keywords
- bit
- entropy code
- bits
- output signal
- code word
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/40—Conversion to or from variable length codes, e.g. Shannon-Fano code, Huffman code, Morse code
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
Abstract
An entropy code look up table processes incoming data and provides an n-bit output signal having an entropy code word and a bit_length output signal. Entropy code words are successively packed without spacing bits into two sixteen-bit latches. An arithmetic unit keeps track of accumulated sizes of packed, unconveyed entropy code words. The n-bit output signal is converted into a thirty-two bit signal with spacing bits on either side of a current entropy code word. Using the accumulated size information, flow through multiplexer units insert spacing bits in bit positions corresponding to bit positions currently occupied by packed entropy code words. Any remaining bits in the thirty-two bit output signal are preferably set to logical zeros. With the current entropy code word properly aligned in the thirty-two bit output signal, a path selection logic unit utilizes the accumulated size information and an unary decoder to form a sixteen bit output signal. Previously packed entropy code word(s) occupy the most significant bit(s). The remaining bit(s) are set to logical values of the current entropy code word most significant bits. These sixteen bits are written into a selected latch, and the thirty-two bit output signal least significant sixteen bits are written into the other latch. The arithmetic unit determines the number unconveyed, packed entropy code word bits. If the number is greater than fifteen, at least one of the latches is full. This number is used by the path selection logic unit to properly select the most significant latch.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/731,338 US5781134A (en) | 1996-10-18 | 1996-10-18 | System for variable length code data stream position arrangement |
Publications (1)
Publication Number | Publication Date |
---|---|
TW370743B true TW370743B (en) | 1999-09-21 |
Family
ID=24939083
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086112300A TW370743B (en) | 1996-10-18 | 1997-08-27 | System for variable length code data stream position arrangement |
Country Status (4)
Country | Link |
---|---|
US (1) | US5781134A (en) |
JP (1) | JP3488058B2 (en) |
KR (1) | KR100227273B1 (en) |
TW (1) | TW370743B (en) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6192073B1 (en) * | 1996-08-19 | 2001-02-20 | Samsung Electronics Co., Ltd. | Methods and apparatus for processing video data |
US6347344B1 (en) * | 1998-10-14 | 2002-02-12 | Hitachi, Ltd. | Integrated multimedia system with local processor, data transfer switch, processing modules, fixed functional unit, data streamer, interface unit and multiplexer, all integrated on multimedia processor |
KR100354768B1 (en) | 2000-07-06 | 2002-10-05 | 삼성전자 주식회사 | Video codec system, method for processing data between the system and host system and encoding/decoding control method in the system |
US6707398B1 (en) * | 2002-10-24 | 2004-03-16 | Apple Computer, Inc. | Methods and apparatuses for packing bitstreams |
US6707397B1 (en) * | 2002-10-24 | 2004-03-16 | Apple Computer, Inc. | Methods and apparatus for variable length codeword concatenation |
KR100561464B1 (en) * | 2003-07-29 | 2006-03-16 | 삼성전자주식회사 | Apparatus and method for variable length coding |
WO2006033060A1 (en) * | 2004-09-20 | 2006-03-30 | Koninklijke Philips Electronics N.V. | Programmable data processor for a variable length encoder/decoder |
KR100659725B1 (en) * | 2005-12-09 | 2006-12-19 | 한국전자통신연구원 | Apparatus and method for transmitting and apparatus and method for receiving of multiple antenna system |
US8031953B2 (en) * | 2007-10-18 | 2011-10-04 | Himax Technologies Limited | Method and device for encoding image data with a predetermined compression rate in one pass |
KR101175680B1 (en) | 2008-12-23 | 2012-08-22 | 광운대학교 산학협력단 | Driving method of bitstream processor |
US10075234B2 (en) * | 2014-03-25 | 2018-09-11 | Osram Sylvania Inc. | Techniques for emitting position information from luminaires |
KR102243119B1 (en) * | 2019-07-17 | 2021-04-21 | 한양대학교 산학협력단 | Quantization apparatus and method using numerical representation with dynamic precision |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03106127A (en) * | 1989-09-20 | 1991-05-02 | Fujitsu Ltd | Variable length coding circuit |
US5321398A (en) * | 1991-09-27 | 1994-06-14 | Sony Corporation | Variable length coder and data packing circuit |
-
1996
- 1996-10-18 US US08/731,338 patent/US5781134A/en not_active Expired - Lifetime
-
1997
- 1997-06-09 KR KR1019970023565A patent/KR100227273B1/en not_active IP Right Cessation
- 1997-08-27 TW TW086112300A patent/TW370743B/en not_active IP Right Cessation
- 1997-10-07 JP JP27484797A patent/JP3488058B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP3488058B2 (en) | 2004-01-19 |
KR100227273B1 (en) | 1999-11-01 |
JPH10135842A (en) | 1998-05-22 |
US5781134A (en) | 1998-07-14 |
KR19980032156A (en) | 1998-07-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |