TW360928B - A circuit and method for reducing the effects of parasitic capacitances in integrated resistors - Google Patents

A circuit and method for reducing the effects of parasitic capacitances in integrated resistors

Info

Publication number
TW360928B
TW360928B TW086113189A TW86113189A TW360928B TW 360928 B TW360928 B TW 360928B TW 086113189 A TW086113189 A TW 086113189A TW 86113189 A TW86113189 A TW 86113189A TW 360928 B TW360928 B TW 360928B
Authority
TW
Taiwan
Prior art keywords
layer
circuit
effects
reducing
parasitic capacitances
Prior art date
Application number
TW086113189A
Other languages
Chinese (zh)
Inventor
Wing Chung Vincent Leung
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to SG9703057A priority Critical patent/SG87761A1/en
Priority claimed from SG9703057A external-priority patent/SG87761A1/en
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of TW360928B publication Critical patent/TW360928B/en

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)

Abstract

An electronic circuit (30) on a semiconductor chip includes a resistor (31) formed by a resistance layer formed over an insulating layer (34) formed over a first cancellation layer (32). A duplicating circuit is coupled to duplicate an ac input signal (Vin), which is applied to the resistor (31) and injects the duplicated signal into the cancellation layer (32) below the resistor (31) so as to minimise the potential difference and therefore the effects of the parasitic capacitance (35) between the resistance layer and the resistance layer and the cancellation layer.
TW086113189A 1997-08-27 1997-09-11 A circuit and method for reducing the effects of parasitic capacitances in integrated resistors TW360928B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SG9703057A SG87761A1 (en) 1997-08-27 1997-08-27 A circuit and method for reducing the effects of parasitic capacitances in integrated resistors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG9703057A SG87761A1 (en) 1997-08-27 1997-08-27 A circuit and method for reducing the effects of parasitic capacitances in integrated resistors

Publications (1)

Publication Number Publication Date
TW360928B true TW360928B (en) 1999-06-11

Family

ID=57940717

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086113189A TW360928B (en) 1997-08-27 1997-09-11 A circuit and method for reducing the effects of parasitic capacitances in integrated resistors

Country Status (1)

Country Link
TW (1) TW360928B (en)

Similar Documents

Publication Publication Date Title
DE68916373D1 (en) ASSEMBLY AND EXTENSION DEVICE FOR PRINTED CIRCUITS FOR ELECTRONIC ARRANGEMENTS.
TW336348B (en) Integrated circuit having a dummy structure and method of making the same
FR2521780B1 (en) INTEGRATED CIRCUIT DEVICE HAVING AN INTERNAL DAMPING MEANS FOR TRANSIENT SIGNALS WITH A PLURALITY OF POWER SUPPLY SOURCES
WO1990016079A3 (en) Low impedance packaging
TW346683B (en) Semiconductor device and process for producing the same
EP0763967A3 (en) Multi-layered printed wiring board
DE69226098D1 (en) Local contact connections for integrated circuits
US5453713A (en) Noise-free analog islands in digital integrated circuits
TW331036B (en) Integrated circuit functionality security
KR970049358A (en) Apparatus and method for removing offset signal from electrostatic digitizing tablet
DE69210063D1 (en) Integrated semiconductor circuit unit with detection circuit for substrate potential
DE69016962D1 (en) Dynamic isolation circuit for integrated circuits.
DE69420492D1 (en) Semiconductor circuit component with reduced influence of parasitic capacitances
DE69009815D1 (en) Multi-layer capacitor for surface mounting technology and printed circuit with such multi-layer capacitors.
TW373256B (en) A semiconductor device having discontinuous insulating regions and the manufacturing method thereof
DE3567770D1 (en) Method for producing electronic circuits based on thin layers transistors and capacitors
SE9603863L (en) Body and method of mounting electronics
WO1998022895A3 (en) Method and apparatus for making an electrical circuit having an rlcg line
DE3685931D1 (en) ARRANGEMENT OF LOGICAL CIRCUITS FOR HIGHLY INTEGRATED CIRCUIT.
DE69030223D1 (en) Stacked multi-layer substrate for mounting integrated circuits
TW345742B (en) Method for producing integrated circuit capacitor
MY125061A (en) Method for plating a bond finger of an integrated circuit package
DE3483455D1 (en) METHOD FOR SELF-HEALING HIGHLY INTEGRATED CIRCUITS AND SELF-HEALING HIGHLY INTEGRATED CIRCUIT.
DE69616130D1 (en) Circuit board with low expansion coefficient for testing integrated circuits
KR970700941A (en) A substrate and method for connecting an integrated circuit to another substrate by balls