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Application filed by Acer Labs IncfiledCriticalAcer Labs Inc
Priority to TW086104206ApriorityCriticalpatent/TW357291B/en
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Publication of TW357291BpublicationCriticalpatent/TW357291B/en
A sort of cache memory projection method, for application on the reading from a cache memory to a primary memory, where the main memory and the cache memory having respectively 2m and 2n bytes, being m > n and m, n a natural number, including the projection method the following steps: (a) receiving an address code read by the primary memory, being the address code from Most Significant Bit (MSB) Am to Least Significant Bit (LSB) Al being formed by m bits, to represent the address of one bit in the 2m bits; (b) removing of the m-n bits in the address code as a tag, which is used for determination whether the data represented by the primary memory address code to be read is stored in the cache memory and the m-n bits being formed by the plurality of non-neighboring bits in the address code.
TW086104206A1997-03-281997-03-28Cache memory projection device and method
TW357291B
(en)
A method for converting information words and producing a storage medium, a device for storing device information, a signal storage medium and a decoding device
Private key generator for access to storage device e.g. chip card, has page pre-key calculating device and determines private key based on pre-key and word address