TW356533B - Method and system for autonomously operating a PCI-serial bus interface device circuit of a packetized data communications interface device - Google Patents

Method and system for autonomously operating a PCI-serial bus interface device circuit of a packetized data communications interface device

Info

Publication number
TW356533B
TW356533B TW086105594A TW86105594A TW356533B TW 356533 B TW356533 B TW 356533B TW 086105594 A TW086105594 A TW 086105594A TW 86105594 A TW86105594 A TW 86105594A TW 356533 B TW356533 B TW 356533B
Authority
TW
Taiwan
Prior art keywords
interface device
transfer device
pci
serial bus
data communications
Prior art date
Application number
TW086105594A
Other languages
English (en)
Inventor
Richard T Baker
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of TW356533B publication Critical patent/TW356533B/zh

Links

Landscapes

  • Small-Scale Networks (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Multi Processors (AREA)
  • Communication Control (AREA)
TW086105594A 1996-04-30 1997-11-14 Method and system for autonomously operating a PCI-serial bus interface device circuit of a packetized data communications interface device TW356533B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US1651896P 1996-04-30 1996-04-30

Publications (1)

Publication Number Publication Date
TW356533B true TW356533B (en) 1999-04-21

Family

ID=21777543

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086105594A TW356533B (en) 1996-04-30 1997-11-14 Method and system for autonomously operating a PCI-serial bus interface device circuit of a packetized data communications interface device

Country Status (3)

Country Link
JP (1) JP3967792B2 (zh)
DE (1) DE69739015D1 (zh)
TW (1) TW356533B (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114137940B (zh) * 2021-11-29 2024-03-12 卡斯柯信号有限公司 根据区间运行方向自动开关区间占用逻辑检查的方法

Also Published As

Publication number Publication date
DE69739015D1 (de) 2008-11-13
JP3967792B2 (ja) 2007-08-29
JPH1093598A (ja) 1998-04-10

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees