TW348296B - Method for forming contact hole in semiconductor device - Google Patents

Method for forming contact hole in semiconductor device

Info

Publication number
TW348296B
TW348296B TW085114526A TW85114526A TW348296B TW 348296 B TW348296 B TW 348296B TW 085114526 A TW085114526 A TW 085114526A TW 85114526 A TW85114526 A TW 85114526A TW 348296 B TW348296 B TW 348296B
Authority
TW
Taiwan
Prior art keywords
contact hole
semiconductor device
forming contact
forming
gas
Prior art date
Application number
TW085114526A
Other languages
Chinese (zh)
Inventor
Seok Lee Byung
Usams Jeong Ei
Seok Song Il
Jung Lee Hae
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1019950050877A external-priority patent/KR100226216B1/en
Priority claimed from KR1019950050895A external-priority patent/KR970052258A/en
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Application granted granted Critical
Publication of TW348296B publication Critical patent/TW348296B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)

Abstract

A method for forming a contact hole of semiconductor device, which comprises the following steps: forming an interlayer insulating film; and admitting a mixed gas of a fluorocarbon based gas and a carbon oxide based gas into an etching process chamber into which an etching gas to etch the interlayer insulating film is injected so that a contact hole is formed, preventing a portion of an exposed semiconductor substrate through the contact hole from being damaged.
TW085114526A 1995-12-16 1996-11-25 Method for forming contact hole in semiconductor device TW348296B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019950050877A KR100226216B1 (en) 1995-12-16 1995-12-16 Method for forming a contact hole of semiconductor device
KR1019950050895A KR970052258A (en) 1995-12-16 1995-12-16 Method of forming fine contact hole in semiconductor device

Publications (1)

Publication Number Publication Date
TW348296B true TW348296B (en) 1998-12-21

Family

ID=26631486

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085114526A TW348296B (en) 1995-12-16 1996-11-25 Method for forming contact hole in semiconductor device

Country Status (4)

Country Link
JP (1) JPH09186144A (en)
DE (1) DE19651776A1 (en)
GB (1) GB2308232A (en)
TW (1) TW348296B (en)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5302240A (en) * 1991-01-22 1994-04-12 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US5445712A (en) * 1992-03-25 1995-08-29 Sony Corporation Dry etching method
JP3253215B2 (en) * 1993-03-31 2002-02-04 東京エレクトロン株式会社 Etching method and etching apparatus
JP3301157B2 (en) * 1993-05-06 2002-07-15 ソニー株式会社 Dry etching method
JP2720763B2 (en) * 1993-09-17 1998-03-04 日本電気株式会社 Method for manufacturing semiconductor device
US5399237A (en) * 1994-01-27 1995-03-21 Applied Materials, Inc. Etching titanium nitride using carbon-fluoride and carbon-oxide gas

Also Published As

Publication number Publication date
GB2308232A (en) 1997-06-18
GB9626111D0 (en) 1997-02-05
DE19651776A1 (en) 1997-06-19
JPH09186144A (en) 1997-07-15

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees