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Application filed by Taiwan Semiconductor Mfg Co LtdfiledCriticalTaiwan Semiconductor Mfg Co Ltd
Priority to TW086105883ApriorityCriticalpatent/TW347551B/en
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Publication of TW347551BpublicationCriticalpatent/TW347551B/en
A lot dispatching method for use in manufacturing a semiconductor integrated circuit device, in which n pending work-in-progress (WIP) lots are waiting to undergo a succeeding process while m preceding WIP lots are undergoing a preceding process, n and m being integers greater than zero, the method comprising: determining an average process time T of the succeeding process; determining a number of allowable lots k of the m lots undergoing the preceding process, the sum of n and k being no greater than a maximum batch size B of the succeeding process; determining an allowable waiting time for the k allowable lots, in which the allowable waiting time dependent on an average time per lot for a batch run of the succeeding process; and dispatching the n pending lots into the succeeding process when the succeeding process becomes available if, at the time the succeeding process becomes available, the m lots from the preceding process are expected to arrive at the succeeding process after a waiting time that is greater than the determined allowable waiting time.
TW086105883A1997-05-021997-05-02Method and apparatus for dispatching lots in a factory
TW347551B
(en)