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Application filed by Soyo Comp IncfiledCriticalSoyo Comp Inc
Priority to TW086107449ApriorityCriticalpatent/TW340204B/en
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Publication of TW340204BpublicationCriticalpatent/TW340204B/en
An enhanced memory device, which mainly comprises a second enhanced memory controller set connected behind the CPU for controlling an enhanced DRAM set, in which the device and the original memory system form a parallel processing architecture for effectively increasing the access efficiency of the memory system.