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Application filed by Taiwan Semiconductor Mfg Co LtdfiledCriticalTaiwan Semiconductor Mfg Co Ltd
Priority to TW086111911ApriorityCriticalpatent/TW331031B/en
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Publication of TW331031BpublicationCriticalpatent/TW331031B/en
A producing method for buried contact of IC, by forming shallow trench on semiconductor substrate, and filling SiO2 into shallow trench as insulating layer of IC, then covering gate oxide and separating polysilicon layer on insulating surface. The gate oxide covers on semiconductor substrate surface, and the separating polysilicon layer covers on whole IC surface. The producing method includes following steps: a. Define photoresist on surface, remove portion of gate oxide, separating polysilicon and SiO2 material, define buried contact of IC, and form trench on SiO2 material as buried contact; b. Proceed isotropic etching, etch photoresist layer located at both sides of buried contact, to form photoresist with larger contact; c. Proceed large angle ion implantation, proceed ion implantation for buried contact region, and form doping region on semiconductor substrate; d. Deposit polysilicon to cover on IC surface as gate polysilicon; e. Deposit silicide to cover on polysilicon surface as gate silicide; f. Remove portion of gate oxide, separating polysilicon, polysilicon and silicide layer, and define the gate of IC.
TW086111911A1997-08-201997-08-20The producing method for buried contact of IC
TW331031B
(en)
Semiconductor device having device isolation structure for prevention of narrow width effect by channel stop ion implantation and manufacturing method thereof