TW331027B - Method for improving defects in metal process for integrated circuits - Google Patents

Method for improving defects in metal process for integrated circuits

Info

Publication number
TW331027B
TW331027B TW086111417A TW86111417A TW331027B TW 331027 B TW331027 B TW 331027B TW 086111417 A TW086111417 A TW 086111417A TW 86111417 A TW86111417 A TW 86111417A TW 331027 B TW331027 B TW 331027B
Authority
TW
Taiwan
Prior art keywords
chip
integrated circuits
metal
dielectric layer
improving defects
Prior art date
Application number
TW086111417A
Other languages
Chinese (zh)
Inventor
Bor-Jyh Sheu
Horng-Kuen Chen
Gwo-Chin Lin
Original Assignee
United Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Semiconductor Corp filed Critical United Semiconductor Corp
Priority to TW086111417A priority Critical patent/TW331027B/en
Application granted granted Critical
Publication of TW331027B publication Critical patent/TW331027B/en

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

A method for improving defects in metal process for integrated circuits includes the following steps: a. supply a chip on which a dielectric layer has already formed, where the dielectric layer has a via exposing a specific region of the chip and the via has multiple side walls; b. apply pre-metal-process etching on the chip; c. form a titanium nitride layer covering the dielectric layer, side walls of the via, and the specific region; d. apply a thermal annealing process; e. form a tungsten insert plug; f. scrub the edges of the chip; and g. form a metal wire layer covering the tungsten insert plug and the titanium nitride layer.
TW086111417A 1997-08-09 1997-08-09 Method for improving defects in metal process for integrated circuits TW331027B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW086111417A TW331027B (en) 1997-08-09 1997-08-09 Method for improving defects in metal process for integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW086111417A TW331027B (en) 1997-08-09 1997-08-09 Method for improving defects in metal process for integrated circuits

Publications (1)

Publication Number Publication Date
TW331027B true TW331027B (en) 1998-05-01

Family

ID=58262672

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086111417A TW331027B (en) 1997-08-09 1997-08-09 Method for improving defects in metal process for integrated circuits

Country Status (1)

Country Link
TW (1) TW331027B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11980752B2 (en) 2015-04-03 2024-05-14 Medtronic Xomed, Inc. System and method for omni-directional bipolar stimulation of nerve tissue of a patient via a surgical tool

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11980752B2 (en) 2015-04-03 2024-05-14 Medtronic Xomed, Inc. System and method for omni-directional bipolar stimulation of nerve tissue of a patient via a surgical tool

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees