TW304287B - Semiconductor apparatus and manufacturing method thereof - Google Patents

Abstract

A semiconductor apparatus features capacitor consisting of: (1) bottom plate formed on semiconductor substrate; (2) dielectric film formed on the bottom plate; (3) top plate formed on the dielectric film; in which main constituting component of at least one of the bottom plate or the top plate includes more than one kind of metal element, whose oxide or nitride has dielectric ratio larger than 20; or whose oxide or nitride is conductor.

Description

3〇4287

5. Description of the invention (1) The present invention relates to a semiconductor device and a manufacturing method thereof, in particular to how to prevent DRAM (Dynamic Random Access Memory) which uses a high-dielectric material in a dielectric film of a valley device, etc. ( Read the precautions on the back before filling this page) The structure and manufacturing method of the container with low dielectric constant. Generally speaking, the wiring system in a fine semiconductor device such as KDRAM contains various film capacitors. In DRAM, thin film capacitors must be provided to keep the charge of the museum number on the minute areas of each memory element. In order to increase the degree of integration of DRAM, the area of these film capacitors must be as small as possible, that is, the film capacitors must have a high capacity density. The capacity of the capacitor is proportional to the dielectric constant of the dielectric film. Therefore, the semiconductor manufacturing apparatus described in Japanese Patent Application Laid-Open No. 3_44〇19 uses a material with a higher dielectric constant, such as BaTi〇3, to manufacture a dielectric film for a capacitor, in order to achieve the height of a thin film capacitor Capacity density. In addition, in order to further achieve high integration of DRAM, it is necessary to adopt a multi-layer structure in which elements are interposed between interlayer insulating films and multi-layered. Du Printed by the Ministry of Economic Affairs, Central Bureau of Standards, and Consumer Cooperation. However, in the conventional film capacitors, the first point is that the leakage current caused by the defects in the dielectric film will cause the problem of low dielectric constant of the capacitor. That is, when applied to DRAM, etc., in order to achieve a high electrical capacity of the signal current even under a low voltage, and to prevent the escape of charges, the leakage current must be extremely low. In general, thinning the thickness of the dielectric film can increase the electrical capacity, but it will instead increase the leakage current from the complementary level in the layer. In order to reduce the trapping level in the layer and reduce the leakage current, slow dielectric heat treatment may be applied to high dielectric materials such as BaT103. However, in order to improve the characteristics in order to reduce the level of capture, the slow cooling heat treatment must be applied at a 600 MPa scale. The A7 B7 is printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Invention Instructions (2). (The above high-temperature process, when applied to DRAM, etc., may adversely affect the transistor formed on the lower part of the film capacitor. Also, even if the leakage current value obtained by such processing is still not small enough, it must be To further reduce the leakage current and increase the dielectric constant. Furthermore, in the case of thin film capacitors for semiconductor devices such as DRAM, when processing the thin films constituting the thin film capacitors, short-wavelength ultraviolet rays are used to form fine The photoresist pattern is based on this and can be processed finely after the thin film is etched. In the near future, the DRAM system with a 1G bit accumulation degree that will be realized in the near future is more finer than the conventional DRAM, and the minimum processing width The width should be less than 0.2 μπι. Conventional UV exposure is difficult to resolve such ultra-fine patterns, so it is necessary to use soft X-ray exposure with a shorter wavelength than synchrotron. However, due to every 1 X-ray The photon energy is extremely high, so the dielectric film of the formed thin film capacitor will be defective when irradiated, and as a result, the characteristics of the thin film capacitor will be The problem of degradation. Especially, the wiring is formed after the thin film capacitor in DRAM, etc., because the Aβ used in this wiring is a low melting point, when the wiring is processed by X-ray exposure technology, slow cooling heat treatment and other methods are used It is quite difficult to restore the characteristics of the thin film capacitor. The second point is that the platinum electrode is generally used as the lower electrode of the capacitor, but the material below the lower electrode of the capacitor will diffuse into the dielectric film through the lower electrode of the capacitor, resulting in The problem of the low dielectric constant of capacitors. Especially, in the multi-layer structure DRAM for the purpose of high integration, as shown in FIG. 69, in order to connect the lower electrode of the capacitor to the lower layer ------ --Personal clothing— (Please read the precautions on the back before filling in this page), \-° The paper ruler is not universal γ National Standard (CNS) A4 specification (21〇χ 297 Gongchu;) Central Bureau of Standards, Ministry of Economic Affairs & Bigong Consumer Cooperative Printed 9〇4287-V. Description of Invention (3) Continued, a contact plug (Plug) made of silicon must be provided under the lower electrode. However, Yu Xiangwen (≫ 35〇. ()), Since the constituent material of the contact plug, silicon, will diffuse into the dielectric film through the electrode, it will cause the problem of low dielectric constant of the capacitor. In order to prevent such high temperature treatment ( > 3 50C) diffusion of contact plugs, it was invented that, as shown in FIG. 70, a barrier layer Π for preventing diffusion of contact plug material is provided between the contact plug material Π and the capacitor lower electrode 14, but the barrier The formation of layer 3 will complicate the DRAM manufacturing process, so it is not an excellent solution. In addition, the third point is that, as mentioned above, platinum is generally used as the electrode material of the capacitor, although it is not easy to connect with the dielectric film. The interface formation reaction is wide. "Advantages, but on the other hand, due to the incompatibility of the lattice between the platinum electrode and the dielectric film, the interface between the platinum electrode and the dielectric film is prone to form an amorphous layer with a low dielectric constant. The problem of low dielectric constant. ^ The first object of the present invention is to provide an integrated circuit which includes a thin film capacitor with extremely low leakage current, and a manufacturing method thereof. The second object of the present invention is to provide an integrated circuit, which is particularly suitable for a DRAM with a multi-view structure. The film capacitor contained therein can prevent the low dielectric constant caused by the diffusion of the material from the lower electrode of the capacitor into the dielectric layer , And its manufacturing method. ★ The third object of the present invention is to provide an integrated circuit, which contains: a film capacitor using platinum electrodes and seeking to achieve lattice integration to prevent the low dielectric constant of the capacitor, and a manufacturing method thereof. ^ The results of the inventor's careful research, the first point is that by irradiating the dielectric film with X-rays at a low temperature (touch. 〇 under slow cooling heat treatment to replace L____ 6 ---- ί I-- (please read first-back Please pay attention to this matter and fill out this page) Order-.--·

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III Printed by the Employees ’Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 3〇04287 r-V. Description of the invention (4) Slow cooling heat treatment at a known high temperature (> 600 ° C), followed by preventing X-rays from irradiating the capacitor The dielectric film. The second point is that by using an electrode material other than platinum as the electrode material, the material under the electrode is not easily diffused through the electrode. The third point is that when a platinum electrode is used, by adjusting the lattice constant of the dielectric film to achieve integration with the platinum lattice constant, the above object is achieved to complete the present invention. That is, the present invention is provided in a semiconductor device including a capacitor lower electrode formed on a semiconductor substrate, a dielectric film formed on the capacitor lower electrode, and a capacitor upper electrode formed on the dielectric film layer Film capacitor. The structure of the first semiconductor device is characterized by irradiating the capacitor dielectric film with high energy. The dielectric film can achieve low defects through the above-mentioned high-energy irradiation treatment, suppress leakage current in the dielectric film, and prevent the dielectric constant of the capacitor from being reduced. Furthermore, the present invention is provided in a semiconductor device including a capacitor lower electrode formed on a semiconductor substrate, a dielectric film formed on the capacitor lower electrode, and a capacitor upper electrode formed on the dielectric film Film capacitor. The second semiconductor device structure is characterized in that at least one of the lower electrode or the upper electrode of the capacitor is a metal electrode, and the main constituent element contained in the metal electrode is more than one metal element, and the oxide or nitride of the metal element It is an insulating film with a specific dielectric ratio of 20 or more. Or at least one of the lower electrode or the upper electrode of the capacitor is a metal electrode, and the main constituent element contained in the metal electrode is one or more metal elements, and the oxide or nitride of the metal element has conductivity. In addition, the feature of the third semiconductor device structure of the present invention is that it is applicable to the Chinese county (CNS> M specification (210X297 Gongchu) at the size of 7 semiconducting papers ~~ —— (Please read the precautions on the back before filling in this Page) Printed by the Ministry of Economic Affairs, Central Bureau of Preservation and Employee's Consumer Cooperatives' * " 1 ----------- B7 _-__________ V. Description of invention (5) In the body device, it is formed on a semiconductor substrate The upper capacitor lower electrode, the capacitor dielectric film composed of a single crystal or polycrystalline film with a perovskjte structure formed on the lower electrode of the valley device, and the capacitor upper electrode formed on the capacitor dielectric film. At least one of the lower electrode or the upper electrode contains a metal or metal compound with a face-centered cubic structure, and the difference between the lattice constant of the metal or metal compound and the lattice constant of the capacitor dielectric film connected to the capacitor electrode is 2 %. By so keeping the difference between the lattice constant of platinum used as an electrode material and the dielectric film within 20/0, it can prevent The formation of a low-dielectric amorphous layer (dielectric 10-10) on the interface can prevent the low dielectric of the capacitor. In addition, the present invention includes a lower electrode, a dielectric film and an upper part In a method of manufacturing a semiconductor device of a thin film capacitor composed of electrodes, a capacitor lower electrode is formed on a semiconductor substrate, a dielectric film composed of a high dielectric material is formed on the lower electrode, and an upper electrode is formed on the dielectric film, The first method of manufacturing a semiconductor device may be a process of forming a thin film capacitor, that is, a process of irradiating the dielectric film with high energy after the formation of the dielectric film, and a process of performing slow cooling heat treatment after high energy irradiation. By irradiating the dielectric with high-energy rays such as x-rays in this way, quasi-stable defects can be introduced into the dielectric film with high dielectric constant, and then the defects and quasi-stable existing in the dielectric film can be removed by slow cooling heat treatment in oxygen The defects are offset, so compared with the conventional defect repair by simple slow cooling heat treatment, the film can be reduced more efficiently The shortcomings of the dielectric film can reduce the leakage current in the dielectric film, and the paper performance of 8 capacitors can be applied to the Chinese standard rate (CNS) A4 specification (21〇 < 297mm) I-m Is— 1 ^ 1 ^^ 1 ^^ 1 --- -'1 I nn I m Τ »^ 3 .- 'a (Please read the precautions on the back before filling this page) Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs A7 --------- ---- B7 5. Description of the invention (6) " ~ " ~~~ ~ Increased. Also, with the conventional knowledge, the high temperature required to remove defects in the dielectric ( > 600 C) In comparison, the slow cooling heat treatment temperature of the present invention is a low temperature (> Qiong 0 ° C), so it can effectively prevent the diffusion of the platinum electrode material into the dielectric sludge during the slow cooling heat treatment. In order to introduce quasi-stabilized defects into the dielectric film, it is preferable that the above-mentioned high-energy rays are irradiated with X-rays at 10 mj / cm2 or more. In addition, because the defects of the dielectric film can be offset by the quasi-stabilized defects introduced by the high-energy radiation, the slow cooling heat treatment system can be used for any gas containing oxygen or hydrogen. Under the atmosphere of the main elements, it is better to perform at 300 X: the above temperature. In addition, the present invention relates to a semiconductor device with a thin film capacitor, in which the thin film capacitor is composed of a lower electrode formed on a semiconductor substrate, a dielectric film formed of a high dielectric material formed on the lower electrode, and a dielectric film formed on the The upper electrode on the dielectric film is formed. Furthermore, the structure of the first semiconductor device may be such that an X-ray absorber thin film is formed above the upper electrode. The formation of the X-ray absorber thin film can prevent the X-rays from irradiating the dielectric film after the capacitor is formed, so that the defects caused by the X-rays can be suppressed, thus preventing the increase in leakage current in the dielectric film. Capacitor performance is reduced. In the above X-ray absorber thin film, the product of the absorption coefficient of the constituent material and the film thickness is 1 or more, so the influence of X-rays can be effectively prevented. In addition, the first semiconductor device of the present invention may have a structure including a lower electrode formed on a semiconductor substrate, a dielectric film formed of a high dielectric material formed on the lower electrode, and a dielectric formed on the dielectric The size of the paper on the film is applicable to China National Standard (CNS) A4 (210X297mm) (Please read the notes on the back before filling this page) 袈. 5. Description of the invention (7) In the semiconductor of the thin film capacitor composed of the upper electrode, the upper electrode contains at least one of the main constituent elements selected from iridium, button, and platinum, and its film thickness is 200 nm or less. Below 600nm. Since the upper electrode of this structure has the function of the X-ray absorption film, the X-rays irradiated to the dielectric film of the thin film capacitor can be reduced, so that the characteristic deterioration due to the leakage current of the thin film capacitor can be prevented. In addition, in the semiconductor device structure of the present invention, at least one of the lower electrode or the upper electrode of the capacitor is composed of platinum, and a trace amount selected from palladium (Pd), ruthenium (RU), and baht (Re) At least one or more of the elements. By adding trace amounts of this element, it has the best adhesion between the electrode and the dielectric film compared with the electrode composed of platinum only. In the present invention, a protective film made of a metal oxide or nitride is formed on at least one of the lower electrode or upper electrode of the capacitor in contact with the dielectric film and the surface not in contact with the dielectric film. Therefore, during the heat treatment after the capacitor is formed, the diffusion of water from the interlayer insulating film to the capacitor can be prevented. Furthermore, between at least one of the lower electrode or the upper electrode and the dielectric film, a diffusion preventing film made of a metal oxide or a metal nitride may be formed. The thickness of the diffusion preventing film is preferably 20 nm or less. This prevents the electrode components from diffusing toward the dielectric film. The diffusion prevention film is preferably an insulator having a dielectric ratio of 20 or more, or having conductivity. In the structure of the above third semiconductor device, BaTiO, SiTi03, PbTi03, CaTiO: ^ is used as the capacitor dielectric film, but when the paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) ^^^ 1 ^^^^ 1 ^^^^ 1 n ^ il ml vn — ^ i «l ^ tm I 1 ^ —nm ^ i nn aaJ (read the notes on the back of the spectrum before filling in this page) A7 The Bureau of Standards and Staff ’s consumer cooperation du printed five. Description of the invention (8) When the main component of the lower electrode of the capacitor is platinum, palladium and other precious metals, the average crystal grain size along the main surface of the capacitor dielectric film is 10nm ~ 10 〇nm is preferred. In this way, the leakage current in the dielectric film can be reduced by making the average value of the capacitor dielectric multi-layer bright layer known to be 〇nrn ~ ι〇〇ηπι. For example, when BaTi〇3 and SrTi〇3 are used (FIG. 10), a predetermined effect can be obtained when the crystal particle size is 60 nm or less. Furthermore, in the structure of the third semiconductor device described above, the capacitor dielectric film may be formed by stacking at least two layers in the thickness direction, and silicon oxide or nitride may be located near the corners or side surfaces of the lower electrode between the layers. The structure of silicon and other insulating films. With this structure, the leakage current can be prevented without hindering the adhesion between the subsequent electrode and the dielectric film layer. Furthermore, in the structure of the third semiconductor device, at least one of the lower electrode or the upper electrode of the capacitor may have a structure formed of platinum electrodes. In the structure of the third semiconductor device, the capacitor dielectric film may be two or more metal oxide solid solutions having a perovskite structure. According to this, the lattice integration between the capacitor electrode material and the dielectric material can be easily achieved. Furthermore, at least one of the lower electrode or the upper electrode of the capacitor may be an alloy having two or more metal elements. Furthermore, the valley dielectric film formed on the lower electrode of the capacitor is composed of a first capacitor dielectric film having a perovskite crystal structure and a second capacitor dielectric having a perovslate crystal structure formed on the first capacitor dielectric film It is composed of a film, and the lattice constant of the dielectric film of the first capacitor can be between the lower electrode of the capacitor and the 11th paper size. The Chinese National Standard (CNS) A4 specification (2! 〇χ297 mm) is applicable (please read the back Matters needing attention before filling this page) II ..

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.: I Printed A7 — I ——β 7 in the consumer cooperation of the Central Bureau of Standards of the Ministry of Economy V. Description of the invention ("~~~~~~ ''-The lattice constant in the middle of the dielectric film of the two capacitors. It is easy to seek the lattice integration between the electrode material of the valley device and the dielectric material. Furthermore, the semiconductor mounting structure of the present invention can also be one where the surface of the capacitor lower electrode is roughened. By making the surface of the capacitor lower electrode rough Compared with the conventional ones with a flat surface, the area of the capacitor can be increased, so that the characteristics of the capacitor can be improved. Furthermore, the present invention can also be a method of manufacturing a semiconductor device that roughens the surface of the lower electrode of the capacitor. A simple method for forming the capacitor lower electrode with the surface roughened may be a method of engraving the surface of the capacitor lower electrode by residual etching, or a method of heating the capacitor lower electrode, or may be much roughened on the surface A method for forming a lower electrode of a capacitor on a crystalline silicon layer. In the structure of the semiconductor device of the present invention, the lower electrode of the capacitor may be provided on the lower electrode In the trench, the buried trench of the lower electrode is a trench-shaped portion formed by etching a part of the upper layer of the interlayer insulating film provided on the semiconductor substrate. By adopting this structure, it is possible to seek what happens between adjacent memory cells The reduction of parasitic capacitance is provided by the process of etching the upper surface of the semiconductor substrate to form a trench for embedding the lower electrode, and the process of disposing a conductive material in the opening, provided on the surface of the interlayer insulating film and the trench for embedding the lower electrode The project of the capacitor lower electrode material, by reducing the thickness of the surface portion of the capacitor lower electrode material so that the formation of the lower electrode is a project in which the capacitor electrode material remains only in the buried trench of the lower electrode, on the capacitor lower electrode Form the capacitor dielectric film first, and then form the upper electrode of the capacitor. This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (installed-(please read the precautions on the back before filling this page). Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs ^ A7 -------------- Β7 V. Description of Invention (10) '' Engineering The method can easily provide the above-mentioned embedded structure. In addition, the structure of the semiconductor device of the present invention can be one in which an insulating film is embedded between the electrode side surfaces of the plurality of capacitor lower electrodes. With such a plurality of capacitor lower electrodes The electrodes are buried between the sides, which can reduce the parasitic capacitance generated between adjacent memory cells. Through the process of forming a plurality of capacitor lower electrodes on the semiconductor substrate, an insulation like covering the capacitor lower electrodes is formed Film process, the process of exposing the upper surface of the lower electrode of the capacitor by reducing the thickness of the insulating film, and forming the capacitor dielectric film on the insulating film between the lower electrode of the capacitor on the exposed upper surface and then forming the upper part of the capacitor The electrode engineering method can simply provide the structure in which the insulating film is buried between the electrode side surfaces of the lower electrode of the capacitor. In addition, by forming a plurality of capacitor lower electrodes with a protective film on the semiconductor substrate, forming an insulating film such as covering the protective film and the lower electrode of the capacitor, the lower part of the capacitor is protected by the protective film The method of reducing the thickness of the insulating film on the protective film to expose the surface of the protective film and forming the capacitor dielectric film on the lower electrode of the capacitor and the insulating film and then forming the upper electrode of the capacitor can also be simple It provides a structure in which an insulating film is buried between the side surfaces of the lower electrode of the capacitor. In particular, since the protective film is used to protect the upper surface of the electrode in the process of this method, the damage to the surface of the electrode can be reduced in the process of processing. In addition, by forming a plurality of capacitor lower electrode projects on a semiconductor substrate and selectively forming an extrinsic paper scale outside the capacitor lower electrode, the Chinese National Standard (CNS) A4 specification (210X297 mm) is applied --- -n I-I ^ Good —-I II _ _ T (Please read the precautions on the back before filling this page) A7 B7 du printed by the Consumer Standards Bureau of the Ministry of Economic Affairs, Consumer Cooperation V. Invention description (11) The method and the method of forming the capacitor dielectric film on the capacitor lower electrode and the insulating film first, and then forming the capacitor upper electrode can also provide a structure in which an insulating film is embedded between the electrode side surfaces of the capacitor lower electrode. Furthermore, the dielectric constant of the plurality of capacitor dielectric films formed on the semiconductor substrate of the present invention may be different between the insulating film between the electrodes of the lower electrode of the capacitor and the upper electrode of the capacitor. In this structure, since the capacitors are separated by an interlayer insulating film with a low dielectric constant, the parasitic capacitance between the capacitors can be reduced. In particular, the present invention is provided with a capacitor lower electrode formed on a semiconductor substrate and having an interlayer insulating layer having an opening on the surface reaching the semiconductor substrate, and electrically conducting with the main surface of the semiconductor substrate through the opening, In a multilayered semiconductor device such as a capacitor dielectric film formed on the lower electrode of the capacitor and the upper electrode of the capacitor, a gate electrode of the transistor provided on the semiconductor substrate is provided with a gate electrode that can protect the gate electrode , And the transistor used as the protective insulating film for the function of the protective film in the process of forming the above-mentioned openings in the interlayer insulating film, some or all of the protective insulating film are any of metal acid salts, oxide buttons and oxide oxides Constituted by one. By providing a protective insulating layer functioning as a protective layer on the surface of the semiconductor substrate at the bottom of the opening, the semiconductor surface at the bottom of the opening can be prevented from being damaged during the manufacturing process of the semiconductor device, so the reduction of the parasitic capacitance due to the damage can be sought . In the process of forming an opening with an interlayer insulating film on the semiconductor substrate on the main surface of the semiconductor substrate, a half-size paper ruler is provided as the bottom of the opening ^ National Standard (CNS) A4 specification (-21〇χ 297 public illusion --I n-II-If IIII 丁 m3, t (please read the notes on the back before filling in this page) ^ 04287 V. Description of invention (12 Insulating film of protective film function on the surface of the conductor substrate, and on the insulating film In a semiconductor device provided with a gate electrode transistor, a part or all of the insulating film is preferably any one of a metal titanate, an oxide button, and titanium oxide. By having a semiconductor substrate and an interlayer insulating film The insulating film formed by any one of metal titanate, bismuth oxide, and titanium oxide on the upper or lower layer of the gate electrode of the transistor formed on the substrate, by using the insulating film as a semiconductor The etching protection film on the surface of the substrate and the process of forming an opening in the interlayer insulating film provided on the insulating film, the process of removing the insulating film at the bottom of the opening after the opening is formed, and through the opening The formation process of the capacitor lower electrode for electrical conduction of the semiconductor substrate and the process of forming the capacitor dielectric film on the capacitor lower electrode and then forming the capacitor upper electrode can easily provide the above-described multilayered semiconductor device structure. The embodiment of the present invention will be described with reference to the drawings. In addition, the same symbol indicates the same or corresponding parts. Embodiment 1 FIG. 1 is a partial cross-sectional view of a dram in the first embodiment of the present invention. In FIG. 1, Printed on P-type semiconductor substrate 101, field oxide film 102, and transferred to the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs m 'nnn-nm ^ n n ----— i ____. D, T (Please read the notes on the back first (Refill this page) Gate transistor 103a, 03b, N-type impurity field 106a, 106b, channel collar 121, gate insulating film i〇5, gate electrode i〇4a, l04b, oxide film 107, buried The structure of the lower part of the capacitor, such as the bit line 108, the insulating layer 109, the first interlayer insulating film 110, the contact hole 110a, and the contact plug 111, is the same as conventional ones. Furthermore, the second interlayer insulating film 117 on the upper part of the capacitor , Section An aluminum wiring layer 118, a protective film 119, an aluminum wiring layer 120, etc. are also in accordance with conventional knowledge. This paper standard is applicable to the Chinese National Standard (CNS) A4 specification (210 > A7 B7 5. The description of the invention (13) is the same. In the DRAM of this embodiment, the conventional upper platinum is replaced by an alloy of hafnium 80 atm% and button 20 atm% to form a capacitor upper electrode 216 and a capacitor lower electrode 214. Each electrode layer is used The alloy target is formed by sputtering in argon. The film thickness of the lower electrode film of the capacitor is preferably 30 to 150 nm, and the film thickness of the upper electrode film of the capacitor is preferably 40 to 200 nm. The capacitor dielectric film is formed by sol method after forming BaTi03 film, and then heat treated in oxygen at 400 ~ 700 ° C to crystallize it. The etching process of the electrode film and the capacitor dielectric film is performed according to the reactive ion etching method. In this embodiment, since the capacitor electrode is replaced by the hafnium 80atm% and button atm% alloys, the conventional platinum is used, so that the processing during reactive ion etching is easier. In addition, since heat treatment is performed to crystallize the dielectric film of the capacitor, no interfacial low-dielectric layer such as an oxide film is formed, so stable and stable capacitor characteristics with high reliability can be realized. Embodiment 2 FIG. 2 is a partial cross-sectional view of a DRAM according to a second embodiment of the present invention. 0 In this embodiment, a button 80 atm% and titanium 20 atm% alloy is used to replace the conventional platinum to form a capacitor upper electrode 316 and a capacitor lower electrode 314 . Each electrode film is formed by sputtering using an alloy target in argon gas. The film thickness of the lower electrode film of the capacitor is preferably 300 to 1500 A, and the film thickness of the upper electrode film of the capacitor is preferably 400 to 2000 A.

Capacitor dielectric film 315 is used in accordance with CVD method at 400 ~ 600 ° C 16 The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) n ^^^ 1 j I- 1 ^ 1 —1 -I f taxi Ww —11 nn (please read the precautions on the back before filling in this page) A7 B7 printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs V. The invention description (14) forms SrTi〇3 film under oxygen. The electrode film and capacitor dielectric film are etched by reactive ion etching. In this DRAM, since the conventional platinum is replaced with tantalum 80 atm% and titanium atm% alloys to form capacitor electrodes, the processing during reactive ion etching is easier. Furthermore, due to the high temperature generated by the capacitor dielectric film, at the interface between the capacitor lower electrode and the capacitor dielectric film, an extremely thin reaction layer is generated due to the oxidation of the capacitor lower electrode. However, the obtained capacitance is the same as when platinum is used, that is, although an oxide film of an electrode material is formed, it does not cause a decrease in the dielectric constant of the capacitor, so that the effect of the present invention can be confirmed. Embodiment 3 FIG. 3 is a partial cross-sectional view of a DRAM according to a third embodiment of the present invention. In the DRAM of this embodiment, the conventional platinum is replaced by an alloy of 80atm% ruthenium and 20atm% palladium to form the capacitor upper electrode 416 and the capacitor lower electrode 414. The electrode film is formed by sputtering using an alloy target in argon gas. The film thickness of the lower electrode film of the capacitor is preferably 30 to 150 nm, and the film thickness of the upper electrode film of the capacitor is preferably 40 to 200 nm. After forming the BaTi03 film by the sol method, the capacitor dielectric film is crystallized by performing heat treatment in 400 ~ 700 ° C oxygen. The electrode film and capacitor dielectric film are etched by reactive ion etching. In this DRAM, the alloy of ruthenium 80atm% and palladium 20atm% is used to replace the conventional platinum to form the electrode of the capacitor, so that the processing during reactive ion etching is easier to perform. In addition, due to the implementation, 17 paper sheets of capacitor dielectric film can be applied to China National Standard Falcon (CNS) A4 specification (210X 297mm) ....... ί — ^ ϋ I----I— ^ ^ 1 I · Shi 11-«-— II 1. \ = ° (Please read the precautions on the back before filling this page)

The Ministry of Economic Affairs, Central Bureau of Standards, Industrial and Consumer Cooperatives prints the heat treatment for crystallization, so that no low-dielectric layers such as oxide films are produced at the interface, so stable and reliable capacitor characteristics can be achieved. Embodiment 4 FIG. 4 is a partial cross-sectional view of a DRAM according to a fourth embodiment of the present invention. In this DRAM, the conventional platinum is replaced with iridium to form the capacitor upper electrode 516 and the capacitor lower electrode 514. The formation of each electrode film was carried out by a sputtering method using the target substance in argon gas. The film thickness of the lower electrode of the capacitor is preferably 30 to 150 nm, and the film thickness of the upper electrode of the capacitor is preferably 40 to 200 nm. For the capacitor dielectric film, the SrTi〇3 film will be formed by CVD under 400 ~ 600 oxygen. The electrode film and capacitor dielectric film are etched by reactive ion etching. In this DRAM, since the conventional platinum is replaced with iridium to form the capacitor electrode, the processing during reactive ion etching is easier to perform. In addition, due to the heat treatment performed to crystallize the capacitor dielectric film, the interface between the capacitor lower electrode and the capacitor dielectric film produces an extremely thin reaction layer due to the oxidation of the capacitor lower electrode, but the resulting capacitance is the same as when platinum is used. That is, although an oxide film or the like of the electrode material will be formed, it will not cause a decrease in the dielectric constant of the capacitor, so that the effect of the present invention can be confirmed. Embodiment 5 Fig. 5 is a sectional view of a portion of a dram in a fifth embodiment of the present invention. 18 The size of this paper is applicable to the Chinese National Standard (CNS) A4 specification (2ί〇χ297mm) ------------------------------ -------- 7 Please read the precautions on the back before filling in this page) A7 5. Description of the invention (16) In the DR AM of this embodiment, use the right to add the right, handle, and knives to platinum One is 0.5 ~ 5 atm% to form the capacitor lower electrode 614 and the capacitor upper electrode 616. The film formation is carried out by sputtering in argon. The film thickness of the lower electrode of the capacitor is preferably 30 to 200 nm, and the film thickness of the upper electrode of the capacitor is preferably 40 to 200 nm. The capacitor dielectric film is formed by a sol method after forming a BaTiO3 film, and then from 400 to 700. (: Crystallized by heat treatment in oxygen. In this DRAM, the use of platinum containing ruthenium, palladium, chains, etc. to replace the conventional platinum without impurities is used to form the electrode of the capacitor, which can be prevented from occurring during the lithography process. Since the yield between the lower electrode 614 of the capacitor and the interlayer insulating film 110 is low, stable and stable capacitor characteristics with high reliability can be realized. Embodiment 6 FIG. 6 is a partial cross section of a DRAM according to a sixth embodiment of the present invention Fig. 0 In the DRAM of this embodiment, the capacitor lower electrode 114, the capacitor dielectric film n5, and the capacitor upper electrode 116 constitute the capacitor 160 in the conventional manner. In addition, a first capacitor j is formed on the upper portion of the first interlayer insulating film The film 131, through the protective layer 131, makes the lower electrode of the capacitor and the capacitor dielectric film contact with the first interlayer insulating film. In addition, a second protective film 132 is formed under the second interlayer insulating film, through the second The protective film 132 brings the upper electrode of the capacitor into contact with the second interlayer insulating film. The first protective film 131 and the second protective film 132 are made by plasma CVD Nitride second film formed. The thickness of the film is based on% ~ ⑽ coffee based paper. Please read the precautions on the back before filling this page. Binding Printed by the Central Standard Falcon Bureau Employee Consumer Cooperative of the Ministry of Economic Affairs 19 Central Ministry of Economic Affairs A7 B7 printed by the Bureau ’s Consumer Cooperative. V. Description of the invention (17) Preferably, in this embodiment, it is 50nm. The first interlayer insulating film and the second interlayer insulating film use the tetraethylorthography method. The formed oxide second film. After each film is formed, in order to achieve surface flattening, reflow (refldw) treatment is performed at 800 to 900 ° C. In this DRAM, the first protective film as described above is formed 131 and the second protective film 132, so that the diffusion of moisture from the interlayer insulating film toward the capacitor dielectric film can be suppressed. Embodiment 7 FIG. 7 is a partial cross-sectional view of a DRAM according to a seventh embodiment of the present invention. As in the conventional example, the capacitor lower electrode 114, the capacitor dielectric film 115, and the capacitor upper electrode 116 constitute the capacitor 160. The capacitor lower electrode and the capacitor The upper electrode is a platinum film formed by a sputtering method. The capacitor dielectric film is formed by a CVD method to form a BaTi03 film, and then heat-treated to improve crystallinity. The first is formed between the capacitor lower electrode and the capacitor dielectric film Diffusion prevention film 133. A second diffusion prevention film 134 is formed between the upper electrode of the capacitor and the capacitor dielectric film. A titanium oxide film is used as the first diffusion prevention film 133 and the second diffusion prevention film 134. Each film thickness is 5-20 Dirty is better, in this embodiment is 10 legs. Since the dielectric constant of the titanium oxide film is as high as 80 ~ 90, even if the film is held by the above-mentioned film thickness, the resulting capacitance is not reduced at all. 20 The size of this paper is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) ^^^ 1 —HI— ^^^^ 1 1 · ml 1 ^, v 'port (please read the precautions on the back first (Fill in this page) A7 B7 printed by the Staff Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of the invention (18) Also, because of the provision of this diffusion prevention film, the insulation can be improved, and the platinum ion capacitor can be confirmed by the secondary ion mass analysis method The diffusion of the dielectric film is significantly reduced. In this embodiment, since the formation of the first diffusion prevention film 33 and the second diffusion prevention film 134 can control the diffusion of platinum of the electrode component elements toward the capacitor dielectric film, a semiconductor device with good capacitor characteristics can be obtained. Embodiment 8 Figure 8 is a partial cross-sectional view of a dram in an eighth embodiment of the present invention. In this embodiment, the capacitor lower electrode 114, the capacitor dielectric film 115, and the capacitor upper electrode 116 constitute a capacitor as in the conventional example. The lower electrode of the capacitor and the upper electrode of the capacitor are platinum films formed by the sputtering method. For the capacitor dielectric film, the BaTi03 film formed by the CVD method is further heat-treated to obtain high crystallinity. A first diffusion prevention film 135 is formed between the capacitor lower electrode and the capacitor dielectric film, and a second diffusion prevention film 136 is formed between the capacitor upper electrode and the capacitor dielectric film. A titanium nitride film is used as the first diffusion prevention film 135 and the second diffusion prevention film 136. Each film thickness is preferably 10 ~ 40 coffee. In this embodiment, it is 10 coffees. Since this titanium nitride film is conductive, even if this film is provided, it will not cause a reduction in capacitance. In addition, due to the arrangement of the diffusion prevention film, the insulation can be improved, and at the same time, the secondary ion mass analysis method can be confirmed that the platinum film capacitor dielectric film 21 This paper standard is applicable to the Chinese National Standard (CMS) M specifications (2i〇X297 public Chu ) N ^ ϋ— · n ^ tn ^ i — ^ ϋ / —Bn mB ftn ^ v ^ nn ί -d (please read the precautions on the back before filling this page) Printed 304287 by the employee consumer cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 5. Description of the invention (19) The diffusion in ~ has also decreased. In this embodiment, since the first diffusion prevention film 135 and the second diffusion prevention film 136 are formed, the diffusion of platinum of the electrode component element toward the capacitor dielectric film can be controlled. Embodiment 9 FIG. 9 is a partial cross-sectional view of a DRAM according to a ninth embodiment of the present invention. In this embodiment, a platinum film formed by a sputtering method is used as the capacitor lower electrode and the capacitor upper electrode. When a BaTi〇3 film is used as a capacitor dielectric film, by adjusting the substrate temperature and pressure at the time of film deposition, a dielectric film 215 with a crystal grain size along the surface direction can be arbitrarily selected. Fig. 〇 shows the relationship between the average crystal grain size of the capacitor dielectric film (8 to 10 or SrTi〇3) and the leakage current of the capacitor. It can be clearly seen that when the average crystal grain size of BaTi〇3 is 50 planes and the applied voltage is 2V, a good leakage current characteristic of the capacitor leakage current value of 2 × 10_8A / cm2 can be obtained. In this embodiment, since the capacitor dielectric film 215 having a universally small particle diameter on the polycrystalline main surface is used as such, a capacitor with good leakage current characteristics can be formed. Embodiment 10 FIG. 11 is a partial cross-sectional view of a DRAM according to a tenth embodiment of the present invention. In the DRAM of this embodiment, the first capacitor dielectric film 315a is formed on the capacitor lower electrode n4, followed by the first capacitor dielectric film n ^ i Bn · — In mflfLmV 1 * ^ ¾., Vs (please read the note on the back first (Fill in this page again) 22

Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs A7 _______B7_ V. Description of Invention (20) A silicon oxide film 137 is formed on the upper part to cover the sidewall of the lower electrode of the capacitor. Further, on the upper portion of this silicon oxide film 137, a second capacitor dielectric film 315b and a capacitor upper electrode 116 are formed in this order. As the first capacitor dielectric film 315a and the second capacitor dielectric film 315b, a BaTiO3 film formed according to the reactive property sputtering method is used. Each of these film thicknesses is preferably at least 5 planes, and in this embodiment are all 30 planes. The silicon oxide film is formed by a plasma CVD method to form a deposit of about 300 nm, and then anisotropic etching is performed, so that the silicon oxide film remains like the side surface of the lower electrode covering the stepped portion. As a result, the silicon oxide film remains in the stepped portion. Compared with the conventional structure without a silicon film, the leakage current value of the capacitor is reduced by about 2 digits. When the applied voltage is 2V, 6x 1 〇- The leakage current value of 8A / cm2. In this DRAM, the silicon oxide film is sandwiched between the first capacitor dielectric film 315a and the second capacitor dielectric film 315b, and the silicon oxide film 137 remains on the side of the capacitor lower electrode 114, so it can be reduced Leakage current from the side of the lower electrode 114 of the capacitor. As a result, a capacitor with good leakage current characteristics can be formed. Embodiment 11 FIG. 12 is a partial cross-sectional view of a DRAM according to a first embodiment of the present invention. In the DRAM of this embodiment, Pt is used as the capacitor lower electrode 114. As the capacitor dielectric film 415, a solution of BaTi〇3 and SrTi〇3 at a thickness of 200 nm & right film formed by the reactive sputtering method was used as the capacitor dielectric film 415. On the upper part, the vapor formed by the sputtering method is used as the upper part of the capacitor. '-------- f outfit — (Please read the precautions on the back before filling out this page) Order 23

---- 1 — I A7 B7 V. Description of the invention (21) In addition, after the processing of the capacitor dielectric film and the upper electrode, the engineering after the interlayer insulating film will be carried out in the same way as the conventional example. Figure 13 shows the change in lattice constant when the solid solution used as the capacitor dielectric film (BaTiOAWSrTiO ^ Ox ratio changes. This result is consistent with the previous survey results of M. Me Quarrie (Landolt-Bornstein, New Series, Group III, Volume 16, Ferroelectrics and Related Substances, Subvolume a: Oxides, Springer-Verlag Berlin. Heidelberg. New York 1981, p416, Fig. 669) are roughly the same. According to FIG. 13, when X = 0.8 ~ 0.9, the solid solution (The lattice constants of BaTiOOn (SrTi03) x and platinum are within 0.3% of the error. In addition, Fig. 14 shows the change in the dielectric constant of the thin film when the amount of change is greater than X. At the composition ratio around X = 0.8 Compared with other composition ratio fields, it has a higher dielectric constant. Since the deviation of the lattice constant of platinum and the dielectric film is small at this time, the formation of an interface low dielectric layer can be avoided. Printed by the Central Consumers ’Cooperative Staff Consumer Cooperative -------- installed-- (Please read the precautions on the back before filling out this page) In this embodiment, more than two types of pero vskite structures are used Solid solution of metal oxide The body serves as the capacitor dielectric film 415, and by adjusting the amount ratio of the metal oxide, the capacitor lower electrode or the capacitor upper electrode can obtain lattice integration between the capacitor dielectric film and the capacitor dielectric film, so it can be avoided at the interface of the capacitor dielectric film 415 and the electrode The formation of a low-dielectric layer. As a result, a capacitor dielectric film with a high-dielectric ratio can be formed stably 415 °. In this embodiment, the solid 24 such as Ding 丨 03 and SrTi03 are used. Purification (CNS) A4 specification (210X297 mm) A7-" —--- __ V. Description of the invention (2 ^ ~ --- The solution is used as capacitor dielectric film 415, and by adjusting the amount ratio to make The lattice constants of the metal electrodes are integrated. However, the present invention is not limited to this example, and two or more oxides are selected from many oxides with perovskite type crystal structure such as PbTi〇3 and CaTiCh, by adjusting these The ratio is such that the lattice constant of the metal electrode is integrated to obtain the same effect as this embodiment. Embodiment 12 FIG. 5 is a partial cross-sectional view of a DRAM according to a twelfth embodiment of the present invention In this embodiment, SrTi03 is used as the capacitor dielectric film 115. SrTi03 is formed by reactive sputtering to a thickness of 200 nm & right. The upper electrode of the capacitor is formed on the upper part of the capacitor dielectric film by sputtering At 716 °, after the processing of the capacitor dielectric film and the upper electrode, the process after the interlayer insulating film is carried out in the same way as the conventional example. Use pt containing trace Re (Baht) as the lower electrode film 714 of the capacitor and the upper electrode film 716 of the valley device. The amount of Re added was changed to 〇5, 10, 15wt% to find out the change in the lattice constant of the metal electrode and the permittivity of the capacitor dielectric film caused by Re < addition. Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs ------- 1 ^ 1 ± ^ ---- III Ding 0¾--a (Jing first read the precautions on the back and then fill out this page) Figure 16 shows the result of adding Re The change of the lattice constant. With the increase of the added amount, the lattice constant will decrease, and when the Re of 〇〇wt% is added, the lattice constant 3 90% of 8ι · ΊΊ03 can be obtained. Figure 17 shows the change in the dielectric ratio due to the addition of Re. When Re 1 Owt% is added, a higher dielectric ratio can be obtained relative to other added amounts. Since the deviation of the lattice constant of the electrode and the dielectric film is small at this time, the formation of the interface low dielectric layer can be avoided. 25 This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm). V. Description of the invention (23) In this embodiment, the use of such alloys as the electrode film 'and the adjustment of the ratio The lower electrode of the capacitor or the upper electrode of the capacitor is integrated with the lattice between the capacitor dielectric film. Therefore, the formation of a low-dielectric layer at the interface between the capacitor dielectric film and the electrode can be avoided, and as a result, a capacitor dielectric film with a high dielectric constant can be formed stably. Furthermore, the software error rate of the semiconductor device can be reduced by this. In this embodiment, the Pt film added with Re is used as an electrode, and the lattice constant of the capacitor dielectric film is integrated by adjusting the amount ratio. However, the present invention is not limited to this example, and other metal elements are added to the metal formed by the face-centered cubic lattice and adjusted so that the lattice constant of the electrode and the capacitor dielectric film are integrated, which can be obtained as in this embodiment. effect. Embodiment 13 Figure 18 is a partial cross-sectional view of a DRAM according to a thirteenth embodiment of the present invention. Printed by the Employee Consumers Cooperative of the Central Economic Bureau of the Ministry of Economic Affairs in this embodiment, pt is used as the capacitor lower electrode 114. After the capacitor lower electrode 114 is formed, a 20 nm-thick solid solution (BaT103) lx (SrTi〇3) x formed by the reactive sputtering method is used as the first capacitor dielectric film 515a. At this time, the molar ratio of BaTl〇3 and SrTi〇3 is X = 0.4. In addition, as the second capacitor dielectric film 515b, BaTiCh having a film thickness of about 200 nm is formed on the upper part by a reactive sputtering method. The upper part uses Pt formed by the sputtering method as the capacitor upper electrode 116. Furthermore, after the capacitor dielectric films 515a and 515b and the upper electrode Π6 are processed, the process after the interlayer insulating film is carried out in accordance with the conventional example.

This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210x297 printed by the Ministry of Economic Affairs and the Central Standards Bureau Employee Consumer Cooperatives A7 B7 V. Invention description (24) The DRAM system formed in this way, and the use of BaTi03 single layer as a capacitor Compared with the dielectric film, it can increase the capacitance. In the BaTi03 single layer, there is a large lattice constant inconsistency between the lower electrode Pt and the BaTi03 of the capacitor dielectric film, resulting in an amorphous layer with a low dielectric rate at the interface In contrast, in this embodiment, since there is a dielectric film between Pt and BaTi03 with a lattice constant between the two materials, it can be avoided that the low dielectric layer occurring at the interface between the capacitor dielectric film and the electrode In addition, this embodiment uses Pt as the capacitor lower electrode, BaTi03 and SrTi03 solid solution as the first capacitor dielectric film, and BaTi03 as the second capacitor dielectric film. However, the present invention can also be effectively The lattice between SrTiP〇3 and BaTi03 or PbTi03 and other peroskite type oxides and metal electrodes with face-centered cubic crystal structure is not Method for integrating the formed low-dielectric layer of the interface. Embodiment 14 FIG. 19 is a partial cross-sectional view of a DRAM according to a fourteenth embodiment of the present invention, and FIGS. 20 to 23 are partial cross-sectional views showing the DRAM manufacturing process of the present invention. In the embodiment, platinum or platinum doped with latm% aluminum formed by the sputtering method is used as the capacitor lower electrode 814. The surface of the capacitor lower electrode is roughened. The film thickness of the capacitor lower electrode 814 is 60 ~ 300nm is more appropriate, here is 100nm. The BaTi03 film formed by the reactive sputtering method is used as the capacitor dielectric 115. The platinum film formed by the sputtering method is used as the upper electrode 116 of the capacitor. The capacitor system constructed as above, As compared with the conventional example, 27 paper standards can be added to the Chinese National Standard (CNS) A4 specification (2 丨 0X 297mm) (please read the precautions on the back before filling out this page). Installed. -5 Central Ministry of Economic Affairs A7 _______ printed by the Staff Consumer Cooperative of the Bureau of Standards V. Description of the invention (25) The effective area of the capacitor is added, so it is possible to increase the capacitance. By lowering the power as in this embodiment The extremely rough surface makes it possible to increase the effective area of the capacitor, and as a result, a semiconductor device with good capacitor characteristics can be obtained. The manufacturing method of this embodiment will be described based on FIGS. 20 to 23. As shown in FIG. 20, in order to form the capacitor lower electrode 814. First, the sputtering method was used to form a platinum or platinum doped latm〇 / 〇ming platinum thin film. 13. The thickness of the film is expected to be reduced by the roughening process described later, so the thickness is 60 ~ 3〇Onm is more appropriate, this embodiment is 100 nm. As shown in FIG. 21, after these films are patterned, the roughening system of those using platinum is sputter etched under an argon atmosphere to form the lower electrode 8 丨 4 ^ In addition, the use of platinum doped with aluminum, heat treatment in oxygen to segregate the alumina on the platinum grain boundary, selectively remove the alumina by RIE to obtain a rough surface化 Lower electrode 8 丨 4. As shown in FIG. 22, as the capacitor dielectric 115, a BaTiO3 film formed by a reactive sputtering method is used. In addition, a platinum film formed by a sputtering method was used as the capacitor upper electrode 116. As shown in FIG. 23, the conventional inter-layer insulating film, the first wiring layer, the protective film, and the second aluminum wiring layer are formed and processed in this order. When the Dram is manufactured according to the above manufacturing method, the capacitance can be increased compared with the conventional example. The increase in the capacitance of platinum by sputtering etching was 10%, and that of platinum-aluminum after RIE treatment was 200/0. Since the surface of each lower electrode has roughness of about 30 nm after roughening, the increase in the aforementioned capacitance comes from the increase in the effective area of the capacitor. There is no significant difference between the leakage current and the conventional examples. --------- II -----, 1T ------ ^ ---------- I--II-I 1 m (Please read the notes on the back first (Fill in this page again) 28

A7 A7 Figure Figure B7 5. Description of the invention (26) In this embodiment, by adding such a simple roughening process of etching the lower electrode in this way, the effective area of the capacitor can be increased. As a result, a semiconductor device with good capacitor characteristics can be obtained. Embodiment 15 FIG. 24 is a partial cross-section of a DRAM according to a fifteenth embodiment of the present invention. FIGS. 25 to 28 are partial cross-sections showing a DRAM manufacturing process of the present invention. This embodiment uses a film formed of titanium and platinum in this order as a capacitor lower electrode. After the lower electrode is formed, heat treatment is performed in an oxidizing atmosphere to roughen the surface of the capacitor lower electrode. The BaTi03 film formed by the reactivity and sputtering method is used as the capacitor dielectric film. A platinum film formed by the sputtering method was used as the upper electrode of the capacitor. By constructing a capacitor as described above, the effective area of the capacitor can be increased compared with the conventional example, so that the capacitance can be increased. In this embodiment, by roughening the lower electrode, the effective area of the capacitor is increased, so that a semiconductor device having good capacitor characteristics can be obtained. The manufacturing method of this embodiment will be described with reference to FIGS. 25 to 28. As shown in FIG. 25, the titanium thin film up and the platinum thin film 140 deposited by the sputtering method are used as the capacitor lower electrode 914. The film thickness of the titanium layer 139 is preferably from 10 nm to 50 nm, and the film thickness of the platinum layer 140 is preferably from 50 nm to 200 nm. Then, as shown in Fig. 26, after the lower electrode is patterned, by 600 ° C ~ 900 in oxygen. (: The heat treatment makes the surface of the lower electrode form irregularities of about 1 OOnm. --------! Install ------ order ------ ^ (Read the precautions on the back first Refill this page} Printed by the Ministry of Economic Affairs Central Standards Bureau Employee Consumer Cooperative 29 A7 A7 Printed by the Ministry of Economic Affairs Central Standards Bureau Employee Consumer Cooperative V. Invention description (27 Then, as shown in Figure 27, formed by using the reactive splash method The β3ή〇3 film is used as the capacitor dielectric film 115. Next, a platinum film formed by the sputtering method is used as the capacitor upper electrode 116. As shown in FIG. 28, the second interlayer insulating film and the first stroke are carried out in sequence The formation and processing of the wiring layer, the protective film, and the second aluminum wiring layer. According to the above-mentioned manufacturing method, the DRAM can be compared with the conventional one, and the capacitance can be increased. The amount of change in this capacitance is The heat treatment temperature range of the roughening treatment at 600 ° C to 900 ° C is increased by 10% to 30% with the increase in temperature. This is due to the increase in the temperature of the uneven heat treatment corresponding to the lower electrode. (Auger) electronic spectroscopy to evaluate roughness Under the electrode, it is understood that platinum and titanium have been mixed almost uniformly to form a single layer. Also, from X-ray diffraction, it can be seen that titanium is present in the film in the form of titanium oxide. From the above, the unevenness of heat treatment is due to The interdiffusion of titanium and platinum and the oxidation of titanium. The leakage current is not significantly different from the conventional example. In this embodiment, by adding such a simple roughening treatment process of heat treatment of the lower electrode, To increase the effective area of the capacitor, as a result, a semiconductor device with good capacitor characteristics can be obtained. Embodiment 16 FIG. 29 is the sixteenth embodiment of the present invention, and FIGS. 29 to 33 are partial cross-sectional views showing the DRAM manufacturing process of the present invention. In this embodiment, a film of polycrystalline titanium, titanium nitride, and platinum with a roughened surface is formed in sequence as the lower electrode of the capacitor. The use of the paper is in accordance with the specifications of this paper. The paper standard is applicable to the Chinese National Standard (CNS) A4 specification ( 210X297mm) (Please read the precautions on the back before filling out this page)

The BaTi03 film formed by the Responsive Sputtering method was printed by the Employee Consumer Cooperative of the Central Prototype Bureau of the Ministry of Economic Affairs as a capacitor dielectric. A platinum film formed by the sputtering method was used as the upper electrode of the capacitor. By constructing the capacitor as described above, the effective area of the capacitor can be increased compared to the conventional example, and therefore the capacitance can be increased. In this embodiment, by roughening the lower electrode, the effective area of the capacitor is increased, and a semiconductor device having good capacitor characteristics can be obtained. The manufacturing method of this embodiment will be described with reference to FIGS. 30 to 33. As shown in FIG. 30, first, a phosphorus-doped polycrystalline silicon film 141 with a thickness of 100 nm and 300 nm is formed by CVD. At this time, since the phosphorus-doped polycrystalline silicon film 141 is formed at a substrate temperature of 58 °: & right, irregularities of about 30 nm can be formed on the surface. Next, titanium nitride 142 with a film thickness of 20 nm to 100 nm and a platinum film with a film thickness of 30 nm to 200 nm are formed on the polycrystalline silicon film i4i in sequence by the sputtering method to form a roughened lower surface Electrode 1014. Next, after patterning the lower electrode 1014 as shown in FIG. 31, as shown in FIG. 32, a BaTiO3 film formed by a reactive nozzle sputtering method is used as the capacitor dielectric 115. Next, a platinum film formed by a sputtering method is used as the upper electrode 116 of the capacitor. Next, as shown in FIG. 33, the formation and processing of the second interlayer insulating film, the first aluminum wiring layer, the protective film, and the second aluminum wiring layer are sequentially performed as in the conventional example. By manufacturing the DRAM by the above-mentioned manufacturing method, the capacitance can be increased compared with the conventional example. The amount of change in capacitance is about 20% in the heat treatment temperature range of the roughening treatment of 6,000 to 90 ° (rc :), with the temperature increasing. The leakage current, etc. is different from the conventional example There is no significant difference. 31 This paper is of Guanjia County (CNS M4 specification (210Χ297mm) " · ---- II-I-II -1 In-'I-I .....- 11 ςτ (Please read the precautions on the back before filling in this page) A7 A7 Printed by the Employees ’Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economics ______B7 V. Invention Instructions (29) ~ ^ 'In this embodiment, due to the rough surface The structure in which the lower electrode contains polycrystalline silicon can be used to increase the effective area of the capacitor according to this simple process. As a result, a semiconductor device with good capacitor characteristics can be obtained. Embodiment 17 FIG. 34 is the seventeenth embodiment of the present invention 35 to 41 are partial cross-sectional views showing the manufacturing process of the DRAM of the present invention. In FIG. 34, the semiconductor substrate ιοί, field oxide film 102, transfer gate l〇3a, l〇3b, source / stream flow leader City 106a, 106c, channel area 106a, 106b, gate insulating film 105, gate electrode i〇4 b, 104d, the oxide film 107, the buried bit line 108, and the insulating film 109 are constructed using the same conventional example. This DRAM is formed as if it is coated with both the oxide film 107 and the insulating film 109 There is a first interlayer insulating film 110. A contact hole 1 i 〇a is formed at a position on the impurity region 1 〇6b of this interlayer insulating film n〇. The contact hole ll〇a is electrically contacted with the semiconductor substrate 1〇2 The part i10aa and the part with a wider area above it are composed of 11 〇ab. A contact plug 111 composed of polycrystalline silicon is formed in the contact hole 110a. The contact hole 111aab is formed with The capacitor lower electrode 114 composed of the barrier metal 134 diffused from the contact plug Π1 and platinum 135 as encapsulated in the barrier metal 134. The capacitor is formed as if covering the first interlayer insulating film 110 and the capacitor lower electrode 114 Dielectric film 115. SrTi03, BaTi〇3 and other high dielectric materials can be used as the material of the capacitor dielectric film Π5. The capacitor upper electrode 116 is formed like the capacitor dielectric film 115. Platinum or the like can be used as the capacitor upper electrode 116 Of 32. The gj national standard (CNS) 8.4 specifications (21 () > < 297 public shame) in this paper standard " ~ " ---- {Please read the precautions on the back before filling this page ) Policy · -β Ministry of Economic Affairs, Central Standards Bureau, Employee Consumer Cooperative A7 ____B7 V. Description of the invention (30) A second interlayer insulating film 117 composed of an oxide film is formed like the upper electrode 116 of the capacitor. On this second interlayer insulating film 117, a first aluminum wiring layer 118 is formed at a predetermined interval. A protective film 119 is formed as if covering the first aluminum wiring layer 118. On this protective film 119, a second aluminum wiring layer 120 is formed. 35 to 41 show the manufacturing method of this embodiment. In FIG. 35, the P-type semiconductor substrate 101, the field oxide film 102, the transfer gates 103a, 103b, the source / row leader i〇6a, i〇6c, the channel area 121, the gate insulating film 105, the gate electrode l04b, 104d, the oxide film 107, the buried bit line 108, the insulating film 109, the first interlayer insulating film 110, and the contact plug 111 are constructed using the conventional knowledge. Next, as shown in FIG. 36, a photoresist pattern 122 patterned with a predetermined shape is formed on the first inter-view insulating film. Using the photoresist pattern 122 as a mask, the first interlayer insulating film 110 and the contact plug 111 are etched. As a result, as shown in FIG. 37, a trench 110b for embedding the capacitor lower electrode can be formed. The depth of this opening depends on the type of the lower electrode of the capacitor formed on the upper part, and is usually about 0.05 to 0.3 μm. Next, as shown in FIG. 38, a sputtering method or the like is used to form a titanium layer 34 in the trench 110b for embedding the lower electrode of the capacitor and on the interlayer insulating film 110. The thickness of the titanium film is preferably about 30 to 100 nm. Then, on the upper part of the drink, using a sputtering method, etc., a platinum layer 135 is formed as if covering this layer. The thickness of the platinum layer is preferably about 200 to 500 nm. Then, as shown in Figure 39, using the RIE (Reactive Ion Remnant) method and 33 sheets of paper, the Chinese National Standard (CNS) A4 specification (210X297 mm) is used. Nn m nn nn · 1 ^ m · ^^ 1 1 ^ 1 -! 1 m ^ J. (Please read the precautions on the back before filling in this page) A7 printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs ———___ B7__ V. Description of invention (31) CMP (Chemical Mechanical Grinding) method 'Implement the etching process of Yinguang 134 and platinum layer 135. At this time, the interlayer insulating film 110 is subjected to an over-etching treatment so that no residue of the titanium layer 134 remains on the surface of the interlayer insulating film 110. Then, as shown in FIG. 40, the capacitor lower electrode 114 composed of the first interlayer insulating film], titanium layer 134, and platinum layer 135 is coated, and the sputtering method is used at 500 ° C to 700 C. A capacitor dielectric film 115 made of high-dielectric materials such as srTi〇3 and BaTi03 is formed. The thickness of the capacitor dielectric film 115 is preferably 50 to 200 nm. At this time, since the step difference of the bottom surface composed of the lower electrode metal of the capacitor and the first interlayer insulating film is small, a film forming method with a small step coverage can be used as the film forming method of the capacitor dielectric film. Compared with the conventional examples, the step coverage can be improved. Next, as shown in FIG. 41, the upper electrode 116 of the capacitor is formed like a capacitor dielectric film 115. Platinum or the like is used as the material of the upper electrode 116 of the capacitor. The method of forming the same capacitor lower electrode 114 is used. After the capacitor upper electrode 116 is formed, the second interlayer insulating film 117, the first aluminum wiring 118, the protective film 119, and the second aluminum wiring layer 20 are formed by a method known in the conventional manner (Fig. 42). With this, the DRAM of the present embodiment shown in FIG. 35 can be formed. Embodiment 18 FIG. 42 is an eighteenth embodiment of the present invention, and FIGS. 43 to 45 are partial cross-sectional views showing a DRAM manufacturing process of the present invention. In FIG. 42, the semiconductor substrate 101, the field oxide film] 02, the transfer gate 103a, 103b, the source / drain field, the field 6a, 106c, the channel field 121, and 34 i are applicable. ϋStandard (CNS) A4 specifications (21Gx · ^^ -——- ^^^ 1 mm nn 1 ^ 1 ^ 1 nn 1 '„Λ ^, νδ (Please read the precautions on the back before filling this page) Ministry of Economic Affairs Printed by the Central Prototype Bureau's employee consumer cooperative A7 ___________B7 5. Description of invention (32) Gate insulating film 105, gate electrode i〇4b, l〇4d, oxide film 107, embedded bit line 108, insulating film 109, The contact plug 110 is constructed in the same way as in the embodiment. In FIG. 42, an interlayer insulating film 110c of the same material as the first interlayer insulating film 110 is formed as it is buried between the capacitor lower electrodes 114. Then, as A capacitor dielectric film 115 is formed like the above-mentioned interlayer insulating film 110c and capacitor lower electrode 114. Like a capacitor dielectric film 115, a capacitor upper electrode 116 is formed. Platinum or the like can be used as the capacitor upper electrode Π6 The material is made of oxide film, etc., like the upper electrode 116 of the capacitor The second interlayer insulating film 117. On this second interlayer insulating film 1Π, a first aluminum wiring layer 118 is formed at a predetermined interval. A protective film 119 is formed as if covering the first aluminum wiring layer 18. This protective film 119 The second aluminum wiring layer 120 is formed thereon. FIGS. 43 to 45 show the manufacturing method of the DRAM of the above embodiment. First, as shown in FIG. 43, using the method of the conventional example, the P-type semiconductor substrate 101 and the field are individually formed. Oxide film 102, transfer gate i〇3a, 103b, source / drain field 106a, 106c, channel field 121, gate insulating film 105, gate electrode 104a, 104b, 104d, oxide film 107, buried position Element wire 〇8, insulating film 109, first interlayer insulating film 110, contact plug π l, capacitor lower electrode 114. Then as shown in Figure 44, using the selective CVD method or spin coating method to isolate only the first interlayer An insulating film 110c is formed on the surface of the film 110. The thickness of this insulating film 110c varies with the type of the lower electrode layer 114 of the capacitor. However, it is usually about 30nm ~ 200nm. 35 This paper size is applicable to Chinese national standards ( CNS) A4 specification (210X297mm) (Please read the notes on the back first Then fill out this page) installed. Order

-1 ^ 1 I—i I-I A7 304287 V. Description of the invention (33) Next, as shown in FIG. 45, as in the case of covering the insulating film 110c and the lower electrode 114 of the capacitor, use the spray at 500 ° C ~ 700 ° C The sputtering method is used to form a capacitor dielectric film 115 composed of high-dielectric materials such as SrTiO3 and BaTiCb. The thickness of the capacitor dielectric film 115 is preferably 50 to 200 nm. At this time, since the step difference of the bottom surface composed of the capacitor lower electrode metal 114 and the insulating film u〇c is small, a film forming method with a low step coverage can be used as the film forming method of the capacitor dielectric film, and conventional examples In comparison, the step coverage can be improved. After the capacitor dielectric film 115 is formed, the capacitor upper electrode 116, the second interlayer insulating film 117, the first aluminum wiring 118, the insulating film Π9, and the second aluminum wiring layer 120 are formed by a conventional method. With this, the DRAM shown in FIG. 42 can be formed. Embodiment 19 FIG. 46 is a partial cross-sectional view of a dram according to a nineteenth embodiment of the present invention. In FIG. 46, regarding the p-type semiconductor substrate 100, the field oxide film 102, the transfer gate transistor 103a, i〇3b, the N-type impurity territory 106c, 106a, the channel area 121, the gate insulation Film 105, gate electrode 10, transfer gate transistor 103b, oxide film 107, buried bit line 108, insulating film 109, first interlayer insulating film Π0, contact hole ii ○ a, the lower structure of the capacitor such as the contact plug 1U is the same as the conventional one. The second interlayer insulating film 1Π on the upper part of the capacitor, the first aluminum wiring layer 118, the protective film U9, and the aluminum wiring layer 12 are also the same as conventional ones. In this DRAM, use and Si〇2 as the first interlayer insulating film to make the paper size suitable for money_Jia Li) (-Please read the precautions on the back before filling out this page) Install ·, -0 Ministry of Economic Affairs Printed by the Central Standard Falcon Bureau Employee Consumer Cooperative A7 A7 Figure: Printed by the Ministry of Economic Affairs of the Standard Bureau Employee Consumer Cooperative V. Description of the invention (34 Use platinum as the capacitor lower electrode 114 and BaTi〇3 as the capacitor dielectric film. BaT1〇3 The film thickness is about 200nm by reactive sputtering method. Regarding the accumulation of capacitor dielectric film, when the lower layer is Si〇2 or platinum, there is a great difference in the dielectric rate of the dielectric film formed above it, for example, in the accumulation A dielectric film is formed at a substrate temperature of 600 "(Fig. 47). As a result, a capacitor dielectric film 148a with good crystallinity and high dielectric rate is formed on the capacitor lower electrode 114, and a lack of crystallinity is formed on the interlayer insulating film 110. Low dielectric constant capacitor dielectric film 148b. Above the capacitor dielectric films 148a and 148b, a capacitor upper electrode 116 made of platinum is formed by sputtering After that, the process after the wide insulating film is performed as in the embodiment. Embodiment 20 FIG. 48 is a partial cross-sectional view of a DRAM according to the 20th embodiment of the present invention. FIGS. 49 to 52 show a part of the DRAM manufacturing process of the present invention. The cross-sectional view 48 is a partial cross-sectional view of the DRAM of the present embodiment. In FIG. 48, a field oxide film 102 is formed on the main surface of the P-type semiconductor substrate 101 in the field of device isolation, and the device The formation of a transfer gate transistor 103. The transfer gate transistor 103 is formed with a gate electrode 104 formed by interposing a gate insulating film 105 on its channel area 121. It is replaced with a stacked film The commonly used oxide # film 1G7 is used as the insulating film 207 of the package 104b, 04c, l04d. 3 7 The paper size is suitable for financial purposes. County (CNS) A4 specification (210X29 ^ ") (Please read first Note on the back and then fill out this page) Installation · Order-I · 1 III--· A7 ____B7 printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs V. Invention description (35) The embedded bit lines located on these upper parts 108, insulating film 109, first interlayer insulating film 110, contact hole 1 10a, contact plug 111, capacitor lower electrode 114, capacitor dielectric film 115, capacitor upper electrode 116, second interlayer insulating film 117, first aluminum wiring layer 118, protective film 119, second aluminum wiring layer 120, etc. Figures 49 to 52 show the manufacturing method of this embodiment. First, as shown in Figure 49, as in the conventional example, the field separation film on the main surface of the semiconductor substrate uses the LOCOS method to form the field oxide film 1 〇2. Next, a thermal oxidation method or the like is used to form the gate insulating film 105. Gate electrodes (word lines) 104a, 104b, and 104d are selectively formed on the gate insulating film 105 and the field oxide film 102. Using this gate electrode l (Ma, l (Mb, l (Md as a cover, impure material is injected into the main surface of the semiconductor substrate 101 to form impure regions 106c, l06a, and 106b, respectively. Next, the gate electrode is coated Like 104a, l04b, l04d, the SrTi〇3 film deposited by an excellent coating method such as CVD is used as the insulating film 20.7. This insulating film 207 is not used as a pattern in this project, but When the subsequent contact hole is opened, it is used as an etching stopper. Next, as shown in FIG. 51, the photoresist pattern formed on the first interlayer insulating film u〇 is used as a mask, and a difference is applied to the first interlayer insulating film 110. The chiral etching process forms the contact hole 110a. At this time, since the selectivity of the silicon oxide film and the like to Rm is lower than the selectivity of the insulating film composed of SrT103 to the rie, the insulating film 207 is hardly affected. Etched away. The insulating film 207 remains at the bottom of the contact hole n〇a, so that it can be protected when the contact hole is formed.'S Zhang-scale phase towel Langjiaqi (⑽) Shunge (don't X π ride)

In--In 1 ^ 1 In ml n ™ Shishui · ^^^ 1 —HI— (please read the notes on the back before filling out this page) A7 A7 Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy _________B7 V. DESCRIPTION OF THE INVENTION (36) The purpose of the semiconductor surface at the bottom of the contact portion not to be damaged by etching. After the photoresist pattern is removed, the water with SrTi03 has a very high selectivity compared to the water with the impure area of the substrate and the interlayer insulating film composed of the silicon oxide film, so the water can be used to remove the residue at the bottom of the contact The insulating film 207 composed of SrTi〇3. By such engineering, the contact hole 110a is formed. After the contact hole 110a is formed, the DRAM is fabricated using the engineering method of the conventional example. That is, as shown in FIG. 52, a polycrystalline silicon layer is formed by using the CVD method or the like to bury the contact hole 110a and cover the first interlayer insulating film 110, by etching back the polycrystalline silicon layer A contact plug 111 is formed in the contact hole 110a. Next, a platinum layer 114 is formed on the contact plug 111 and the first interlayer insulating film 110 using a sputtering method or the like. The platinum layer 114 is processed and etched to a predetermined shape to form the lower electrode 114 of the capacitor. Next, a capacitor dielectric film 115 made of a high-dielectric material is formed by covering the lower electrode 114 of the capacitor by a sputtering method, a cvd method, or the like. As the material of the capacitor dielectric film U5, Pb (Zn, Ti) 〇3 or SrHC ^ is used. Next, a platinum layer 116 is formed so as to cover the capacitor dielectric film 115. The upper electrode 116 of the capacitor is formed by processing the platinum layer 10 to a predetermined shape. The second interlayer insulating film 117 is formed by coating the upper electrode 116 of the capacitor by a CVD method or the like. On this second interlayer insulating 117 film, a first aluminum wiring layer 118 is formed at a predetermined interval. Next, as in the case of covering the first aluminum wiring layer, the protective film 119 composed of a silicon oxide film or the like is formed using a CVD method or the like. A second aluminum wiring layer 120 is formed on this protective film 119. Through the above-mentioned projects, 39 pieces of paper are formed to meet the Chinese National Standard (CNS) A4 specification (2 丨 0X297mm) nn ^^ 1 In-I—-i Shiyou ----- I:. ^ Ϋ I ------ In ^ — > U3, T ('Please read the precautions on the back before filling in this page) A7 printed by the Staff Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs —-------- B7_ V. Description of the invention (37 ~ ^ "-DRAM with the structure shown in FIG. 48. Embodiment 21 FIG. 53 is a partial cross-sectional view of the DRAM of the 21st embodiment of the present invention, and FIGS. 54 to 57 show the invention Partial cross-sectional view of the DRAM manufacturing process. FIG. 53 is a cross-sectional view of the DRAM of this embodiment. As shown in FIG. 53, as in the conventional example, there is a field in the field of device separation on the main surface of the p-type oxide film 101 The formation of the oxide film 102 is formed by the formation of the transfer gate transistor 103 in the device formation area. The transfer gate transistors l03a, i〇3b are provided with an insulating film 205 interposed on the channel area 121 thereof. Gate electrodes 104a and 104b. A laminated structure of a silicon oxide film and a SrTi〇3 film is used as the gate insulating film 205. Like the gate electrodes 104a and 104b, they are deposited The silicon film 107. The buried bit lines 108, the insulating film 107, the first interlayer insulating film 110, the contact hole 110a, the contact plug 111, the capacitor lower electrode 114, and the capacitor dielectric The film 115, the capacitor upper electrode 116, the second interlayer insulating film 117, the first aluminum wiring layer 118, the protective film 119, the second aluminum wiring layer 120, and the like are conventionally constructed. The manufacturing method of this embodiment is shown in FIG. 54 ~ 57. As shown in FIG. 54, as in the conventional example, the LOCOS method is used to form the field oxide film 102 on the element separation collar of the main surface of the oxide film 101. Then, a 100 nm thick film formed by the sputtering method is used. The SrTi03 film is used as the gate insulating film 205. This insulating film 205 is not used for graphic purposes in this project, but it is the same as in Embodiment 20, and is used as an etching stopper for subsequent contact hole opening. (CNS) A4 specification (210X297mm) nn I-1 ^ 1 1 ^ 1 I ----: »— · -I —I- ---.... I HI 1-1 Ding, T (Please read the precautions on the back before filling out this page) A7 B7 printed by the employee consumer cooperative of the Central Standards Bureau of the Ministry of Economic Affairs Description of the invention (38). On this gate insulating film 205 and field oxide film 102, gate electrodes (word lines) 104a, 104b, 104d are selectively formed. The gate electrodes 104a, 104b, 104d are used as a cover, borrowed Impurities are injected into the main surface of the semiconductor substrate 101 to form impure regions 106c, 106a, and 106b. Next, an insulating film 107 is deposited as covering the gate electrodes 104b, 104c, and 104d. Then, as shown in FIG. 55, after forming polycrystalline silicon on the entire surface of the semiconductor substrate 101, a pattern of a predetermined shape is formed to form a buried bit line 108 that can be electrically connected to the impurity field. The insulating film 108 is formed as if covering the buried bit line 108. After that, the first interlayer insulating film 110 is formed using a CVD method or the like. Next, by applying a planarization process to this first interlayer insulating film 110, the upper surface of the first interlayer insulating film 110 is planarized. As shown in FIG. 56, using the photoresist mask formed on the first interlayer insulating film, the first interlayer insulating film 110 is subjected to anisotropic etching. At this time, since the selectivity of the silicon oxide film or the like to RIE is higher than that of the insulating film 205 made of SrTi03, the insulating film 205 is hardly etched. The insulating film 205 remains at the bottom of the contact hole. Therefore, when the contact hole is formed, the semiconductor surface at the bottom of the contact portion can be protected from being damaged by etching. After that, since the water of SrTi03 pair has extremely high selectivity compared to the impure field of the substrate and the interlayer insulating film composed of the second oxide film, the insulating film 205 can be removed by aqua regia or the like. Through such engineering, the contact hole 110a is formed.

After the formation of the contact hole, the DRAM 41 is produced by the engineering of the same example, and the paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) --In n---··· _ nnm _ i ^ i T-, T (Please read the precautions on the back before filling in this page) 304287 A7 I_________B7, Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs V. Invention Description (39) ο That is, use the CVD method as shown in Figure 57 , Such as burying the contact hole 1103 and covering the first interlayer insulating film 110 to form a polycrystalline silicon layer. By etching back this polycrystalline silicon layer to form a contact plug m in the contact hole 110a. A platinum layer 114 is formed on the contact plug 111 and the first interlayer insulating film 110 using a sputtering method or the like. This white metal 114 is engraved with a predetermined shape to form a capacitor lower electrode 114. Using a sputtering method, a CVD method, or the like, a capacitor dielectric film 115 made of a high-dielectric material is formed like a capacitor lower electrode 114. Pb (Zn, ZnO03, SrTi03, or the like is used as the material of the capacitor dielectric film 115. A platinum layer is formed as if the capacitor dielectric film 115 is coated. By applying a predetermined shape to this platinum layer, a capacitor upper electrode 116 is formed. Next, a second interlayer insulating film 117 is formed by coating the upper electrode 116 of the capacitor using a CVD method or the like, and on this second interlayer insulating film 117, a first aluminum wiring layer 118 is formed at a predetermined interval. Like the first aluminum wiring layer 118, a CVD method or the like is used to form a protective film 119 composed of a silicon oxide film, etc. A second aluminum wiring layer 120 is formed on the protective film 119. After the above process DRAM having the structure shown in Fig. 53. Embodiment 22 This embodiment describes a method of manufacturing a semiconductor device having a thin film capacitor composed of a lower electrode, a dielectric film, and an upper electrode, and only the thin film capacitor related to the features of the present invention will be described below. Part. The size of this paper is in accordance with Chinese National Standard (CNS) Λ4 specification (210X297mm) (Please read the precautions on the back before filling this page) · -3 A7 B7 printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 5. Description of the invention (40) From Figures 58 to 60, the process of manufacturing the film capacitor of the 22nd embodiment of the present invention is shown in order. In a semiconductor device, a thin film capacitor is composed of a lower electrode 2002, a dielectric film 2004 made of a high-dielectric material, and an upper electrode 2005. Next, a method of manufacturing a thin film capacitor when manufacturing a semiconductor device is shown in FIG. 58 First, boron is diffused on the N-type silicon substrate 2001 to form a P-type field 2002, and then, an insulating film 2003 is coated on the surface. The thickness of the insulating film 2003 is preferably 50 to 500 nm, and the present embodiment is 100 nm. Next, An opening 2007 for a capacitor and an opening 2008 for an electrode are provided on the insulating film 2003. The size of the opening 2007 is preferably 10 to 100 μm square, and the present embodiment is 10 μm square. Next, a dielectric film 2004 is deposited on the surface. FIG. 58 The cross-sectional view up to this stage is shown. The thickness of the dielectric film 2004 is preferably 30 to 300 nm, and the present embodiment is 100 nm. The dielectric film 2004 is composed of high dielectric The material is composed of BaTi03, etc. Next, as shown in FIG. 59, the dielectric film 2004 is irradiated with X-rays having a wavelength of 0.3 to 1.5 nm, so that defects are formed in the dielectric film 2004. At this time, in order to understand the processing method of this embodiment Due to the influence of electrical characteristics, the amount of X-ray irradiation is changed to 0, 100, and 1000 mJ / cm2. Next, as shown in FIG. 60, platinum electrodes 2005 and 2006 are provided on the dielectric film 2004 and the opening 2008, respectively. The electrodes 2005 and 2006 The thickness is preferably 50 to 500 nm, and 100 nm in this embodiment. The platinum electrode 2005 is used as the upper electrode, the P-type field 2002 is used as the lower electrode, and the platinum electrode 2006 is used as the lead wiring of the lower electrode. By this, the lower electrode 2002, the dielectric film 2004 and the upper 43 paper standards with the conventional structure are formed to apply the Chinese National Standard (CNS) A4 specification (210X 297mm) (please read the precautions on the back first (Fill in this page) Order A7 A7 Printed by the Consumer Standardization Facility of the Central Standard Falcon Bureau of the Ministry of Economic Affairs " " ....... .---- .. V. Invention Instructions (41) ~ ^ ~ ^-Department The film capacitor formed by electrode 2005. After the platinum electrodes were formed in 2005 and 2006, slow cooling treatment was performed. In order to understand the effect of slow cooling heat treatment temperature and gas environment on electrical characteristics, the temperature of slow cooling heat treatment was changed to 200. (: To 700. (Range of =: = 30 minutes of slow cooling heat treatment is carried out in an atmosphere of oxygen, nitrogen, hydrogen, and argon gas, respectively. The permittivity and leakage current characteristics of the test piece thus obtained are tested. 61 shows the dependence of the X-ray irradiation amount of the dielectric constant of the film capacitor before the slow cooling heat treatment. FIG. 62 shows the dependence of the X-ray irradiation amount of the dielectric constant of the thin film capacitor after slow cooling heat treatment under an oxygen atmosphere. As the X-ray exposure increases, the dielectric constant of the film capacitor before the slow cooling heat treatment will gradually decrease. However, after the slow cooling heat treatment, on the contrary, with the increase of the X-ray exposure, the dielectric constant shows a slight increase. Fig. 63 shows the dependence of the leakage current characteristics of the film capacitor before slow cooling heat treatment on the X-ray irradiation amount. Fig. 64 shows the dependence of the leakage scale radiation irradiation of the capacitor after slow cooling treatment at 400 ° C in an oxygen atmosphere The amount of X-ray exposure increases from 0 to 10, 100, and 100 mJW. The leakage current density is accompanied by an increase in electrical kappa, which increases rapidly at the beginning and then reaches saturation. , Then Dramatically rise with the present / Wang Yi to observe this sharply rising potential. With the increase of the X-ray irradiation amount, the sharply rising potential of the leakage current of the film capacitor before the slow cooling heat treatment is slowly reduced. After slow cooling heat treatment, with the increase of X-ray exposure, the potential of leakage current rises sharply. Instead, the leakage current will decrease with the increase of X-ray exposure. In other words, the dielectric constant and leakage current Changes in characteristics can reflect defects in the film (read the notes on the back of the poem before filling out this page)

44

304287 A7 B7 V. Description of invention (42) (please read the precautions on the back before filling in this page). Based on the above data, it is possible to improve the characteristics without slowing down the low-temperature slow cooling heat treatment that does not affect the original film characteristics. In addition, when the irradiation dose is less than 10 mJ / cm2, the effect of improving the characteristics is small. To obtain the actual effect, an irradiation dose of at least 1 OmJ / cm2 or more is necessary. Figure 65 shows the temperature (200 ° C ~ 700 ° C) of the slow cooling heat treatment (200 ° C ~ 700 ° C) of the film capacitor irradiated with 100mJ / cm2 X-ray under different gas atmospheres (Ar, N2, H2, 02). The effect of density value (when 3V voltage is applied). Under the atmosphere of 〇2 and H2, in the range of slow cooling heat treatment temperature 300 ° C ~ 700 ° C, the leakage current density will decrease as the slow cooling heat treatment temperature increases. On the other hand, under the atmosphere of N2 and Ar, in the range of slow cooling heat treatment temperature 300 ° C ~ 450 ° C, the leakage current value will decrease with the increase of slow cooling heat treatment temperature, but the leakage current will instead be above 450 ° C Value will increase. It can be understood from this that the slow cooling heat treatment system after X-ray irradiation is effective only in the atmosphere containing 02 and H2. The slow cooling heat treatment temperature is preferably 300 ° C or higher. The leakage current characteristic is influenced by the atmosphere of slow cooling and heat treatment. Since atoms such as oxygen and hydrogen diffuse into the dielectric film, the effect of compensating the dielectric film defects is exerted. Printed by the Staff Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs As explained above, leakage current can be reduced by X-ray irradiation and subsequent slow cooling and heat treatment. The effect can be considered as follows. The X-ray irradiation can introduce quasi-stabilized defects into the dielectric film 2004 composed of BaTi03 and the like with a high dielectric constant, and then undergo the slow cooling heat treatment under an oxygen atmosphere to make the defects of the original dielectric film 2004 relative to The quasi-stability defects are eliminated, compared with the conventional defect repair by slow cooling heat treatment, which can effectively reduce the amount of defects in the film. To further explain, the 45 paper size of Yudian applies the Chinese National Standard (CNS> ^ 4 specifications (210X297 mm). The A7 __—__ B7 is printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. 5. Description of the invention (43) The defect is a Schottky defect in which metal ions and oxygen ions are paired to form a defect, and Frenkel is formed by the presence of ion defects in the lattice position and the presence of excess ions in the lattice position Defects, etc. Applying appropriate energy to these defects to make the defects move, you can expect the formation of the pairing of the defects. However, to move the defects, you must increase the activation energy, that is, you must usually treat them at high temperatures. In this implementation In the form, the quasi-stabilized defect pair is formed by X-ray irradiation. Then, by the relatively low temperature slow cooling heat treatment, the quasi-stabilized defect pair that was originally difficult to move can be guided to the vicinity of the defect and eliminated by pairing to eliminate The defect is removed. Therefore, the trapping level in the dielectric film of the thin film capacitor can be greatly improved at a lower processing temperature, by which Good leakage current characteristics. In addition, in this embodiment, it is irradiated with X-rays with a wavelength of OH 5 nm, and the aforementioned quasi-stable defect formation system can also use other high-energy rays, such as x-rays and r-rays of other wavelengths. , Ultraviolet rays, or positron rays. In this embodiment, before the platinum electrodes 20007 and 2008 are formed, the dielectric film 2004 is irradiated with X-rays and then subjected to slow cooling heat treatment. However, the main purpose of the present invention is The dielectric film 2004 is irradiated with high-energy rays to form a quasi-accepted defect pair, and then subjected to slow cooling heat treatment to be eliminated by pairing with the < defect formation originally existing in the film. Therefore, the irradiation of the radiation and the slow cooling heat treatment can be applied to the dielectric film Joined in any of the projects after the formation in 2004. Then, in order to process the photoresist pattern of the dielectric film 2004 and the platinum electrode 2005, 2006, etc., X-rays are used for exposure, so it may be At the same time as the x-ray photo of the dielectric film 200〇4

(-Please read the precautions on the back before filling out this page)

-, 1T I- «m · A7 B7 printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (44) This embodiment uses BaTi03 as the dielectric film and the P-type collar of the silicon substrate as the lower electrode. The platinum electrode is used as the upper electrode, but the effects of the present invention can also be obtained by replacing these materials with other materials. For example, SrTi03, PbTi03, or these solid solutions can be used as the dielectric film. Furthermore, Si, Pt, TiN, Ir02, Ru02, or the like can be used as the lower electrode and the upper electrode. In this embodiment, since the dielectric film is irradiated with high-energy rays and a slow cooling heat treatment is applied after the high-energy rays are irradiated, the characteristics of the film capacitor in the semiconductor device can be improved and stabilized. Preferably, the high-energy radiation of the dielectric film is at least 10mJ / cm2 X-ray, or slow cooling heat treatment or an atmosphere containing any one of oxygen and hydrogen, and above 300 ° C Temperature. With this, the above effect can be further improved. Embodiment 23 FIG. 66 shows the structure of a semiconductor device having a thin film capacitor according to 23 embodiments of the present invention. Boron is diffused on the N-type silicon substrate 2001 to form the P-type field 2002. The surface is covered with an insulating film 2003. Next, openings 2007 and 2008 are provided in the insulating film 2003, and then a dielectric film 2004 is deposited on the opening 2008. Next, Pt electrodes 2005 and 2006 are provided on the dielectric film 2004 and the opening 2007, respectively. The Pt electrode 2005 is used as the upper electrode, the P field 2002 is used as the lower electrode, and the Pt electrode 2006 is used as the lead wiring of the lower electrode. The structure of the film capacitor of the 22nd embodiment of FIG. 60 is almost the same, and the lower electrode 2002, the insulating film 2003, the dielectric film 2004, the upper electrode 2005, and the opening 2008. 47 This paper scale is applicable to the Chinese National Standard (CNS) Α4 specification (210Χ297mm) (Please read the precautions on the back before filling this page)

1. Printed bags of employees ’consumer cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs. 5. The size of the invention description (45) is the same as the 22nd embodiment. Next, the first interlayer film 2009, the X-ray absorber thin film 2010, and the second interlayer film 2011 are formed on the pt electrodes 2005 and 2006 in this order. The thickness of the first interlayer film 20〇9 is preferably 200 to 50 nm. In this embodiment, it is 300 nm. The thickness of the X-ray absorber film 2010 will be described later. In addition, the X-ray absorber thin film 201 is used to absorb X-rays to protect the dielectric film 2004. Therefore, the dielectric film 2004 is formed so as to cover the entirety of the dielectric film 2004. The thickness of the second skin interlayer 2011 is preferably 200 to 500 nm, and in this embodiment is 300 nm. Next, a hole 2012 penetrating the first wide film 2009 and the second interlayer film 2011 is formed for electrode wiring. The two a-wire wirings 2013 formed on the upper part of the second interlayer film 2011 are electrically connected to the upper electrode 2005 and the lead-out wiring 2006 of the lower electrode through the holes 2012, respectively. The thickness of the wiring 2013 is preferably 300 nm to 1 μm, and the present embodiment is 50 nm. The Α / wiring 2013 is connected to other thin film capacitors and transistors formed on the same substrate, so that the thin film capacitor can be used as one of the semiconductor elements. In order to form the thin-film processing of this thin-film capacitor structure, the resist pattern by X-ray exposure is used. The X-rays used for exposure are synchrotron radiation with a center wavelength of 0.5 nm. At least 30mJ / cm2 must be used for each exposure. Before forming the X-ray absorber thin film 2010, 400 must be performed in order to repair defects generated in the dielectric film 2004 after X-ray exposure. (: The slow cooling heat treatment. You can use the button, hungry, iridium, platinum, tungsten, nickel, copper, molybdenum or silver. 48 This paper size is suitable for China National Standard Falcon (CNS) A4 specification (210X 297 mm) (please Read the precautions on the back and then fill out this page.} Binding-Order A7 B7 of the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperation Co., Ltd. A7 B7 V. Description of the invention (46) Any one formed by the splash method as an X-ray absorber Thin film 2010. The film thickness of the X-ray absorber film 2010 is to make the product of the absorption coefficient of the material constituting the X-ray absorber film 2010 and the film thickness 1 or more in order to attenuate the X-ray passing through the film. More specifically , The absorption coefficient of the X-ray wavelength, starvation, recording or platinum used during irradiation is 4 ~ 5 X lO-Sm-1. Since these films are used as the function of X-ray absorbers, the film thickness is More than 200nm is preferred. On the other hand, in order to avoid processing difficulties, 600nm or less is preferred. The present embodiment is 250nm. The absorption coefficient of tungsten, nickel and copper is 2 ~ 3 X lOhm-1, based on the same reason film Thickness is more than 250nm, preferably less than 600nm, in This embodiment is 300 nm. The absorption coefficient of molybdenum and silver is 1 ~ 2 X Ιί ^ ηπΓ1, and the film thickness is preferably 50 nm or more and 600 nm or less for the same reason, and this embodiment is 500 nm. In this way, the result of forming a thin film capacitor is Although the slow cooling heat treatment was not performed after the formation of the X-ray absorber film after exposure of the Af wiring 2013, it did not cause deterioration of the leakage current characteristics due to X-ray exposure. Embodiment 24 FIG. 67 shows the 24. The thin film capacitor structure of the embodiment. Boron is diffused on the N-type silicon substrate 2001 to form a P-type field. Then, the surface is covered with an insulating film 2003. Next, the insulating film 2003 is provided with openings 2007, 2008, and in the opening A dielectric film 2004 is deposited on 2008. Next, Pt electrodes 2005 and 2006 are provided on the dielectric film 2004 and the opening 2007 respectively, with the Pt electrode 2005 as the upper electrode, the P-type collar 2002 as the lower electrode, and the Pt electrode 2006 as the lower electrode The leading out of the paper is 49 Chinese standard (CNS) A4 specifications (210X 297mm). I in n ^ i ^^^ 1 IK »-I— In ^ in 1. ^ 1 1 / " Wear, 卩 (please read the precautions on the back before filling in this page) A7 ---_ B7 ^ _ printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 5. The invention description (47) line. The structure of the thin film capacitor in FIG. 60 of the embodiment is approximately the same. The i-th interlayer film 2009, the X-ray absorber oxide thin film 2014, and the second wide interlayer film 2011 are formed on the Pt electrodes 2005 and 2006 in this order. The X-ray absorber oxide thin film 2014 is formed by high-temperature oxidation of any one of button, hunger, iridium, tungsten, nickel, copper, or thallium formed by a sputtering method in an oxygen atmosphere. Next, the i-th interlayer film 2009, the X-ray absorber oxide thin film 2014, and the second interlayer film 2011 are provided. In addition, the X-ray absorber oxide thin film 2014 is used to absorb X-rays to protect the dielectric film 2004. Therefore, it is provided above the dielectric film 2004 as if covering the entire dielectric film 2004. Next, two holes 2012 are formed through the first interlayer film 2009 and the second interlayer film 2011, and two Aβ wirings are formed on the upper part of the second interlayer film 2011. The two wires 2013 are electrically connected to the upper electrode 2005 and the lead wire 2006 of the lower electrode through the hole 2012 respectively. Since the wiring 2013 is in contact with other thin film capacitors and transistors formed on the same substrate, the thin film can function as one of the semiconductor elements. The sizes of the lower electrode 2002, the insulating film 2003, the dielectric film 2004, the upper electrode 2005, the opening 2008, the first interlayer film 2009, the second interlayer 2011, and the Aβ wiring 20Π are the same as those in the 22nd and 23rd embodiments. The thickness of the dielectric film 2004 will be described later. In order to form a thin film capacitor structure of this thin film capacitor, a photoresist pattern by X-ray exposure is used. The X-rays used for exposure are synchrotron radiation with a center wavelength of 0.5 nm, and the exposure must be at least 30 mJ / cm2 per exposure. 50 This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297mm) I ^ binding (please read the notes on the back before filling this page) A7 _____B7_____ printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs (48) Before the formation of the X-ray absorber oxide thin film, in order to repair defects generated in the dielectric film 2004 after X-ray exposure, it was 400. 〇 Perform slow cooling heat treatment. The thickness of the X-ray absorber oxide thin film 2014 is such that the product of the absorption coefficient of the substance constituting the X-ray absorber oxide thin film 2014 and the film thickness is 1 or more in order to attenuate X-rays passing through the thin film. When X-ray absorber oxide thin film 2014 is made of oxide, iron, and recorded oxide, the thickness of the metal thin film before oxidation treatment is preferably 200 nm or more and 600 nm or less, and in this embodiment, it is 300 nm. When using oxides of tungsten, nickel and copper, the thickness of the metal thin film before the oxidation treatment is preferably 25 nm or more and 600 nm or less, and in this embodiment, it is 300 nm. When molybdenum oxide is used, the thickness of the metal thin film before oxidation treatment is preferably 500 nm or more and 600 nm or less, and the form of this embodiment is 500 nm. As a result of forming the film capacitor in this way, although the X-ray absorber oxide film 2014 after exposure including the Αβ wiring 2013 is not subjected to a slow cooling heat treatment, it does not cause leakage current characteristics due to X-ray exposure Deterioration. The effects of Embodiment 23 and Embodiment 24 are as follows. In order to suppress the formation of defects that cannot be reduced even by the high-temperature slow cooling heat treatment, that is, the formation of defects in the dielectric film 2004, especially those that occurred during the exposure of the wiring 2013, etc., the X-ray absorber film 2010 and The X-ray absorber oxide thin film 2014 reduces the amount of X-rays incident on the dielectric film 2004, so that the defects in the dielectric film 2004 formed by the parent radiation exposure can be suppressed to form a stable characteristic Film capacitors. 51 This paper standard Lai Jinguan Jiaban Ban (CNS) Α4 specification (210X297 meal) (please read the precautions on the back before filling this page)

A7 ^ 04287 B7 V. Description of the invention (49) ^^ 1 I 1 ^ 1 In m ^^^ 1 ~ Shi—i—----— ^ ϋ ....... 0¾, \ = ° (Please read the notes on the back before filling in this page) In this embodiment, BaTi03 is used as the dielectric film, the P-type collar of the silicon substrate is used as the lower electrode, and the Pt electrode is used as the upper electrode. However, the effects of the present invention can also be obtained by replacing these materials with other materials. For example, SrTi03, PbTo03, or these solid solutions can be used as the dielectric film, and Si, Pt, TiN, Ir02, Ru02, etc. can be used as the lower electrode and the upper electrode. Embodiment 25 FIG. 68 shows the 25th embodiment of the present invention For the structure of a thin film capacitor, referring to FIG. 68, boron is diffused on an N-type silicon substrate 2001 to form a P-type field 2002, and an insulating film 2003 is coated on the surface thereof. Next, an opening 2008 is provided in the insulating film 2003, a dielectric film 2004 is deposited, and electrodes 2005 ', 2006' are provided, with the electrode 2005 'as the upper electrode, the P-type collar 2002 as the lower electrode, and the electrode 2006' as the lower electrode. Lead out the wiring. In addition, although not shown in the figure, the thin film capacitor shown in FIG. 66 is followed in the same manner, and then the interlayer film 2009 and two Aβ wirings 2013 are provided, and the description thereof is omitted. The sizes of the lower electrode 2002, the insulating film 2003, the dielectric film 2004, the upper electrode 2005 ', the opening 2008, the interlayer film 2009, and the AΘ wiring 2013 are the same as in the 22nd and 23rd embodiments. Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. Each film processing system that forms the structure of this film capacitor is processed using a photoresist pattern exposed by X-rays. The X-rays used for exposure are synchrotron radiation with a center wavelength of 0.5 nm, and the exposure must be at least 30 mJ / cm2 per exposure. As electrodes 2005 'and 2006', iridium, button and platinum with a larger absorption coefficient for the X-ray wavelength used for exposure are used. Electrode 2005 ', 20 (^ 52 This paper standard is applicable to China National Standard (CNS) A4 specification (210X 297mm) A7 B7 printed by the employee consumer cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. The thickness of the invention (5〇) must be It is set to be able to efficiently absorb X-rays without causing processing obstacles. The film thickness is preferably 200 nm or more and 600 nm or less, and the present embodiment is 250 nm. In this way, the result of forming a thin film capacitor is that no X-ray exposure occurs. The formed characteristics are degraded. The effect of Embodiment 25 is as follows. In order to suppress the formation of defects in the dielectric film 2004 due to X-ray exposure, iridium, a button, or platinum with a large absorption coefficient for X-ray wavelength is used as the electrode 2005 ^ 2006 ', its film thickness is 200nm or more and 600nm or less, so that the amount of X-rays incident on the dielectric film 2004 can be reduced, so the formation of defects in the dielectric film 2004 due to X-ray exposure can be suppressed, and A thin film capacitor with stable characteristics is formed. In this embodiment, BaTi03 is used as the dielectric film, and the P-type collar of the silicon substrate is used as the lower electrode. As the upper electrode. However, the effects of the present invention can also be obtained by replacing these materials with other materials. For example, SrTi03, Pb ^ Og or these solid solutions can be used as the dielectric film, and Si, Pt, TiN, Ir02 or Ru02 are used as the lower electrode and the upper electrode. From the above description, it is clearly understood that according to the semiconductor device manufacturing method of the present invention, the dielectric film is irradiated with high-energy rays, and at a relatively low temperature (> 300 ° C after the high-energy rays are irradiated) ) The slow cooling heat treatment is carried out, which can increase the capacitance of the thin film capacitor while preventing the diffusion of the dielectric film toward the electrode material, so that the formation of defects in the dielectric film exposed by X-rays can be suppressed, so the thin film capacitor can be improved in the semiconductor device The leakage current characteristic is stabilized by Daan. This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) -------- f .¾ clothing ------ II ----- -2 (Please read the precautions on the back before filling in this page) A7 B7 printed by the Employee Consumer Cooperative of the Central Standard Falcon Bureau of the Ministry of Economic Affairs V. Invention Instructions (51) Therefore, a system containing An integrated circuit of a thin film capacitor exposed by X-rays to form a fine pattern without deteriorating characteristics and a method of manufacturing the same. Preferably, high-energy rays irradiating the dielectric film use X-rays with an irradiation dose of 10 mJ / Cm2 or more; or, In an atmosphere containing at least one of oxygen or hydrogen as the main component, slow cooling heat treatment at a temperature of 300 ° C or higher can further improve the above-mentioned effects. An X-ray absorber film is provided above, so the amount of X-rays incident on the dielectric film can be reduced. By this, defects in the dielectric film due to X-ray exposure can be suppressed, and a thin film capacitor with stable characteristics can be formed. Preferably, the product of the absorption coefficient of the material constituting the X-ray absorber film and the thickness of the X-ray absorber film is 1 or more, so that the X-rays transmitted through the X-ray absorber film can be attenuated, so that the incidence of the dielectric The amount of X-ray film. In addition, since the upper electrode of the capacitor is composed of a material that can absorb X-rays (for example, iridium, button or platinum with a large absorption coefficient for X-ray wavelength and a film thickness of 200 nm or more and 600 nm or less), it can be The amount of X-rays incident on the dielectric film is reduced, and defects in the dielectric film due to X-ray exposure can be suppressed to form a semiconductor device with thin film capacitors having stable characteristics. In the present invention, instead of the platinum electrode used as a general electrode material, at least one of the lower electrode or the upper electrode of the capacitor is such that the main constituent element contained is an oxide or nitride with a specific permittivity of 20 or more. The metal element of the insulator is more than one type of metal electrode, or the main constitutive paper contained in the paper is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) --------: 装-(each first (Read the notes on the back and fill in this page)

、 1T i The Ministry of Economic Affairs, Central Standards Bureau employee consumption cooperation du printed A7 ------- B7_ V. Description of invention (52) ---- Scentin is its oxide or nitride metal element with conductivity More than one metal electrode. Therefore, it not only improves the workability of the electrode, but also prevents the diffusion into the dielectric film through the electrode cut, etc., and even if the electrode is oxidized at the interface between the electrode and the dielectric, because the oxide film is a dielectric or a conductor, Therefore, it is possible to prevent the capacitor from being reduced due to the formation of the oxide film. Furthermore, according to the present invention, in the semiconductor device, at least one of the lower electrode or the upper electrode of the capacitor contains a metal or metal compound with a face-centered cubic structure, so that the lattice constant of the metal or metal compound is connected to the capacitor electrode The gap of the lattice constant of the capacitor dielectric film is within 2%. This prevents the formation of a low-dielectric film on the interface due to lattice inconsistency, thus preventing the capacitor from being low-dielectric. In the present invention, at least one of the lower electrode or the upper electrode of the capacitor is composed of platinum as the main component, and a trace amount of more than one element selected from palladium, ruthenium, and baht is added, especially the capacitor and the oxidation In the electrode structure where the film is in direct contact, the adhesion between the capacitor electrode and the silicon oxide film can be improved to prevent the peeling of the electrode film, thereby achieving an increase in trust. At least one of the lower electrode or the upper electrode of the capacitor is in contact with the surface of the dielectric film and the other surface, because a protective film composed of a metal oxide or nitride is formed, so that moisture can be suppressed from facing the capacitor dielectric film Diffusion to obtain a semiconductor device with good capacitor characteristics. Furthermore, between at least one of the lower electrode or the upper electrode of the capacitor and the dielectric film, since a diffusion prevention film made of metal oxide or metal nitride is formed, it can prevent the diffusion of the metal material toward the dielectric film. Please read the precautions on the back before filling in this page) Binding-Order I -I ml · The paper size is applicable to the Chinese National Standard (CNS) A4 specification (2ι〇χ297 public meal) A7 A7 Printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs System V. Description of the invention (53 ^ —''---- Good m characteristics. Especially, the diffusion prevention film is preferably an insulator with a film thickness of 20 nm and a specific dielectric ratio of 20 or more. Since the lower electrode of the capacitor is composed of platinum with polycrystalline < crystal grains with an average value of 10nm ~ 100nm along the direction of its main surface, and a polycrystalline film with precious metal as the main component, it can prevent leakage Current, and seek to improve the characteristics of the capacitor. In the thickness direction of the capacitor dielectric film is composed of at least 2 wide accumulation 'and between these layers between the lower electrode corner or the side of the side of the attached narrowly held oxygen cut, The gas material and other materials depend on it, so the leakage current is prevented to improve the characteristics of the capacitor. According to the present invention, in the semiconductor device in which at least one of the lower electrode or the upper electrode of the capacitor is a platinum electrode, the capacitor dielectric film is formed by 2 More than one solid solution of metal oxide with per〇vskite structure, and by making the electrode is composed of an alloy of more than two metal elements, and the capacitor dielectric film formed on the lower electrode of the capacitor is composed of the first and The second capacitor dielectric film is formed so that the lattice constant of the first capacitor dielectric film is interposed between the lower electrode of the capacitor and the second capacitor dielectric film to prevent the lattice integration between the electrode and the dielectric film, which not only prevents The degradation of the capacitor characteristics due to the formation of the low-dielectric film can also reduce the software error rate of the semiconductor device. According to the present invention, the surface of the capacitor under the capacitor is roughened to increase the effective area of the capacitor Improvement of capacitor characteristics. Roughening of the lower electrode surface of the capacitor can be used The roughening method of etching the lower electrode surface of the capacitor, and the roughening method of heat treatment 56 The paper size is applicable to the Chinese National Standard (CNS) A4 specification (2 丨 0X297mm) page)

S04287 A7 B7 Fifth, the invention (54) method, or the roughening method of forming the lower electrode of the capacitor on the roughened polycrystalline silicon film. Moreover, according to the present invention, as described above, by embedding the lower electrode of the memory cell capacitor formed on the upper surface of the conventional interlayer insulating film into the interlayer insulating film, the memory cell capacitor is separated by the interlayer insulating film of low dielectric constant, The parasitic capacitance between memory cells can be reduced, and a semiconductor device with stable reading operation can be manufactured. Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs -------- I installed-(please read the precautions on the back and then fill out this page). According to the present invention, the opening formed on the semiconductor substrate can be An interlayer insulating film that reaches the main surface of the oxide film, a capacitor lower electrode electrically connected to the main surface of the oxide film through the opening, a capacitor dielectric film formed on the capacitor lower electrode, and a capacitor dielectric film In the semiconductor device composed of the upper electrode, any one of the metal titanate, the oxide button and the titanium oxide is formed on the gate electrode above or below the gate electrode of the transistor formed on the substrate between the interlayer insulating films The formed insulating film is formed by using the insulating film as an etch protection film on the surface of the oxide film, and by forming the above-mentioned openings in the interlayer insulating film provided on the insulating film. The semiconductor device has no surface damage, can prevent the occurrence of parasitic capacitance, and has a stable reading operation. [Brief description of drawings] FIG. 1 is a partial cross-sectional view of a DRAM according to a first embodiment of the present invention. Fig. 2 is a partial cross-sectional view of a DRAM according to a second embodiment of the present invention. This paper scale is applicable to the Chinese National Standard (CNS> A4 specification (210X297 mm) A7 B7 printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. V. Description of the invention (55). FIG. 3 is a part of the DRAM based on the third embodiment of the invention Fig. 4 is a partial cross-sectional view of a DRAM according to a fourth embodiment of the present invention. Fig. 5 is a partial cross-sectional view of a DRAM according to a fifth embodiment of the present invention. Fig. 6 is a partial cross-section of a DRAM according to a sixth embodiment of the present invention. Fig. 7 is a partial cross-sectional view of a DRAM according to a seventh embodiment of the invention. Fig. 8 is a partial cross-sectional view of a DRAM according to an eighth embodiment of the invention. Fig. 9 is a part of a DRAM according to a ninth embodiment of the invention Cross-sectional view. FIG. 10 is a correlation diagram showing the size of the dielectric particle size and current according to the ninth embodiment of the present invention. FIG. 11 is a partial cross-sectional view of the DRAM according to the tenth embodiment of the present invention. FIG. 12 is based on the present invention Partial cross-sectional view of the DRAM of the eleventh embodiment. FIG. 13 is a graph showing the change of the molar ratio X to the lattice constant of the solid solution (BaTiOD ^ SiTiOAe) according to the eleventh embodiment of the present invention. FIG. 14 A graph showing the change of the molar ratio X of the solid solution (BaTiO) x (SrTi03: hx) to the dielectric rate based on the eleventh embodiment of the present invention. 58 The paper scale applies the Chinese National Standard (CNS) A4 specification (210X 297 Mm) mi nn M. ^ Mn nfft ftm m ·· — *, vs (please read the precautions on the back before filling this page) A7 B7 printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of invention (56) Fig. 15 is a partial cross-sectional view of a DRAM according to a fifteenth embodiment of the present invention. Fig. 16 is a graph showing the change of the lattice constant of Pt due to the addition of Re in accordance with the twelfth embodiment of the present invention. FIG. 18 is a partial cross-sectional view of a DRAM according to a thirteenth embodiment of the present invention. FIG. 19 is based on a fourteenth embodiment of the present invention. Partial cross-sectional view of the DRAM. FIG. 20 is a partial cross-sectional view of the first step of the DRAM manufacturing process according to the 14th embodiment of the present invention. FIG. 21 is a partial cross-sectional view of the second step of the DRAM manufacturing process according to the 14th embodiment of the present invention. Figure 22 is based on this A partial cross-sectional view of the third process of the DRAM manufacturing process of the 14th embodiment is shown in Fig. 23. Fig. 23 is a partial cross-sectional view of the fourth process of the DRAM manufacturing process according to the 14th embodiment of the present invention. Fig. 24 is a view of the 15th embodiment of the present invention Partial cross-sectional view of DRAM. FIG. 25 is a partial cross-sectional view of the first process of the DRAM manufacturing process according to the fifteenth embodiment of the present invention. Fig. 26 is a partial cross-sectional view of the second process of the DRAM manufacturing process according to the fifteenth embodiment of the present invention. 59 The size of this paper is applicable to the Chinese National Standard (CNS> A4 specification (210X297mm) ^^^ 1 m ^ i am nn I flm 1 ^ 1-m., Vs (please read the precautions on the back before filling this page ) A7 B7 printed by the Employees ’Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 5. Description of the invention (57) FIG. 27 is a partial cross-sectional view of the third project of the DRAM manufacturing process based on the fifteenth embodiment of the present invention. FIG. 28 is based on the present invention. 15 is a partial cross-sectional view of the fourth step of the DRAM manufacturing process of the embodiment. FIG. 29 is a partial cross-sectional view of the DRAM based on the sixteenth embodiment of the present invention. FIG. 30 is the first of the DRAM manufacturing process according to the sixteenth embodiment of the present invention. Partial cross-sectional view of the project. FIG. 31 is a partial cross-sectional view of the second project based on the 16th embodiment of the present invention. FIG. 32 is a partial cross-sectional view of the third project based on the 16th embodiment of the present invention. Figure 33 is a partial cross-sectional view of the fourth process of the DRAM manufacturing process according to the sixteenth embodiment of the present invention. Figure 34 is a partial cross-sectional view of the DRAM based on the seventeenth embodiment of the present invention. Figure 35 is based on the seventeenth embodiment of the present invention Implementation form Partial cross-sectional view of the first project in the state of DRAM manufacturing process. FIG. 36 is a partial cross-sectional view of the second project based on the 17th embodiment of the present invention. FIG. 37 is a DRAM manufacturing process based on the 17th embodiment of the present invention. Partial cross-sectional view of the third project of the project. Figure 38 is a partial cross-sectional view of the fourth project of the DRAM manufacturing process based on the 17th embodiment of the present invention. 60 The paper size is applicable to the Chinese National Standard (CNS) Λ4 specification (210X297 mm ) 1 'Pack: Order If J (Please read the precautions on the back before filling in this page) Printed by the Ministry of Economic Affairs Central Standards Bureau Employee Consumer Cooperatives Μ Β7 V. Description of invention (58) Figure 39 is based on the 17th implementation of the invention Partial cross-sectional view of the fifth project of the DRAM manufacturing process of the form. FIG. 40 is a partial cross-sectional view of the sixth project of the DRAM manufacturing process according to the 17th embodiment of the present invention. FIG. 41 is a DRAM manufacturing process based on the 17th embodiment of the present invention. Partial cross-sectional view of the seventh project of the project. Partial cross-sectional view showing the DRAM according to the seventeenth embodiment of the present invention. FIG. 42 is a partial cross-sectional view of the DRAM according to the eighteenth embodiment of the present invention Figure 43 is a partial cross-sectional view of the first step of the DRAM manufacturing process according to the eighteenth embodiment of the present invention. Figure 44 is a partial cross-sectional view of the second step of the DRAM manufacturing process based on the eighteenth embodiment of the present invention. It is a partial cross-sectional view of the third step of the DRAM manufacturing process based on the eighteenth embodiment of the present invention. FIG. 46 is a partial cross-sectional view of the DRAM based on the nineteenth embodiment of the present invention. Fig. 47 is a graph showing the dependence of the dielectric constant of BaTi03 according to the nineteenth embodiment of the present invention on the temperature of the underlying formation and the substrate. Fig. 48 is a partial cross-sectional view of a DRAM according to a twentieth embodiment of the present invention. Fig. 49 is a partial cross-sectional view of the first step of the DRAM manufacturing process according to the twentieth embodiment of the present invention. 61 The size of this paper is applicable to the Chinese National Standard (CNS) A4 (210 X 297 mm). For clothing, please read the precautions on the back and then fill out this page) A7 B7 printed by Zhengong Consumer Cooperative, Central Bureau of Standards, Ministry of Economic Affairs DESCRIPTION OF THE INVENTION (59) FIG. 50 is a partial cross-sectional view of the second process of the DRAM manufacturing process according to the twentieth embodiment of the present invention. Fig. 51 is a partial cross-sectional view of a third process of the DRAM manufacturing process according to the twentieth embodiment of the present invention. Fig. 52 is a partial cross-sectional view of the fourth process of the DRAM manufacturing process according to the twentieth embodiment of the present invention. Figure 53 is a partial cross-sectional view of a DRAM according to a twenty-first embodiment of the present invention. Fig. 54 is a partial cross-sectional view of the first process of the DRAM manufacturing process according to the twenty-first embodiment of the present invention. Fig. 55 is a partial cross-sectional view of the second process of the DRAM manufacturing process according to the 21st embodiment of the present invention. Fig. 56 is a partial cross-sectional view of a third process of the DRAM manufacturing process according to the 21st embodiment of the present invention. Fig. 57 is a partial cross-sectional view of the fourth process of the DRAM manufacturing process according to the 21st embodiment of the present invention. Fig. 58 is a partial cross-sectional view showing the first step of the method of manufacturing the thin film capacitor according to the 22nd embodiment of the present invention. Fig. 59 is a partial cross-sectional view showing a second step of the method of manufacturing the thin film capacitor according to the 22nd embodiment of the present invention. Fig. 60 is a partial cross-sectional view showing a third step of the method of manufacturing the thin film capacitor according to the 22nd embodiment of the present invention. Fig. 61 is a graph showing the dependence of the amount of X-ray irradiation on the dielectric constant before slow cooling heat treatment of the film capacitor of the 22nd embodiment of the present invention. 62 The size of the paper is in accordance with the Chinese National Standard (CNS) A4 specification (210X297mm) • ^ 1 ....... 1 HI 1 ^ 1 mi ^ i— taxi! 1-»nn 0¾, va (please read first (Notes on the back and then fill out this page) A7 304287 ---______ B7 5. Description of the invention (6〇) Figure 62 shows the film capacitor of the 22nd embodiment of the present invention after slow cooling heat treatment in an oxygen atmosphere at 400 ° C Dependence graph of the X-ray exposure of the dielectric constant. I -------- ^ Pack ------ order (please read the precautions on the back before filling in this page) Figure 63 shows the slow cooling heat treatment of the film capacitor of the 22nd embodiment of the present invention X-ray irradiation dependency graph of leakage current characteristics. Fig. 64 is a graph showing the dependency of the leakage current characteristic on the leakage current characteristics of the film capacitor of the 22nd embodiment of the present invention after slow cooling heat treatment in an oxygen atmosphere at 400 ° C. Fig. 65 is a graph showing the temperature of the slow cooling heat treatment of the leakage current value after the slow cooling heat treatment of the film capacitor of the 22nd embodiment of the present invention in various atmospheres. Fig. 66 is a partial cross-sectional view of a film capacitor in accordance with a 23rd embodiment of the present invention. Fig. 67 is a partial cross-sectional view of a film capacitor in accordance with a 24th embodiment of the present invention. Fig. 68 is a partial cross-sectional view of a film capacitor in accordance with a 25th embodiment of the present invention. Figure 69 is a partial cross-sectional view of a conventional DRAM structure. Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. Figure 70 is a partial cross-sectional view of a conventional DRAM with a silicon barrier layer on the contact plug under the capacitor electrode. [Description of symbols] 101 ~ semiconductor substrate, 102 ~ field oxide film, l03a, 103b ~ transfer gate capacitor, 104a, l04b ~ gate electrode, 105 ~ gate insulating film, 106b, 106c ~ impure city , 107 ~ oxide film, 108 ~ buried bit line, 109 ~ insulating layer, no ~ first interlayer insulating film, ii〇a ~ contact hole, 63 This paper size is applicable to China National Standard (CNS) A4 specification (210X297 Mm) A7 B7 5. Description of the invention (61) 111 ~ contact plug, 117 ~ second interlayer insulating film, 118 ~ first aluminum wiring layer, 119 ~ protective film, 120 ~ aluminum wiring layer, 121 ~ channel area, 214 ~ Lower electrode of the capacitor containing hafnium and buttons, 216 ~ Upper electrode containing hafnium and buttons. tm ^ — I ^ in 1 ^ 1 ^ 1 ^^^^ 1 flm n · ^ — ^ 11 ^ 1 ml ^ flm 1., ™, -port ('Please read the notes on the back before filling this page) Economy The paper printed by the Ministry of Standards and Staff ’s Consumer Cooperative applies to the Chinese National Standard (CNS) A4 (210X297mm)

Claims (1)

Printed by the Central Standards Bureau of the Ministry of Economic Affairs βζ Industrial and Consumer Cooperatives A8 B8 C8 ----------- D8 VI. Patent application scope-~. ~~-1 A semiconductor device with a lower electrode formed on a semiconductor substrate ; The dielectric film is formed on the lower electrode; The upper electrode is formed on the dielectric film; The capacitor formed is characterized by a lower electrode or at least one of the upper electrode. The main constituent elements are more than one species < Metal element, the specific permittivity of the oxide or nitride of the metal element is 2G or more; or the oxide or vapor of the metal element is the conductor 0 2. The semiconductor device as described in item 丨A protective film made of metal oxide or nitride is formed on the interface of at least one of the lower electrode or the upper electrode that is in contact with the dielectric film, and the interface that is not in contact with the dielectric film, Prevent water and silicon from diffusing into at least one of the lower electrode or the upper electrode. 3. The semiconductor device according to item 1 of the patent application scope, wherein the main constituent element is selected from palladium, ruthenium, and iridium. 4. The semiconductor device according to item 丨 of the patent application range, wherein the dielectric film is composed of a polycrystalline film, and the average crystal grain size of the polycrystalline crystal along the main surface of the semiconductor substrate is 5 〇nm or below. 5. The semiconductor device according to item 1 of the patent application range, wherein the dielectric film has an insulating film near the lower electrode. 6. The semi-conductor device as described in item 1 of the patent application scope, in which an insulating film is formed between the semiconductor substrate and the lower electrode; > < 297mm) --------- ί ^-Γ Please read the precautions on the back of the fund before filling in this page) Order_ Patent application scope ^ — The dielectric film formed on the insulating film has a lower dielectric constant than the dielectric film formed on the lower electrode. 7. The semiconductor device according to the patent application item $ !, wherein the dielectric film is irradiated with high-energy rays, and the dielectric film irradiated with the high-energy rays is subjected to slow cooling heat treatment. 8_ The semiconductor device according to item 丨 of the patent application scope, wherein an X-ray absorption film is formed on the upper electrode. 9. The semiconductor device according to item 8 of the patent application range, wherein the product of the absorption coefficient of the X-ray absorption film and the film thickness of the X-ray absorption film is 1 or more. ^ — Γ Please read the precautions on the back of the thin first and then fill out this page), 1Τ-4_ Printed by the Beigong Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 66 Centigrade)