TW299463B - - Google Patents

Description

A7 B printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. V. Description of Invention (1) It is stated that this patent case bears the US Patent No. 60 / 〇00,515 filed on June 26, 1995. for reference. Rabbit Background Worrying Scope This invention relates to the preparation of substrates for integrated circuits (IC), multi-chip modulation, printed circuit boards, high-speed logic devices, flat panel displays and other microelectronic devices. In particular, the present invention relates to an improved method to fill the 2 gaps and make the space flush between the polarized dielectric layer of the substrate and the metal contacts to manufacture the aforementioned submicron-sized devices. This is chemical mechanical polishing by using rotating glass material. t illustrates with technology that there is a continuous trend in semiconductor technology to form integrated circuit wafers with more and faster circuits on wafer 2. 'This ultra-large accumulation vessel has continued to shrink the feature size, with the result that many devices can be used on a single wafer. On a limited wafer surface, the interconnect density is usually exposed on the substrate in a multi-layer configuration, and the devices must be interconnected on these multi-layers. The interconnects must be electrically insulated from each other, except for the design to make contact, usually Electrical insulation requires the deposition or rotation of a dielectric film on the surface. Refer to the booklet "Rotation / Drying / Treatment Method Using Rotating Glass Material for Interlayer and Intermetal Dielectric Planarization" published by United Signal Corporation (1994) (Heat Treatment Spinning Film). The main processing difficulty of the J-region interconnection is the topography of the device surface. Not only is the base fla surface itself extremely uneven, but also irregularities such as voids are generated during device formation. The lack of flatness will cause many problems, and its cost for the standard is p: ^ 7—) (please read the notes on the back and fill in this page first)

.A ^ 99463 5. Description of the invention (2)

A7 BJ The Ministry of Economic Affairs Central Standards Bureau employee consumer cooperative printing and printing has an adverse effect, including factors such as uneven dielectric thickness between the layers, poor bonding of the underlying materials, step coverage, and depth of focus. Therefore, the ability to fill narrow voids in the 1C matrix is extremely important for the formation of sub-micron sizes = there are various known methods for filling double voids in the industry, including: deposition etching deposition cycle, and sub-atmospheric tetraethyl orthosilicate (SATEOS), Atmospheric plasma tetraethyl orthosilicate (APTEOS), chemical vapor deposition (CVD) application, high density plasma (HDP) system and rotating glass (SOG) material. The method of applying SOG materials is more economical than the method of emphasizing equipment described above. Other important factors of the 1C matrix include the area and the overall dielectric surface. The flatness and smoothness of the surface are extremely important for the manufacture of integrated circuits. With the use of optical printing to define progressively smaller features, ^ decrease ^ less-expose the depth of focus of the tool. Because it is necessary to use a flat film to make the terrain of the microelectronic device smooth or flush, so as to correctly sample the increasingly complex integrated circuit. The 1C features produced using the J-printing method require area and overall dielectric flattening to greatly limit the depth of focus, which is below 0.35 // m. Without sufficient area and overall flatness, the lack of depth of focus makes it itself Limited print processing window. A method of improving 1C surface planarization includes chemical mechanical polishing (CMP), so CMP has the unique advantage that it can quickly remove elevated terrain features without significantly reducing flat areas. Compared with the recessed area, CMP can reduce the thickness of the applied oxide outer layer of the raised area, because the raised area has more contact with the polishing pad, so the degree of wear is greater than the raised area. By applying measurement and chemical polishing to the upper surface, CMP can achieve greater planarization than traditional etching. Although it can be flattened by CMP, its use still cannot remove the filling space-5- (please read the precautions on the back and then fill in this page) This paper scale is applicable to the Chinese S family standard (CNS) A4 specification (210X 297 mm) Gap needs. Therefore, it is believed that the use of SOG and CMP methods are mutually exclusive processes. This is because everyone believes that the SOG layer is bubble-like, so the polishing rate of SOG is much higher than other void filling processes. It is therefore desirable to provide an improved method to continuously form a uniform microelectronic substrate, thereby making the substrate substantially void-free, to effectively insulate the metal contacts' to effectively planarize the layer. SUMMARY OF THE INVENTION It is a method to form a continuous flat substrate without cavities, which includes: _ (a) application; 丨 electric wound to a base _ surface _ surface, the amount is sufficient to apply evenly Applying and filling voids on the surface; and a— (b) performing a chemical mechanical polishing step to the dielectric component until the dielectric component on the surface of the substrate is substantially flattened. The present invention provides a method for treating the surface of a semiconductor substrate, which includes: (a) spin-depositing a layer of liquid dielectric components onto the surface of a semiconductor substrate; (b) heating the dielectric layer at a temperature for a heating time sufficient for A continuous dry dielectric layer is formed on the surface; and (c) At least a portion of the dielectric layer is removed by chemical mechanical polishing of the dielectric layer. 0 Bfl Figure 1 (a) is an atomic force micro-image (AFM) image of shixioxanes, produced by the United Signal Company under the trademark Accuglass® 3 丨 丨, heat-treated under nitrogen at 425C for 60 minutes, and (1 )) Is an AFM image of 5〇 () 8 (^% 1mail 8 @ 311 siloxanes, which uses SC_U2 brand fumed silica adhesive as _____-6-paper size is applicable to 11 countries and counties ((: ≫ ^) 4 Ege (21 () \ 297 public epidemic) A 7 B7 V. Description of the invention (4 CMP treatment. Please read first _ Read back ιδ Ϊ- Matters and then fill in one. The page 2 is Graphic of the polishing rate (A / min) of SOG Accuglass® 3 11 of United Signaling Corporation using a pH-changing adhesive. Figure 3 The graph of the polishing rate (A / min) of the substrate under the f-organic rate with the thermal oxide outer layer, heat-treated SOG siloxanes, and the void-treated SOG siloxanes under f organic rate. 4 (ad) is applied with SC-112 adhesive at various roller rpms with thermal oxide, and PETEOS, PESiH4, Accuglass® 311 siloxanes and FlareTM fluorinated poly (ethylene sulfide) applied by United Signal Corporation. Polishing rate (A / min) graph.-Order 5 is a graph of the polishing rate (A / min) of silica SOG material using various binders at the rate of poisonous phosphorus content. Figure 6 is the monitoring of motor current changes The screen of the Luxtron 2350 endpoint detector. Figure 7 (a) and (b) show the wafer surface by scanning electron microscopy (SEM) micrographs to show the surface of the wafer before and after CMP.

A Figure 8 shows a substrate with a metal contact sample, on which a CVD layer and a SOG layer are deposited, respectively. Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. Figure 9 shows a substrate with metal contact samples on which a CVD layer, an SOG layer, and an additional CVD layer are deposited. . Detailed Description of the Preferred Specific Examples In its broadest example, the method includes the step of providing the upper surface of a semiconductor substrate having a dielectric layer. Thereafter, the CMP is guided to remove at least part of the dielectric layer in an amount sufficient to form a flat layer on the substrate. -7- This paper wave scale is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) Printed by the Consumer Standardization Facility of the Central Standard Falcon Bureau of the Ministry of Economic Affairs. 5. Description of the invention (5 The dielectric component is usually applied to the wafer substrate, It can be processed into a -1C or other-microelectronic device. The flat substrate generally suitable for the present invention includes: Kuntian gallium (GaAs) Shi Xi and ingredients containing Shi Xi such as crystalline silicon, polysilicon, non-junction " Xi, epitaxial layer shixi, with dioxide, xi_2), and mixtures thereof, may or may not have a circuit pattern on the surface. Usually the substrate has a diameter ranging from about 2 to the English phase, although The material of the present invention is used for larger or smaller substrates. It is known that the liquid dielectric layer is preferably rotated on glass (referred to as SOG) such as silicate or silicate oxygen with appropriate solvent and applied under special conditions. On the surface of the substrate, suitable solvents generally include water and organic solvents in an amount sufficient to form a uniform solution or diffusion of dielectric materials. _ _ There are various dielectric materials on the market that can be used for this purpose. Rotate on the base, the base Including: monate salt, monate salt squat, siloxanes such as phenylsiloxane, methylsiloxane, methylbenzene oxane, phosphosiloxane, silatrioxane, methylsilica Oxalane, tolyl benzotrioxane, and organic polymers such as fluorinated polymers, especially fluorinated polyethylene, its joint signal company produced under the brand nareTNI, and its copolymerization blend, etc. but not limited to this. Organic dielectrics that contain carbon atoms are preferred, and Shixi oxyalkyls and fluorinated polyethylenes are preferred. The preferred oxy-oxygens are non-fragmented, cross-linked glass materials with the chemical formula of Si〇x, Where x is greater than or equal to 1 and less than or equal to 2 'and 7 has an organic group such as an alkyl group of about 2% to about 90% and from about 10% to 25% according to the total weight of the siloxane-based material' Preferably, the group has about 1 to about 10 knots, the aromatic group has about 4 to 10 carbons, and the fat group has about 4 to 10 carbons, and mixtures thereof. In addition, the silane group is oxygen. -: --- Γ ---- clothing-- (Please read the note to go back *-items before filling out this page) -3 -8-The standard of this paper is applicable to China National Standard Rate (CNS) A4 specification ( twenty one 0X297mm) V. Description of invention (6) Printed alkane and silicon monoxide materials printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs can also contain approximately 0% to〗, according to the total molar ratio of dielectric materials is best Approximately from 2% to 4%. Preferred silicone materials suitable for the present invention are Accuglass < & from United Signal Corporation. Suitable silicone materials include 100 PPB (one billionth) or More V and more preferably or less, preferably ppB or less, such as sodium, potassium, "gas" nickel, magnesium, complex, copper, manganese, iron, calcium, etc. The amount of ears is about 1,000 to about 50,000, and the molar amount is about 300 to about 1,000. In a preferred example, the dielectric material has a viscosity when applied in the range of about 0.8 to about 70, when applied from about 3% to about 36% based on the total weight of the dielectric material, solvent and water Fan and from about 0 to about! The 1% water content has a dielectric content of about 10 or less, preferably from about 2.4 to about 3.2, and a refractive index from about 1.37 to about ι · 65. The dielectric material can be applied to the substrate through the traditional rotating outer layer commonly used in the industry, deep into the outer |, spraying, and curved outer layer method. For details of this method, consider the booklet "Processing Equipment and Automatic Systems" issued by the integrated technology company. It is best to use a rotating outer layer. The thickness of the dielectric film on the substrate depends on the% of the dielectric constant applied to the substrate, but usually the thickness At about 500A to about 2 microns, and preferably k, force 3000A to about 9000A. The amount of dielectric liquid applied to the substrate is from about 1 ml to about 10 ml, and preferably from about 2 ml to about 8. In a preferred example, the liquid material is rotated on the upper surface of the body according to a known rotation method, preferably, the T is applied to the solution applied from the center to the substrate, and then the speed is from about 500 rpm to about 600 rpm. Rotate on the rotating wheel, and preferably between 1500 and 4,000 rpm, rotate for about 5 to 60 seconds, preferably cP content and or liquid reference base -9 M's scale is suitable for Zhongguanjia standard (CNS) M specifications (2 coffee 297 g. V. Description of the invention) (A7 B7 10 to about 30 seconds, in order to spread the solution evenly on the surface of the whole substrate. Once it is done, the liquid dielectric components are densely spaced in the substrate The metal conductors are filled with valleys or concave grounds to provide a smooth effect, which means some flattening in the concave ground, but not enough to fully planarize the area 4. After applying the dielectric material to the substrate, the dielectric can be merged The substrate, but it is best to heat it for a period of time, the temperature is sufficient to evaporate any residual solution of the dielectric film, to reduce the viscosity of the film, and to strengthen the level of the film on the substrate, and increase or decrease the film density, chemical resistance properties and / Physical wear resistance, which can be It is easy for those skilled in the art to decide. Changes in the density and electrochemical properties cause changes in the CMP removal force. The increase in temperature or heating exposure time will increase the chemical and mechanical properties of the dielectric layer. -Variation, thereby changing the CMP removal rate. Depending on the nature of the dielectric layer material and the special CMP chemical adhesive, and the mechanical pressure conditions applied to fix the removal at a higher or lower speed, please read first-read Contrary to the matter. Fill in another page. Printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economy. Generally, heat the substrate of the dielectric outer layer at a temperature of about 50 ° C to about 400 ° C, preferably from about Heating from 50 ° C to about 250 ° C for about .5 to 10 minutes, and preferably from about 1 to 3 minutes. This is best performed on a hot plate, but can also be performed in an oven. In a preferred example, first The dielectric is heated at 50 ° C for about 30 seconds to 1 minute, and then heated at about 150 ° C for about 30 seconds to 1 minute. The third time is heated at about 250 ° C for about 30 seconds to 1 minute, this addition, After heating, the liquid dielectric material will be partially cross-linked and cured. ^ After heating the outer layer, the final film thickness ranges from about 0. 2 to about 3.0 mm, preferably from about 0.5 to 2.5 mm, preferably from about 0.7 to 2.0 mm. The film produced by the present invention generally exhibits a thickness standard deviation of less than 2%, and preferably less than -10- the paper size Applicable to China National Standard (CNS) A4 specification (210X 297mm)

I Printed by the Employees Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 299463 _ ^ _ V. Description of the invention (8) 1% average film thickness. Before CMP, the dielectric layer can also be used for processing cycles, which is defined by a layer and a period of time, which is required for curing and changing the chemical composition of the dielectric layer. In the preferred processing example, the heated dielectric layer will increase the mechanical hardness and chemical changes in the dielectric composition. This is heated at a temperature of 250 ° C to about 1000 ° C for about 5 minutes to about 240 minutes. It is heated at a temperature of 300 ° C to 800 ° C for about 30 minutes to about 120 minutes, preferably at a temperature of 350 ° C to 450 ° C for about 30 minutes to about 120 minutes for further processing of the layer. In another processing example, the dielectric layer can be exposed to electron beam radiation under conditions sufficient to process the dielectric material before removing the dielectric layer. Dielectrically processed substrates are processed by exposing the surface of the substrate to the -n electron-beam by the presence of a gas selected from a group consisting of oxygen, argon, nitrogen, helium and their mixed substrates, and preferably Composed of oxygen, argon, nitrogen and their mixtures. If nitrogen gas is better, the temperature of the exposure-electron beam depends on the desired characteristics of the final film and the desired length of treatment time. Generally, those skilled in the art can easily optimize the exposure conditions to obtain the desired results, but the temperature will be roughly in the range of about 25 ° C to about 250 ° C, and preferably about 150 ° C to 250 ° C between. The pressure during electron beam treatment will be between about 10 mtorr and about 200 mtorr, and preferably between about 10 mtorr and about 40 mtorr. The exposure time of the electron beam depends on the intensity of the beam sword applied to the substrate. Generally, those skilled in the art can easily optimize the exposure conditions to obtain the desired results, but generally the exposure will be about 5 to 45. Between minutes, with the application of an electron beam agent from 2000 to about 50,000, it is preferably from about 7 to about 15 minutes, preferably, from about 7500 to about 10,000 microcoulombs / cm. The acceleration voltage of the electron beam ranges from about 5 to 15 KeV. Selected -11-(please read the note * on the back before filling in this page). Installed. \ * A The size of the Izumi paper is applicable to the Chinese National Standard (CNS) A4 specification (210X 297mm) V. Description of invention ( g) A7 B7 The printing dose and energy of the Employees ’Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs depend on the thickness of the film to be processed. The dielectric outer substrate can be exposed to the electron beam in any chamber, and it has a device to provide irradiation of the electron beam to the substrate placed therein. Usually the chamber is also equipped with a device to emit electrons into a gaseous atmosphere, which contains: oxygen, argon, nitrogen, gas and mixtures thereof, and preferably oxygen, argon, nitrogen, so as to be simultaneously exposed with an electron beam. In a preferred example, the dielectric outer substrate is placed in a room, which is sold by the electronic imaging company of San Diego, California as "electronic processing", and its operating principle and performance characteristics are as described in US Patent No. 5,001,178 Said, and here for reference. After the dielectric layer is optimally processed, the dielectric layer can be CMP-processed according to known methods. The details of this processing method are well known in the industry, as described in U.S. Patent No. 5'5 16,729, here for reference. Roughly, the chemical mechanical polishing step is performed by damaging the dielectric layer with a damage powder adhesive. The cough adhesive is composed of alkali silica, smoked silica or plutonium compound, using a polishing pad such as The foamed fluorophosphorus polishing pad uses a pressure of from 5 to about 20 Ibs / m2, preferably from about 5 to 1011 ... / 丨 112. The preferred adhesive is plutonium oxide, It has a crystal size of about 14 to about 100 nm. And preferably 14 to about 20 nm. Preferably, the binder component has a pH range of from about to about 11, or from about 10.3 to about 11. Good. The particularly effective bond generally includes SCI12, which is a smoke-dioxygen dioxygen, produced by Jiabao Company of Yizhou Ao: La, with a pH of 10.3; and 11 ^ 1300 is a kind of smoked silica, by It is produced by Rhode Company in Scottsdale, Yazhou, and has ^ '' 0: pH, and SS25 is a smoked silica produced by Garbo Company, and has a pH of ⑺ ^. Preferably, use the city The polishing agent is sold as CMp, such as ipEc / Avalon 372 or 472 produced by Western company, with a decay of about 1 (^ i〇〇rpm 12- This paper scale is applicable to the Chinese National Standard (C NS) A4 specification (210 × 297 mm) (please read the precautions on the back before filling in this page) • Pack. Order, Α 1- «^ 1— I. III 1-Printed by the Staff Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs A7 ___V. Description of the invention (1〇) The barrel speed is preferably from about 25 to about 60 rpm, and the downward pressure from the surface of the polished dielectric substrate is from about 5 to 20 psi, preferably from 7 to 11 psi. CMP can be performed from about .5 to about 60 minutes. Preferably, from .5 to about 30 minutes, preferably from about .5 to about 60 minutes. The amount of dielectric layer removed is generally dependent on the applied Depending on the thickness of the dielectric layer, the dielectric layer is partially removed so that after removing these parts, the residual layer is flatter than the previous CMP. The following broad examples illustrate the invention. Example 1 · SOG outer wafer It is prepared by applying 3 to 4 ml of SOG on the surface of the crystal, that is, a silicon oxide-based SOG can be coated on a 6-inch diameter silicon. The SOG is Accuglass® 311 produced by United Signaling Corporation, and then Rotate the -Crystal on the outer SOG rail at about 3 50 rpm at 72 ° F for 2 seconds. The rail is made by DNS. The outer wafer is again under similar conditions Rotate at 3000 rpm for about 20 seconds, then heat in the outer layer rail on the hot plate in 3 consecutive periods of 120 seconds-at 80 ° C, 120 ° C, 175 ° C. In step 1, the outer layer crystal The circle is then processed in a furnace manufactured by MRL under the conditions of 425 ° C and atmospheric pressure and nitrogen is used to produce a processed dielectric layer. Example 2: Polished wafer thickness The wafer produced in Example 1 is then processed by Avalon 472 produced by IPEC / Western Company is polished and has a pH of 10.3 pH to ΙΚρΗ. Oscillate within a range of 5 mm at a down pressure of 7.0 psi and a plate speed of 28 rpm at a speed of 2 mm / minute. Use a 1C 1000 polishing pad from Rhodes to polish at 110 ° F. The flow rate of the adhesive is 130 ml / min. Use tiangong company before CMP-13- This paper scale is applicable to China National Standard (CNS) A4 specification (210X297mm) (please read the precautions on the back before filling in this page) -installed -53 Central Bureau of Economic Affairs Employee consumer cooperatives printed A7 ___ 5. Description of the invention (11) The Pengmi tool manufactured to predict the thickness of the wafer by averaging 25 values in 25 different locations on the wafer. After CMP, the polished SOG outer wafer is post-measured, and the thickness OR is found at 25 different positions on the wafer, and then the 25 values are averaged. The polishing rate can be obtained by subtracting the pre-measured thickness from the pre-measured thickness. The Pengmi tool can be used for automatic calculation. Figure 1 (a) shows the atomic force micrograph (AFM) image of SOG Accuglass® 3 11 after heat treatment at 425 ° C for 60 minutes under nitrogen atmosphere, and (b) is SC- AFM image of SOG Accuglass® 311 with 112 adhesive as CMP treatment. Figure 2 shows the graph of the polishing rate (A / min) of SOG Accugtass® 3 11 from 0 to 2000 A / min under a binder with a pH value of 10.3 pH to 11 pH. _ —— Example 3: Preparation of wafers with different organic ratios. A thermal oxide film was grown on the exposed silicon wafer in the furnace to produce a thermal oxide film. Then the oxide wafer was followed according to Example 1. The procedure described is heat-treated. The additional SOG layer used in Example 1 was applied to it in accordance with the procedure of Example 1, and then the wafer was processed in an empty furnace manufactured by DNS to produce an empty SOG wafer. Figure 3 shows the polishing rate of different dielectric surfaces as a function of the organic content of SOG. This example shows the polishing rate of the thermal oxide film, the heat-treated SOG and the void-treated SOG as a function of the organic content in the SOG. Example 4: Wafer preparation using different SOG materials Repeat Example 1 but with different dielectric SOG materials, such as thermal oxide, PETEOS, PESiH4, Accuglass® 3 11 siloxanes and FLAREtn ^ poly (ethylene). This example is a typical example of CMP polishing rate. As shown in Fig. 4 (a-d), it is a function of the pressure under polishing and the rpm of various SOG materials. -14- This paper wave scale is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (please read the precautions before filling this page) 5. Description of the invention (12 丄 0 不 ίΑΜΛΑΜ. The different SOG materials with different phosphorus weight% repeat the example, which is sold by United Signal Company as Accuglass® 203AS, P112A, P114A. Then it is polished with Avoni 472 polishing, which uses sc_n2, ss_25, ILD-1300 adhesive. The wafer thickness is predicted and post-measured as shown in Example 2. The polishing rate is a function of the phosphorus content as shown in Figure 5, this example shows the use of SOG materials with various phosphorus content The preparation of Lai is to measure CMP in the entire dielectric layer until it reaches the lower layer. This lower layer is usually a substrate with a metal conductor and an oxide layer. When some of the desired lower layers arrive during CMP, the stop is reached The dots are thick. A layer of TEOS with a thickness of 2kA is applied to the polysilicon wafer by CVD at a temperature of about 35〇x to 400〇β (: and a pressure of 10 mt〇rr. The color circle is processed as in example i After that, the wafer is then similarly replaced with another thickness of 8kAf A layer of scar film is deposited. Use Luke's 2350 endpoint detection system to polish and monitor the preparation of the wafer to observe the fixed rotation speed of the wafer polishing head to maintain a certain polishing rate. The results are shown in Figure 6. The point detection of the outer wafers printed by the Employee Consumer Cooperative of the Central Prototype Bureau of the Ministry of Economic Affairs is repeated with the CVD film and different layers of PESiH4 in Example 6 to generate test wafers. Detection-system to polish and monitor the preparation of the wafer to observe the fixed rotation speed of the wafer polishing head to maintain a certain polishing rate.

A7B7 V. Description of the invention (13) Example 8 SEM shows that when Examples 1 and 2 are repeated on a bare silicon pattern that is not proofed, the part and the whole obtained by the SOG / CMP merge process are flattened. Figures 7 (a) and (b) show the wafer surface before and after CMP. Example 9 Repeat Examples 1 and 2, except that the binder used for CMP is plutonium oxide, under various weight ratios of dewatering, pH, and particle size, and the dielectric layer is made of Accuglass®311 , Accuglass® 418 methyl stone dioxin, FlareTM fluorinated poly (ethylene) and TEOS. First, the polishing rate was measured in Example 2 and the results are shown in Table 1. _ — (Please read the precautions on the back before filling out this page). Ordered to print a table by the Employees ’Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs * 1 One binder polishing rate (A / min) Lattice *% CeO PH particles ® Accuglass® Flare TEOS Size 311 418 Lattice 1 10% (+) 7.0㈩ 350 nm (+) 2484 9900 4000 6000 Lattice 2 10% (2.8) (-) 20 nm (-) 2833 165 1034 740 Lattice 3 10 % (+) 7.0 (+) 170 nm (-) 2490 3719 5000 2120 Lattice 4 10% (+) 2.8 (-) 350 nm (+) 519 4263 4655 1135 Lattice 5 3% (-) 2.8 (-) 20 nm (-) 1092 1053 1295 1321 lattice 6 3% (-) 7.〇 (+) 170 nm (-) 5328 10278 1650 5124 lattice 7 3% (-) 7.0 (+) 350 nm (+) 5060 2171 4380 2432 Lattice 8 3% (-) 2.8㈠ 350 nm (+) 248 8172 2432 1434 * Lattice refers to the lattice of the Pengmi measurement tool. -16- This paper scale is applicable to China National Standard (CN'S) A4 specification (210X297mm), va

J A7 B7 printed by the Staff Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of the invention (14) One of the most important uses of the SOG / CMP process is endpoint control, that is, when polishing reaches the lower layer through the dielectric layer, ie The operator's control point at the end of the CMP. The lower layer is usually a substrate with a metal conductor and an oxide layer. When a part of the lower layer is reached by the polishing operation, the stop point or the end point is reached. The use of the SOG layer is a stop layer as shown in FIGS. 8 and 9 during the planarization process, which shows that a silicon substrate 1 has a metal contact sample in which a CVD layer 3 of PETEOS or PETEOS is deposited, followed by an SOG layer 4. Fig. 9 shows another CVD layer 5 of PESiHyil PETEOS, which can perform the CMP step, in which the polishing can be stopped in the SOG layer 4, the C VD layer 5 or the VCD layer 3, which depends on the endpoint usage It will be understood that those skilled in the art do not draw inspiration from the method disclosed in the ice article, that is, the present invention can be applied to multilayer interconnections and can be repeated to form interlayer dielectrics between the interconnection layers. In addition, it can also be understood that the form of display and description of the present invention is only a typical example at present. As described in the scope of the application, the present invention can be modified and changed without departing from the spirit and scope of the present invention. . The purpose of the following patent application scope is to interpret it to include all such changes and correctness. — — — D- a t (please read the precautions on the back before filling in this page) Order -17- This paper size is applicable to China National Standard (CNS) A4 specification (210X 297mm)

Claims (1)

1. 1. A8 Μ C8 D8 patent application method to form-a cavity-free continuous flattening substrate, this method includes: (a) applying a dielectric component to a substrate surface in an amount sufficient to evenly coat And% fill the voids on the surface; and (b) perform a chemical mechanical polishing step on the dielectric component until the dielectric component on the surface of the substrate is substantially flattened. 2_ The method according to item 1 of the patent application scope further includes heating the dielectric component and the substrate at a temperature, the heating time of which is sufficient after step (a) but before step (b) to form a olfactory on the substrate Continued dry dielectric film. 3. According to item 1 of the scope of the patent application-method, where the dielectric component contains a material 'selected from Shixi salt' broken salt ^ Nan, Shixi oxygen embankment, Mengditrioxane, organic polymer, Group 3 composed of co-polymers and their mixtures 4. The method according to item 1 of the patent application scope 'wherein the dielectric component contains one second of oxane, which is based on the total weight of the siloxane, from 2% to about 90 % Organic group, which includes: an alkyl group having about 1 to about 10 carbons, an aromatic group having about 4 to about 10 carbons, an aliphatic group having about 4 to about 10 carbons, or Its mixture. 5_ The method according to item 2 of the patent application scope wherein the dielectric component is dried by an additional subsequent heating at a temperature from about 25 ° C to about 250eC before step (b). -6. According to Item 2 of the patent application scope, the dielectric component is dried by an electron beam drying process. -7. According to the method of item 1 of the patent application scope, which uses an alkyl silicon dioxide binder for chemical mechanical polishing. 18- This paper uses the Chinese National Standard (CNS) A4 specifications (2 丨 〇297297)! ^, --- Η 装 ------ book! | ~? Come (please read the precautions of back ®- before filling this page) A8 B8 C8 D8 printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 6. Scope of patent application 8. According to the method of item 1 of the patent application scope, The surface includes:-a pattern of metal electrical conductors, and an oxide layer on the metal contacts. 9. According to the method in item [item of the scope of patent application, wherein the surface contains a pattern of a metal electrical conductor and an oxide layer on the test contact, and the method is further included before performing step (b), A second oxide layer is deposited on the dielectric layer. 10.-This kind of matrix is made according to the method of patent application scope item i. 11. A microelectronic device comprising the body according to item i of the patent application. -一 12. —A method for treating the surface of a semiconductor substrate, this method includes a) spin-depositing a layer of liquid dielectric material_ Yu ^ —surface of a semiconductor substrate (please read the precautions before filling in this booklet Page)-Installation · b) Heating the dielectric layer at a temperature for a heating time sufficient to form a continuous dry dielectric layer on the surface; and ~ c) removing at least the dielectric layer by chemical mechanical polishing —Part of the interlayer 0 surface electricity, 1T Printed by the Central Standards Bureau of the Ministry of Economic Affairs® Λ 工 consumer cooperatives-19- This paper size is applicable to the Chinese National Standard (CNS) (210X29? Mm)